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1N3487 More Information


ISO422 can be used in half duplex, or full duplex data communication bus systems. It is capable of continuously driving a 54Ω load, equivalent to a double-terminated trans- mission line, at the fully specified data rate. When connect- ing to the data bus, the voltage on the A and B input lines must remain between VSB and GNDB. This can be achieved by using a common bus ground connection, such as GNDB, as shown in Figures 5 and 6.
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The 1N3487 contains two separate UVLO com- parators to monitor the bias (VCC) and conver- sion (VIN) voltages independently. The VCC UVLO threshold is internally set to 4.25V, whereas the VIN UVLO threshold is program- mable through the UVIN pin. When the voltage on the UVIN pin is greater than 2.5V, the 1N3487 is permitted to start up pending the removal of all other faults. Both the VCC and VIN UVLO comparators have been designed with hysteresis to prevent noise from resetting a fault.


EPIC™ (Enhanced-Performance Implanted CMOS) Submicron Process ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) Latch-Up Performance Exceeds 250 mA Per JESD 17 Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25C Typical VOHV (Output VOH Undershoot) > 2 V at VCC = 3.3 V, TA = 25C Inputs Accept Voltages to 5.5 V Package Options Include Plastic Small-Outline (D), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW) Packages, and Ceramic Flat (W) Packages, Ceramic Chip Carriers (FK), and DIPs (J)

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1N3487 Suppliers

Part Number Mfg Pack D/C Qty Description Inquiry
1N3000B n/a n/a 100
1N3000RB n/a n/a 1
1N3001B n/a n/a 375
1N3001BJANTX n/a n/a 5
1N3001RB n/a n/a 1
1N3001RBM n/a n/a 1
1N3002B n/a n/a 1
1N3002BM n/a n/a 1
1N3002RB n/a n/a 1
1N3003B n/a n/a 77
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