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41AE

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Description 
 
 

41AE More Information

Mfg: LUCENT
D/C: 04+

Description

  There are two possible timing modes of operation with these devices: IDT Standard mode and First Word Fall Through (FWFT) mode.   In IDT Standard mode, the first word written to an empty FIFO will not appear on the data output lines unless a specific read operation is performed. A read operation, which consists of activating REN and enabling a rising RCLK edge, will shift the word from internal memory to the data output lines.   In FWFT mode, the first word written to an empty FIFO is clocked directly to the data output lines after three transitions of the RCLK signal. A REN does not have to be asserted for accessing the first word. However, subsequent words written to the FIFO do require a LOW on REN for access. The state of the FWFT/SI input during Master Reset determines the timing mode in use.   For applications requiring more data storage capacity than a single FIFO can provide, the FWFT timing mode permits depth expansion by chaining FIFOs in series (i.e. the data outputs of one FIFO are connected to the corresponding data inputs of the next). No external logic is required.   These FIFOs have five flag pins, EF/OR (Empty Flag or Output Ready), FF/IR (Full Flag or Input Ready), HF (Half-full Flag), PAE (Programmable Almost-Empty flag) and PAF (Programmable Almost-Full flag). The EF and FF functions are selected in IDT Standard mode. The IR and OR functions are selected in FWFT mode. HF, PAE and PAF are always available for use, irrespective of timing mode.   PAE and PAF can be programmed independently to switch at any point in memory. (See Table I and Table II.) Programmable offsets determine the flag switching threshold and can be loaded by two methods: parallel or serial. Two default offset settings are also provided, so that PAE can be set to switch at 127 or 1,023 locations from the empty boundary and the PAF threshold can be set at 127 or 1,023 locations from the full boundary. These choices are made with the LD pin during Master Reset.
 41AE PDF Download

41AE PDF

File Size:177088 KB

Applications

The Automatic Shut-Off is a safety system which turns off the electrical power of a load based either on a movement detection or a position detection. This detection will be taken into account after a well defined time delay. A typical application is the safety feature in irons which will switch off the heating element when the iron is left immobile for a well defined period, which can be dependant on the position. The state of the Auto Shut-Off can be indicated with an led.
 

Features

Licensed CMOS 765B Floppy Disk Controller Core − Supports Vertical Recording Format − 16-Byte Data FIFO − 100% IBM Compatibility − Detects All Overrun and Underrun   Conditions − 12 mA Drivers and Schmitt Trigger Inputs − DMA Enable Logic − Data Rate and Drive Control Registers Enhanced Digital Data Separator − Low Cost Implementation

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41AE Suppliers

Part Number Mfg Pack D/C Qty Description Inquiry
41AE DIP 1553
41AE DIP 340
41AE 04+ 04+ 1513 Normal stock
41AE 10
41AE 00+ 00+ TQFP100 70
41AE 2004+ 2004+ LUCENT 3210
41AE 2005+ 2005+ DIP 120
41A0002 00+ 00+ 513 Nornal Stock
41A0002 N/A N/A 00+ 500
41A0002 04+ 04+ N/A 8400
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