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| When executing a jump instruction, conditional skip ex- ecution, loading PCL register, subroutine call, or return from subroutine initial reset, internal interrupt, external interrupt or return from interrupt, the PC manipulates the program transfer by loading the address corresponding to each instruction. |
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| NOTES: (1) Junction Temperature = Ambient Temperature for low temperature limit and 25C guaranteed specifications. Junction Temperature = Ambient Temperature + 23C at high temperature limit guaranteed specifications. (2) TEST LEVELS: (A) 100% tested at 25C. Over temperature limits by characterization and simulation. (B) Limits set by characterization and simulation. (C) Typical value for information only. (3) Current is considered positive out of node. (4) CMIR tested as < 3dB degradation from minimum CMRR at specified limits. (5) IVH (VH bias current) is positive, and I VL (VL bias current) is negative, under these conditions. See Note 3, Figure 1 and Figure 8 . (6) Limiter feedthrough is the ratio of the output magnitude to the sinewave added to V H (or VL) when VIN = 0. (7) VH slew rate conditions are: VIN = +2V, G = +2, VL = C2V, VH = step between 2V and 0V. VL slew rate conditions are similar. (8) Linearity Guardband is defined for an output sinusoid (f = 5MHz, VO = 0VDC 1Vp-p) centered between the limiter levels (VH and VL). It is the difference between the limiter level and the peak output voltage where SFDR decreases by 3dB (see Figure 9). |
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