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DDX2100 More Information


 O When 16/68# pin is at logic 1 for Intel bus interface, this ouput (OD) becomes channel A interrupt output. The output state is defined   by the user and through the software setting of MCR[3]. INTA is set   to the active mode when MCR[3] is set to a logic 1. INTA is set to   the three state mode when MCR[3] is set to a logic 0 (default). See   MCR[3].   When 16/68# pin is at logic 0 for Motorola bus interface, this output   becomes device interrupt output (active low, open drain). An exter-   nal pull-up resistor is required for proper operation.   Motorola bus interface is not available on the 64 pin package.
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The Analog Ground terminal, pin 1, is shown internally connected to the non-inverting input of the op amp. This terminal connects to other internal circuitry and should be connected to ground. Approximately 200µA flows out of this terminal.


DEDDX2100CRIPTION: The CENTRAL DDX2100EMICONDUCTOR DDX2100, DDX2100 types are complementary silicon Darlington transistors manufactured by the epitaxial planar process, epoxy molded in a surface mount package, designed for applications requiring extremely high gain.

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DDX2100 Suppliers

Part Number Mfg Pack D/C Qty Description Inquiry
DDX2100 3550
DDX-1080 SOP-20 SOP-20 04+ 5
DDX-2000 QFP-44 QFP-44 2000 240
DDX2001 SOP28 SOP28 06+ 68
DDX2001 SOP-28 SOP-28 05+ 1000
DDX2001 2005 2005 68
DDX2001 00+ 00+ 926 SOP28
DDX2001 1068
DDX2001 1 1 SOP 88 new arrived in stock
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