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K10N60

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Description 
 
 

K10N60 More Information

Pack: TO:220

Description

Operation is similar to a conventional charge-balance VFC. An input operational amplifier (Figure 1) is configured as an integrator so that a positive input voltage causes an input current to flow in CINT. This forces the integrator output to ramp negatively. When the output of the integrator crosses the reference voltage (5V), the comparator trips, activating the clocked logic circuit. Once activated, the clocked logic awaits a falling edge of the clock input, followed by a rising edge. On the rising edge, switch SW1 is closed for one complete clock cycle, causing the reset current, I1, to switch to the integrator input. Since I1 is larger than the input current, IIN, the output of the integrator ramps positively during the one clock cycle reset period. The clocked logic circuitry also generates a VFC output pulse during the reset period.
 K10N60 PDF Download

K10N60 PDF

File Size:258897 KB

Applications

Hynix HYMD232646B(L)8J-J series incorporates SPD(serial presence detect). Serial presence detect function is implemented via a serial 2,048-bit EEPROM. The first 128 bytes of serial PD data are programmed by Hynix to identify DIMM type, capacity and other the information of DIMM and the last 128 bytes are available to the customer.
 

Features

The K10N60 series is a family of 2W, unregulated, isolated DC/DC converters. Requiring a minimum of external com- ponents and including on-chip device protection, the K10N60 series provides extra features such as output disable and synchronization of switching frequencies.

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K10N60 Suppliers

Part Number Mfg Pack D/C Qty Description Inquiry
K10N60 05+ 05+ TO-3P 8500
K10N60 TO-3P TO-3P 06+ 5350
K10N60 TO:220 950
K100 SMD 2540 stock on hand
K100 03+/04+ 03+/04+ 2540
K100 04+ 04+ infineon 2540
K100 M2 SSOP SSOP 04+ 7
K100 M2 03/04+ 03/04+ TSSOP16 33 http://www.silicon-ic.com
K1001 5 5 98+ DIP-14
K1001 DIP14P 1765
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