Ｄ７８ series:D780/D780016-016/D780016-020 Price|Datasheet pdf down.

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1) Worst case package. 2) Max number of outputs defined as (n). Data inputs are driven 0V to 5.0V, (n -1) outputs switching and one output at GND. 3) Max number of data inputs (n) switching. (n-1) switching 0V to5.0V. Inputs under test switching: 5.0V to threshold (VILD), 0V to threshold (VIHD), f=1MHz.
The existing procedure to add a collection identifier is through a 'technical amendment' to the standard, since Annex A is a 'normative' annex of the standard. Even though this procedure is more complex and cumbersome than a simple registration procedure, it can be effectively used to handle the requests for registration of sub-repertoires of 10646. A request for identifying a sub- repertoire can be prepared and submitted by a member body, a liaison organization or an individual expert to SC 2, along with some background information and rationale behind the request.
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Parr number/PDF	Mfg	Pack	D/C	Descrpion

D780 D780	NEC			Tantalum Dipped Radial Capacitors Performa
D780016-016 D780016-016	NEC	2007		The DS2745 provides current-flow, voltage, and t
D780016-020 D780016-020	NEC	2007		• High-speed access time: 10, 12, 15, and
D780016AYGF D780016AYGF	NEC	QFP		The HSMF-C15x series of bicolor chip-type LEDs
D780018-026 D780018-026	NEC	2007		The MIC5158 produces a brief logic-low error-fla
D780018YGF-026 D780018YGF-026	NEC	2007		D780018YGF-026 is a dual Darlington power transis
D78001BCW D78001BCW			96	Calibration Cycle Initiate. A minimum 80 input c
D780021AGK D780021AGK			94	The R1RW0416D is a 4-Mbit high speed static RAM
D780022AS D780022AS	NEC	.	04+	Interrupt. This open drain weak pullup, output si
D780022AYGK(21661036-2) D780022AYGK(21661036-2)				Consumption Pb-Free Packages Available: SOT-23 (
D780023AGK D780023AGK	NEC		07+
D780023AGK-B19 D780023AGK-B19				The Si91871 is a 300-mA CMOS LDO (low dropout) v
D780023AYGK D780023AYGK	NEC	TQFP-64P	0316+	International Airport Industrial Park • Mai
D780023-B70 D780023-B70	SHARP		O7+	This pin must be tied to either VCC or GND and mu
D780023GKA03 D780023GKA03				Lower Byte Select Input. Asserting this signal L
D780024AGK D780024AGK	NEC	QFP	2001	One of two 3.3V 48MHz clock outputs, generated fr
D780024AQKB81 D780024AQKB81				Output Voltage Options: 2.6 V, 3.3 V, 5.0 V, 7.5
D78002AYGK D78002AYGK	38	SAGEM	01+	Unlike serial EEPROMs, the FM25L16 performs wri
D78002B635 D78002B635	NEC	QFP/64	97+	A current sense methodology is implemented to di
D78002B-635 D78002B-635	NEC	QFP	1997	VREF: The module senses the voltage at this inpu
D78002BGC-635 D78002BGC-635	NEC	QFP	08+	• TOSHIBA is continually working to improve
D780032CW D780032CW	NEC	98+	DIP	The open-collector overtemperature ﬂag ou
D780033A-805 D780033A-805	55	NEC	00+	1.1 Scope. This specification covers the
D780033AGC D780033AGC				Low IR (<100nA @ 1V, <500nA @ 3V) Desig
D780034AGK D780034AGK				The IGBT technology is the key to International R
D78003B635 D78003B635	NEC	QFP	07+/08+	Testing of the switching parameters is modeled a
D780058 D780058	NEC	2007		As an alternative to a full chip erase, the devi
D780058-014 D780058-014	NEC	2007		Maximum Sample Rate: 170 MSPS 14-Bit Resolution
D780058-025 D780058-025	NEC	2007		The HSMP-386X series of general purpose PIN diod
D780076GK D780076GK				Synchronous, 95% Efficient, Boost Converter With
D78008CB-763 D78008CB-763	NEC	QFP	07+/08+	These circuits consist of two independent, high-
D78008GB-763 D78008GB-763	NEC	QFP	1995	Output voltage is set to a nominal value between
D7800G D7800G	NEC	DIP	93+	1. MTTF calculator available at http://www.frees
D780-1 D780-1			DIP	The 20 outputs from the GLB can drive both the B
D78011BCW D78011BCW				Note 1: Absolute Maximum Ratings are those values
D78011GC503 D78011GC503	NEC	QFP64		An output capacitor of 10 µF, ESR < 3
D78012BCN-186 D78012BCN-186	NEC	STK	2004+	• Provides a C2/C1.5 output clock signal w
D78012BCW-169 D78012BCW-169	NEC	STK	2004+	Housed in SOIC−8 or PDIP−8 pac
D78012F598 D78012F598				SDA The SDA is a Bi-directional pin used to tra
D78013-553 D78013-553	NEC	STK	2004+	*Absolute maximum ratings apply at 25C, unless o
D78013CM-052 D78013CM-052			93	FEATURES AD5305: 4 Buffered 8-Bit DACs in 10-Le
D78013CW D78013CW		DIP		During the first 30 ms after enabling VCO1 the m
D78013CW099 D78013CW099				For applications requiring On/Off control of the
D78013FC679 D78013FC679	NEC	QFP	07+/08+	To verify that the input offset voltage falls wi
D78013FYCW D78013FYCW	NEC	2007		On the card-side the TRAKKER monitors two progra
D78013FYCWW08 D78013FYCWW08	NEC	STK	2004+	The SY88782L is a single supply 3.3V low power c
D78013GC-561 D78013GC-561	NEC	QFP	07+/08+	COOutput capacitanceVDDQ = 2.5 V2.533.5pF ̶
D78013GC679 D78013GC679	NEC	STK	2004+	Low frequency cutoff determined by extern
D78013GC-679 D78013GC-679	NEC	QFP	1996	ESD (electrostatic discharge) threatens an elect
D78013GC691 D78013GC691	NEC		96	This 18-bit universal bus transceiver is
D78013GC-691 D78013GC-691	NEC	QFP	08+	memory). In the First-Word Fall-Through Mode (FW
D78013GC716 D78013GC716	NEC	QFP	07+/08+	Addresses, data I/Os, chip enables (E1, E2, E3),
D78013GC-716 D78013GC-716	NEC	QFP	1998
D78013GC-718 D78013GC-718	NEC	QFP	07+/08+
D78013GC770 D78013GC770	NEC	QFP	07+/08+	PALE Pulse Width Address Valid to PALE Falling E
D78013GC-770 D78013GC-770	NEC	QFP	1998	Specialized addressing requirements are met by u
D78014-059 D78014-059	N/A	DIP	2006	The first six digits number shows lot number. Th
D780140C780 D780140C780			98	The Flash memory on the A128 devices is a nonvol
D78014CW D78014CW	NEC	00+	DIP-64	Clock 4.096 MHz- Bidirectional (TTL compatible i
D78014CW-111 D78014CW-111	NEC		99+	The bq2000 uses a two-phase fast-charge algorithm
D78014FGC662 D78014FGC662				Device programming occurs by executing the progra
D78014FYCW D78014FYCW	NEC			The wiper settings are controllable through an I
D78014GC D78014GC				• 32-bit bus master DMA channel provides u
D78014GC565 D78014GC565	NEC	QFP	07+/08+	• Moisture Resistance, steady state: MIL-ST
D78014GC-565 D78014GC-565	NEC	QFP	1993	Max. UnitsConditions CCCVVGS = 0V, ID = 25
D78014GC630 D78014GC630	543	NEC	95+	Edition 1998-10-08 Published by Siemens AG, Ber
D78014GC641 D78014GC641	NEC		95	The device includes a complete analogue signal pr
D78014H513 D78014H513	NEC	QFP	3	A 5% resistor value is recommended. In the OOK mo
D78014YCMY38 D78014YCMY38				The clock input is fully differential to be comp
D78014YCW D78014YCW	NEC			High Voltage: Operation Up to 72V Synchronizable
D78016F-570 D78016F-570	2000	NEC	00+	This document is a general product description an
D78016F574 D78016F574	NEC	QFP	0051	Chrominance Output A 75 Ω termination resi
D78016F583 D78016F583	NEC		07+	A Retriggerable one-shot multivibrator has an ou
D78016F-583 D78016F-583	1561	NEC	00+	The D78016F-583 integrates a Boost Converter wit
D78016FCW021 D78016FCW021
D78016FYR01 D78016FYR01	300	NEC	98+	The ICS91309 is a high performance, low skew, low
D7801G D7801G	NEC	DIP	2006	Note 4 Unless otherwise specified all AC measurem
D780204AGF D780204AGF	27	NEC	05+	• Access times of 70, 85 ns • CMOS
D780204GF D780204GF	NEC			Stresses above those listed under Absolute Maximu
D780205GF041 D780205GF041	SONY			The device is designed to accept video signals fr
D780206G-096 D780206G-096	NEC	2007		The SMA ZenBlock™ is designed to protect t
D780206GF D780206GF	NEC	STK	2004+	• HIGH PERFORMANCE E2CMOS® TECHNOLOGY
D780206GF-015 D780206GF-015				REGISTERED In registered mode the output pin as
D780206GF-039 D780206GF-039	NEC	QFP	08+	signal at this pin indicates the internal level
D780206GF-096 D780206GF-096	NEC	2007		These Microsemi 30 kW Transient Voltage Suppresso
D780206GF-102 D780206GF-102	SHARP		O7+	Selects display mode 0xxx : 8 digits, 20 segment
D780208GF D780208GF	SHARP	QFP100	04+	TIMER PINCCTIMING CONTROL Internal Oscilla
D780208GF-062 D780208GF-062	SHARP		O7+	Single-power-supply flash memory (F-ZTAT™*
D780208GF-082 D780208GF-082	NEC	QFP	04+	MTV038 is designed for CRT/LCD monitor ap
D780226GF D780226GF	NEC	QFP	02+	Low power consumption and flexible power managem
D780226GF-018 D780226GF-018				The three major blocks of the MT8931C, consisting
D780226GF-019 D780226GF-019	1544	NEC	01+	Page Write The write control byte, word address
D780226GF-023 D780226GF-023	NEC	QFP	01+	1.tCHZ and tOHZ are defined as the time at which
D780226GF031 D780226GF031				Operation at even lower levels of Vcc supply vol
D780228GF D780228GF		QFP	99+	Internal PWM Current Control. The AD780228GFSLB c
D780228GF-014 D780228GF-014	NEC	QFP	07+/08+	NOTE: EP circuits are designed to meet the DC sp
D780228GF-068 D780228GF-068	400	NEC	00+	The software protection is a register based read
D780228GF-069 D780228GF-069	400	NEC	00+	overall bandwidth is limited to 2MHz. The input
D780228GF-071 D780228GF-071	2000	NEC	00+	The differential inputs operate from rail-to-rail
D780228GF-073 D780228GF-073	1128	NEC	00+	A loopback test mode is provided that puts the
D780228GF-074 D780228GF-074	565	NEC	00+	The EM785840 series are 8-bit RISC type m
D780232 D780232	NEC	NEW	03+	† Stresses above those listed under Absolu
D780232GC-026 D780232GC-026				The ADSP-21365/6 contains two computational proc
D780232GC-035 D780232GC-035	NEC	QFP	01+	Measurement of IN1-C and IN1-Y mixed differential
D780232GC-043 D780232GC-043	NEC	QFP	01+	The device is available with an access time of 5
D780232GC-049 D780232GC-049	NEC	QFP	07+/08+	The CE input of the lead (or only) PROM is drive
D780232GC-049-8BT D780232GC-049-8BT	NEC	TQFP	2001
D7802BGC D7802BGC	NEC		95	Powerful Harvard Architecture Processor &
D7802G D7802G	NEC	1985	DIP	PLIM: This pin is programmed to set the maximum i
D780306GF028 D780306GF028				Preliminary product information describes produc
D780306YF-1 D780306YF-1	NEC	BGA	99+	Designed for Signaling Rates (1) 2 Gbps Total J
D78035GC-115 D78035GC-115	NEC		07+	The LV166A parallel-in or serial-in, serial-out
D78042-088 D78042-088	NEC	QFP	07+/08+	For a DAC, linearity is measured between zero-in
D78042AGF D78042AGF			95+	- On chip Hall sensor - Rotor-locked shutdown -
D78042AGF060 D78042AGF060	NEC	TQFP80	07+	To successfully enter the low-power mode, the MC
D78042FGF D78042FGF	NEC		O7+	Note A: Characteristic data has been developed f
D78042GF088 D78042GF088	NEC	QFP	07+/08+	Continuous Drain Current, VGS @ 10V Continuous
D78042GF-088 D78042GF-088	NEC	QFP	1997	NanoStar and NanoFree Packages O
D78043FG056 D78043FG056	NEC	2007		Notes: a. Signals on SX, DX, or INX exceeding
D78043FGF-025 D78043FGF-025				The output enable input is active LOW. If the out
D78043FGF-050 D78043FGF-050	N/A	QFP	07+	Free PSoC "Tele-training" is available
D78043GF D78043GF	NEC	QFP	QFP	COMP, 0 VCS 0.4 V. DV
D78043GF062 D78043GF062				Operating voltage: 2.7V~5.2V Built-in 32kHz RC o
D78044 D78044	NEC	QFP	99	Aside from jitter effects, noise and pulse distor
D78044AGF D78044AGF	817	NEC	96+	The PWM controls the fan speed proportionally to
D78044BGF D78044BGF	NEC	QFP	QFP
D78044BGF012 D78044BGF012				Pulse shapes for 0C655 ft., in 133 ft. &
D78044BGF013 D78044BGF013				1. Pastikan komputer dalam kondisi mati dan tidak
D78044BGF018 D78044BGF018				• International standard package miniBLOC
D78044BGF019 D78044BGF019
D78044BGF026 D78044BGF026				A logic low on the CHIP ENABLE input will
D78044BGFO17 D78044BGFO17				This ampliﬁer is designed with compensati
D78044FGF D78044FGF	NEC	QFP	99+	Serial data input; receives serial data from the
D78044GF-027 D78044GF-027				The CD4085B types are supplied in 14-lead hermet
D78044GF117 D78044GF117				A new Power Management Mode (PMM) is useful for p
D78044GF-132 D78044GF-132	NEC	07+/08+
D78044HGF D78044HGF	370	NEC	98+	Guaranteed Zero Reading for 0V Input on All Scale
D78044HGF017 D78044HGF017				Agilent Technologies HLMP subminiature LED lamps
D78044HGF-021 D78044HGF-021	NEC	QFP	97+	Figure 5 shows the output levels overlayed using
D78044HGF023 D78044HGF023				These chips, when properly assembled, display ch
D78045-042-EL4600 D78045-042-EL4600	NEC	QFP	07+	The HY62LF16806A is a high speed, super low powe
D78045-047 D78045-047	NEC	2007		RSDS OUTPUT VOLTAGE CONTROL The RSDS output vol
D78045F047 D78045F047	NEC	2007		enabled and synchronous loading occurs on the n
D78045FGF D78045FGF	NEC		O7+	During steady-state operation for a typical swit
D78045FGF-018-3B9 D78045FGF-018-3B9	NEC	QFP	97	Hewlett-Packards HSMS-285A family of zero bias S
D78045FGF-092 D78045FGF-092				Applications • Mobile telecommunication &
D78045FGF-093 D78045FGF-093				For the D78045FGF-093, offset adjusting is norma
D78045GF016 D78045GF016				Note 11: Skew is defined as the absolute value of
D78045HGF014 D78045HGF014				Pulse triggering occurs at a particular voltage
D78046HGF D78046HGF				Greatly Reduced Conducted and Radiated EMI Low S
D78052GC-111 D78052GC-111				SDRAM Controller 64-bit data bus. Up to 90MHz
D78052GC3B9 D78052GC3B9				The FCT841T high-performance interface is design
D78052GCA-03 D78052GCA-03	NEC	QFP	07+/08+	The SCENIC C620 is built with specially selected
D78053-A17 D78053-A17	NEC	2007		This N-Channel power MOSFET is &
D78053GC D78053GC		QFP80	08+	A charge of over 2000 volts can accumulate on th
D78053GC064 D78053GC064	NEC			Note 2. Regulation is measured at constant junct
D78053GC097 D78053GC097	NEC			4.4.3 Group C inspection. Group C inspect
D78053GC-108 D78053GC-108	NEC	QFP	1996	Notes 1. DC Current Transfer Ratio (CTRCE) is d
D78053GC-115 D78053GC-115	NEC	QFP	1996	Accesses to the SDRAM are burst oriented. Consecu
D78053GC267 D78053GC267				HIGH SPEED : fMAX = 70 MHz (TYP.) at VCC = 6V
D78053GC-503 D78053GC-503	NEC	QFP/80	98+	Gate-to-Source Voltage C Continue - Non-
D78053GCA72 D78053GCA72				The IRU1015 is a low dropout three-terminal adjus
D78053GCB15 D78053GCB15	NEC	QFP	03+	altered, and at the same time CJ and RS will be
D78053GK524 D78053GK524	NEC	PQFP80	96+
D78054 D78054	RVIXRDX	96+	QFP-M80P	The 256Mb DDR SDRAM uses a double-data-rate arch
D78054G62 D78054G62				The USB specification defines the following five
D78054GC D78054GC				PROGRAM MEMORY The device contains 4096 bytes of
D78054GC032 D78054GC032
D78054GC-096 D78054GC-096	NEC	QFP	07+/08+	Warning: Stresses beyond those listed under Absol
D78054GC-102 D78054GC-102	NEC	QFP	08+	After determining which clock edge to use, a sta
D78054GC103 D78054GC103	NEC	QFP	1995
D78054GC-103 D78054GC-103	NEC	QFP	1995	12 Bit Resolution 1.3 GS/s Sampling Rate 4:1 In
D78054GC-143 D78054GC-143	NEC	QFP	07+/08+	The D78054GC-143 Excalibur™ series
D78054GC161 D78054GC161	NEC	06+	500	These circuits perform a single function: they as
D78054GC165 D78054GC165				In LVDS (low-voltage differential signaling), an
D78054GC-177 D78054GC-177	NEC	QFP	96+	HN58X25xxx Series is the Serial Peripheral Inter
D78054GC433 D78054GC433	NEC	QFP	97+	HY57V561620HT is offering fully synchronous opera
D78054GC439 D78054GC439	NEC	QFP		Two package styles are available. HOA0901- 011 i
D78054GC913 D78054GC913				The GMR S6 is an angle sensor based on sputtered
D78054GC925 D78054GC925	QFP	NEC		The chip is built around an ARM946ES RISC proces
D78054GC-929 D78054GC-929	NEC	STK	2004+	The video encoder is used to encode PC graphics d
D78054GK-513 D78054GK-513	NEC	QFP-80		* All specs and applications shown above subject
D78054GK-539-BE9 D78054GK-539-BE9	NEC	97+	TQFP	LIFE SUPPORT POLICY FAIRCHILDS PRODUCTS ARE NOT
D78055GCA27 D78055GCA27	NEC	TQFP/80	98+	also at ANT1/ANT2 High Output Power (8.0 dBm) wi
D78056FGC-014-3B9 D78056FGC-014-3B9	NEC	QFP	08+	The HYM7V651601B F-Series are Dual In-line Memory
D78058-947 D78058-947				• High-speed access time: 70 and 85 ns &#
D78058FG-054 D78058FG-054	NEC	QFP	97+	The series is useful as precision 2.5-V low-volt
D78058FGC-012 D78058FGC-012	NEC	QFP	1996	The TLC5620 is implemented using four resistor-s
D78058FGC-042 D78058FGC-042	NEC	QFP	08+	the performance for a wide range of applications
D78058FGC-050 D78058FGC-050	NEC	QFP	07+/08+	the ISAnet evaluation adapter card is designed a
D78058FGC051 D78058FGC051	NEC	QFP	07+/08+	The Victory66 SLC90E66 Enhanced PCI South Bridge
D78058FGC-051 D78058FGC-051	NEC	QFP	1997
D78058FGC-053 D78058FGC-053	NEC	QFP	07+/08+	• SOP (Small Outline Package) • Iso
D78058FGC-076 D78058FGC-076	NEC	QFP	97+	This is a diagram of a typical application
D78058FGC-A19-8BT D78058FGC-A19-8BT	NEC	TQFP	98+	The D78058FGC-A19-8BT is a dual, Low-Noise Pream
D78058FGC-A20 D78058FGC-A20	NEC	QFP	1998
D78058FGC-A21 D78058FGC-A21	NEC	QFP/80	98+	Thus, the first step in designing the antenna ci
D78058GC018 D78058GC018	NEC	QFP	07+/08+	The Flash memory on the A64 device is a nonvolat
D78058GC-018-3B9 D78058GC-018-3B9	NEC	QFP	08+	The 74LVC(H)162245A features two output enable (
D78058GC051 D78058GC051	NEC		05/06+	Important Information and Disclaimer:The informat
D78058GC-078 D78058GC-078	NEC	QFP	07+/08+	When OE is set HIGH, the data flow through the th
D78058GC-084 D78058GC-084	NEC		97	Maximum ratings are those values beyond which de
D78058GC-503 D78058GC-503	NEC	QFP	07+/08+
D78058GC975 D78058GC975	NEC	QFP		OPTIONAL OFFSET VOLTAGE ADJUSTMENT In many appli
D78058GCF54 D78058GCF54	2350	NEC	98+	Inhibit*: This is an open-collector (open-drain)
D78058GCK40 D78058GCK40	NEC	QFP84	08+	Figure 6 shows the clock, enable, and dat
D78058GCK45 D78058GCK45				When operating properly with 5V in (for example)
D78058GFCA22 D78058GFCA22	NEC	TQFP	1998	Beneficial comments (recommendations, additions,
D78063GF D78063GF				Along with the Vaddis III decoder, Zoran provide
D78064BGF031 D78064BGF031	NEC			The highly integrated switches require no extern
D78064BGF-031 D78064BGF-031	NEC			Acknowledge is a software convention used to pro
D78064GC149 D78064GC149	NEC		02+	Input Voltage Range Quiescent Current Soft St
D78064GF025 D78064GF025	NEC		98	Multifunction Instructions Pipelined Architectur
D78064GF-025 D78064GF-025	NEC	QFP	08+	READ ENABLE ( R ) A read cycle is initiat
D78064GF154 D78064GF154				Thereareadditionalprovisionsfor demonstrating DD
D78064GF-172 D78064GF-172	NEC	QFP	07+/08+	The alignment-free DRX 3960A needs no special e
D78064GF-175 D78064GF-175				Genesis Microchip Inc. reserves the right to chan
D78070AGC D78070AGC	NEC	QFP	QFP	READY: This signal can be used to extend the mem
D780805-015 D780805-015		QFP100	08+	The availability of the amplifier bias current (
D78081CU-304 D78081CU-304	NEC	DIP	2006	Max. UnitsConditions CCCSVDS = 15V, ID = 3.8A &
D78081GA14 D78081GA14	NEC	QFP	1997	downloaded externally. n The parameter co
D78081GA-14 D78081GA-14	NEC	QFP	1997	Connective units, called repeaters, spaced every
D780833Y306 D780833Y306	NEC	TQFP	04+	These analog multiplexers/demultiplexers control
D780833Y309 D780833Y309	NEC	TQFP	04+	Description: The CENTRAL SEMICONDUCTOR CMPTA13,
D78098BGC-015 D78098BGC-015	NEC	QFP/80	98+	The host system can detect whether a program or
D78098GC-015 D78098GC-015	NEC	QFP	98+	Note - If an of the identified ranges include co
D7809G033 D7809G033				Track: This is an analog control input that enab
D7809G038 D7809G038	58	NEC		The HYM71V16M755HC(L)T6 Series are 16Mx72bits Syn
D7809G053 D7809G053	16	NEC		This integrated circuit is designed to co
Ｄ７８０９Ｇ０５８Ｄ７８０９Ｇ０５８	NEC	CDIP64	8802	The test set described in this paper allows comp
D7809G072 D7809G072	250	NEC		This is a dual function pin. In the IDT Standard
D780C D780C	NEC	DIP-40		Certain applications using semiconductor product
D780C.C-1 D780C.C-1	NEC	DIP40	07+	The ABT8245 scan test devices with octal bus tr
D780C/P16395-126 D780C/P16395-126				These enhancement-mode (normally-off) transistor
D780C1 D780C1	NEC	DIP	N/A	The Versatile Timer Unit (VTU) module contains f
D780C-1 D780C-1	NEC	DIP40	04+/05+/06+/07+	Note 2: Absolute Maximum Ratings indicate limits
D780C-1(-2) D780C-1(-2)				The zero-pin phase-locked loop (ZPLL) clock modu
D780C-1. D780C-1.				This data sheet has been carefully CORPORATION
D780C2 D780C2				The BA178M!!T and BA178M!!FP series are 3-pin, fi
D780C-2 D780C-2			84	This pin is the ground pin for the entire chip.
D780D-1 D780D-1	NEC		87+	In addition to its masked-ROM versions, the H8/3
D781 D781				When heavy loads require the OUT pin to s
D7810 D7810	NEC	DIP	87/90	The device operates from a 32 kHz crystal with a
D7810C D7810C	NEC	DIP-64		The C-suffix devices are characterized for opera
D7810C-1 D7810C-1	NEC		N/A	The ADC14L020 is a low power monolithic CMOS ana
D7810CW D7810CW	NEC	DIP	06+	Each of the two switch channels supply up to 500
D7810G D7810G	NEC	DIP64		Notes: 1. DQ-to-I/O wiring is shown as recom-
D7810HC D7810HC	NEC		04+	8- to 32-bit and 16- to 32-bit word packing opti
D7810HCW D7810HCW	NEC	DIP	06+	Digital Noise Reduction (DNR) Multiple Chroma an
D7810HG D7810HG	NEC	DIP		If the BYTE pin is set at logic 0, the device is
D7811CW D7811CW	NEC	DIP64	04+/05+/06+/07+	board, minimum creepage and clearance requiremen
D7811CW-603 D7811CW-603	TOSHIBA	DIP64	07+	Figure 1 shows a simpliﬁed schematic of t
D7811G D7811G	NEC			The three transmitter operating modes C transmit
D7811G-315 D7811G-315	NEC	STK	2004+	A common method of measuring temperature is to e
D7811G391 D7811G391	NEC			When T1 is set to logic 1, the programmable divi
D7811G-502 D7811G-502	NEC	STK	2004+	f1 This value can change due to the switching fr
D7811GH D7811GH				Lead temperature 1,6 mm (1/16 inch) from case fo
D7811H-071 D7811H-071	NEC	96+	PDIP64	(1) The DW, PW and DSH packages are available ta
D7811H-122 D7811H-122	NEC		DIP	Min Typ Max Min Typ Max UnitsTest Conditions 32
D7811HCW D7811HCW	NEC	DIP	05+	x IFAVM rating includes reverse blocking losses
D7811HCW/652 D7811HCW/652	NEC	DIP	93+	The basic unit of logic on the ispLSI 2096VL dev
D7811HCW-628 D7811HCW-628	TOSHIBA	DIP64	07+	The control input pin of the regulator. This pin
D7811HCW-636 D7811HCW-636	294	NEC	93+	BUS OPERATIONS There are five standard bus oper
D7811HCW-656 D7811HCW-656	TOSHIBA	DIP64	07+	The maximum value of the temperature coefficient
D7811HG D7811HG			94	microcontroller. Many common microcontrollers h
D7811HG-049 D7811HG-049	NEC	92+	DIP	The ISL6208 is a high frequency, dual MOSFET driv
D78134 D78134	NEC	SMD		Note 6: Junction to ambient thermal resistance (n
D78134AGF D78134AGF	NEC	QFP	QFP	3.3V tolerant input for CPU frequency selec
D7814CW-723 D7814CW-723			93	Terminator technology supports on-chip parallel
D7815 D7815	NEC	TO-220	93+	c) Use any convenient method of interconnection a
D7821 D7821				n 1 µs instruction cycle time n Twelve mu
D78210CW D78210CW	NEC	94+	DIP	Limited by T Jmax , see Fig.12a, 12b, 15, 16 for
D78212CW D78212CW	NEC	DIP64	04+/05+/06+/07+	Note 2: The Absolute Maximum Ratings are those va
D78212CW-673 D78212CW-673	NEC		04+	TELEFILTER GmbH Potsdamer Straße 18 D 14
D78212GC526 D78212GC526	NEC	QFP-64	00	VIN = 3.4V VIN = 3.4V or VIN = GND, OE = GND,
D78213 D78213	NEC		96+	Maximum Repetitive Reverse Voltage Average Rect
D78213CW D78213CW	NEC	DIP	06+	The improvements in the DG411/883 series are mad
D78213GC D78213GC	NEC	QFP80		Employing NPT technology, Fairchilds AND series o
D78213GJ D78213GJ	NEC		06+	(1) The minimum DC input voltage is C0.5V. Durin
D78213GQ D78213GQ	NEC	SOP		† TPS3106E09 and TPS3110K33 will be availa
D78213L D78213L	NEC	PLCC		New techniques such as Wavelength Division Multi
D78214CW D78214CW	NEC	DIP64	04+/05+/06+/07+	Dual 250 mA High-Performance RF LDOs Available i
D78214CW(A) D78214CW(A)	NEW	DIP-64	93+
D78214CW(A)986 D78214CW(A)986
D78214CW(A)M21 D78214CW(A)M21				Set VDD above the start threshold before setting
D78214CW713 D78214CW713				FEATURES Single-Supply Operation: 7 V to 16 V
D78214CW-C11 D78214CW-C11			95	The conditional skip is activated by instruction.
D78214CW-F96 D78214CW-F96	NEC	DIP-64P		The 16-Mbit Flash is organized as 1,048,576 word
D78214CW-G10 D78214CW-G10	NEC	DIP	06+	These octal buffers and line drivers are designe
D78214CWG87 D78214CWG87				n Ultra-Fast transient response n Operating fr
D78214CW-M42 D78214CW-M42	33	NEC	00+	An output capacitor is required to maintain regu
D78214GC D78214GC	NEC	QFP64		In addition to the standard output configuration
D78214GC-227 D78214GC-227	NEC	QFP	1998	This pin establishes the reference current for th
D78214GC-401 D78214GC-401	NEC	QFP	07+/08+	The HYB/E 25L256160AC Mobile-RAMs are a new gene
D78214GC468 D78214GC468	NEC	QFP	07+/08+	Case: JEDEC TO-220AC, ITO-220AC & TO-263AB m
D78214GC-468 D78214GC-468	NEC	QFP	1996	To reset the VTRIP voltage, apply at least 3V to
D78214GCK39 D78214GCK39				Type 1 Configuration Access C If the Bus Number f
D78214GJ D78214GJ	NEC	STK	2004+	The configuration bits work by acting as control
D78214L-804 D78214L-804	NEC		PLCC68	JEDEC standard 3.3V power supply LVTTL compatibl
D78217GC D78217GC	NEC	QFP64		The D78217GC is an ultrahigh-speed, 12-bit digit
D78218ACW D78218ACW	NEC	DIP64	04+/05+/06+/07+	The factory pre-set output voltage of Power Tren
D78218GC-532 D78218GC-532	NEC	QFP	07+/08+	• Access times of 70, 85 ns • CMOS
D7821CW D7821CW	NEC	00+	DIP-64	The receive path consists of a programmable ampl
D7821CW713 D7821CW713				5. This product is not designed to be radiation
D78220GJ D78220GJ	NEC	QFP	07+	Note 13: Differential gain and differential phase
D78220GU D78220GU				Bits 7-4 are the device type and should be set t
D78220L D78220L	NEC	PLCC	02+	These dual monolithic silicon Zener diodes
D78224 D78224	NEC		PLCC	The attached datasheets are provided by SA
D78224GJ-533 D78224GJ-533	NEC	PLCC	2006	HIGH PERFORMANCE • Polynomial complies to
D78224L D78224L	NEC	PLCC
D78224L022 D78224L022				- Updated info for SMRAM3P5K2E in device memory
D78233GC D78233GC		QFP-80	00+ original	A single PGOOD signal is issued when soft-start i
D78233GJ D78233GJ	NEC	QFP92	08+	To prevent data corruption and inadvertent write
D78233LQ D78233LQ	NEC	PLCC84	03/+04+	The big advantage of this approach compared to a
D78234 D78234	NEC	QFP	03/+04+	an active LOW parallel enable (PE) input. When P
D78234GJ D78234GJ	NEC		QFP	2. When using this product, please observe the ab
D78234GJ-536 D78234GJ-536				DC bus capacitor filter with NTC inrush
D78237GC D78237GC	NEC	2007		In addition, the TSC80C31/80C51 has two softwar
D78237LQ50 D78237LQ50	NEC	PLCC	02+	Licensed CMOS 765B Floppy Disk Co
D78238LQ D78238LQ	NEC		07+	also at ANT1/ANT2 High Output Power (8.0 dBm) wi
D782C D782C				Note 6: If the TO-263 or TO-252 packages are used
D78310 D78310	NEC		798	Maximum Average Forward Rectified Current @TA =
D78310ACW D78310ACW	NEC	DIP	05+	The RC32355 includes a configurable ATM S
D78310AGF D78310AGF	NEC	QFP	QFP	Amplifier-sequenced receiver operation has severa
D78310AGQ D78310AGQ	NEC	DIP	00+	The 4K EEPROM devices require an 8-bit device ad-
D78310AL D78310AL	NEC	PLCC68		XTAL1 and XTAL2 are the input and output, respec
D78310CW D78310CW	NEC	DIP64	04+/05+/06+/07+	A/D converter (sequential transducer)
D78310G D78310G	NEC	QFP64		The waveform of the maximum DC applied voltage is
D78310L D78310L	NEC	PLCC		Preliminary product information describes produc
D78310L(A) D78310L(A)				For the ADS-929, offset adjusting is normally ac
D78312A-614 D78312A-614	NEC	STK	2004+	The transmit section of the CY7B951 contains a P
D78312ACW D78312ACW	NEC		04+	An integrated phase lock loop multiplies the inc
D78312ACW-649 D78312ACW-649				1. Continuous operation with 12 volts or more un
D78312AGF D78312AGF	NEC	QFP64		n Internal comparator with pin selectable 2˚
D78312AGQ D78312AGQ				In addition, the ISD1000A Series has an internal
D78312AL D78312AL	NEC		04+	Connection for the source of the external high-s
D78312AL-807 D78312AL-807	NEC	.		Switching behavior is most easily modeled
D78312CW D78312CW	NEC	DIP64	04+/05+/06+/07+	Red tinted, diffused Green tinted, diffus
D78312CW602-10 D78312CW602-10				Maximum ratings are those values beyond wh
D78312CW-648 D78312CW-648				This supplemental information applies to the GS81
D78320L D78320L	NEC	PLCC	06+	Input / Output port A. Input / Output port B. I
D78320L(A) D78320L(A)	NEC	PLCC68	08+	TOSHIBA is continually working to improve the qua
D78321L D78321L	NEC	PLCC		The receivers double-conversion architecture requ
D78322 D78322	NEC			There are two popular conventions for establishi
D78322GF D78322GF			92	Note 1 Absolute Maximum Ratings are those values
D78322GJ-507 D78322GJ-507				Please read rating and !CAUTION (for stor
D78322L D78322L	NEC		PLCC84	WE is used for data write enable/disable control.
D78322L020 D78322L020	NEC	STK	2004+	Each circuit offers a choice of open-collector o
D78323GJ D78323GJ		QFP74	08+	• Very low dropout voltage: 300 mV typ. (Io
D78323LP D78323LP	NEC	PLCC68	03+	The crystal-based architecture of the MAX7044 eli
D78324L-210FTE D78324L-210FTE	NEC		PLCC68	Notes: 1. For Max. or Min. conditions, use appr
D78328CW D78328CW	NEC	DIP64	04+/05+/06+/07+	The RY/#BY output gives an additional indicator o
D78330GJ D78330GJ		QFP94		length is 24 bits with triangular PDF dit
D78334LQ D78334LQ	N/A	PLCC		The MC54/74F382 performs three arithmetic
D78350GC D78350GC		QFP		As long as the LOCK register is not set, the out
D78350GC-002 D78350GC-002				Pb−Free Packages are Available Low Quiesce
D78352AG117 D78352AG117	NEC	QFP64		A high performance 10 bit on-chip ADC is used to
D78352AG118 D78352AG118	NEC	05+	QFP-64	The LTC®4557 provides power conversion and si
D78352BG-20 D78352BG-20	NEC	QFP64		The microchip is essentially the high eff
D78372GF(A2)-311 D78372GF(A2)-311	NEC	QFP	9716+
D784020GC D784020GC	N/A	N/A	N/A	The JAW050A and JAW075A Power Modules are dc-dc
D784021GC D784021GC	NEC			This advanced BiCMOS design features low operati
D784025GC105 D784025GC105	NEC	QFP-80		mounted on the circuit board). The mechanical di
D784026GC534 D784026GC534	2690
D784031GC D784031GC	NEC	QFP	00+	Data Polling bit (DQ7). During the internal write
D784031GC-8BT D784031GC-8BT	NEC	QFP	00+	Ports • Input/Output Ports: 4 ports (23 te
D784031GK D784031GK				This device provides the necessary clocks for a
D784035GC102 D784035GC102	NEC	QFP64		† Stresses beyond those listed under absol
D784035GC722 D784035GC722				DESCRIPTION The VN920PEP is a monolithic device
D784035GC802 D784035GC802	NEC	99+	TQFP-80P	SUMMARY High-Performance 32-Bit DSPApplications
D784035GC831 D784035GC831	NSEC		98	During the first 30 ms after enabling VCO1 the m
D784035GC899 D784035GC899	NEC	QFP		An exact frequency multiplying ratio ensures bet
D784035GC909 D784035GC909	NEC	QFP	0728vgc+	A VCXO circuit operates by changing the value of
D784036GC711 D784036GC711	NEC		QFP	The advantages of low power consumption, I/O flex
D784037GC117 D784037GC117				0 - 230Vdefined by external PWM control 0.75 hp
D784037GC-117 D784037GC-117	NEC			Notes: 1. For Max. or Min. conditions, use appr
D784044GC(A) D784044GC(A)	2000	NEC	99+	The FM809/810 are supervisor circuits that monit
D784214A191 D784214A191				The ZREF25 design provides a stable voltage wit
D784214A248DS D784214A248DS				FEATURES High Slew Rate: 10 V/ s Min Fast Settl
D784214AGF503 D784214AGF503	NEC			System oriented features for mobile, graphics an
D784214AGF507 D784214AGF507	NEC			PROPAGATION DELAY TIME: tPD = 40ns (TYP.) at V
D784214AGF-515 D784214AGF-515	NEC	QFP	2001	The PCM1680 is a CMOS monolithic integrated cir
D784214GF D784214GF	1200	NEC	98+	TI does not warrant or represent that any licens
D784214GF519 D784214GF519	NEC			The PI3C16215 is a 20-bit bus switch with low ON-
D784214GF529 D784214GF529	NEC	QFP	1999	HR300 DC/DC converters use thick-film hybrid man
D784214GF-QFP-100 D784214GF-QFP-100	NEC			When the DRAIN pin of the LT4250L is above VEE by
D784214YGC-113-8EU D784214YGC-113-8EU				The TLC372 has internal electrostatic discharge
D784215GC-094 D784215GC-094	NEC	QFP	04+	1. When UB and LB are in select mode (low), I/O 0
D784215GC095 D784215GC095	NEC			4.4.2 Group B inspection. Group B inspection sha
D784215GC103 D784215GC103				Notes: 1. The algebraic convention, where the m
D784215GC130 D784215GC130				The RF5189 has primarily been characterized with
D784215GC-131 D784215GC-131	NEC	QFP	04+	The pulse-skip regulation mode minimizes operati
D784215GF517 D784215GF517	NEC	QFP-100	99+	DESCRIPTION Positive power supply for the chip
D784215GF527 D784215GF527				NEC's MC-7831-HA is a GaAs Multi-Chip Module des
D784215GF-527 D784215GF-527	NEC			BACKPLANE TEST DATA OUTPUT: This output drives t
D784215GF542 D784215GF542	NEC	QFP-100	99+	Eight GLBs, 16 I/O cells, two dedicated inputs a
D784215GF-QFP-100 D784215GF-QFP-100	NEC			The Direct Rambus RIMM module consists of 288 Mb
D784216-511 D784216-511	NEC	2007		A refresh operation must be performed at least o
D784217AGF501 D784217AGF501	NEC	QFP	0105+	The conditional skip is activated by instruction
D784217AGF-518-38A D784217AGF-518-38A				Note: 1. Enhancement mode technology employs a
D784217AGF-518-3BA D784217AGF-518-3BA	YAMAHA			Built-in buzzer driver (2kHz/4kHz) Power down co
D784217GF351 D784217GF351	45	NEC	O4	Transmitter Section The transmitter section inc
D784218-602 D784218-602	NEC	2007		Construction of capacitors: Metallized polypropy
D784218A D784218A	NEC	QFP	99+	The LED oscillator with the NL27WZ04 duel
D784218AGF505 D784218AGF505	NEC			Partial Reset also sets the Read and Write point
D784218AGF525 D784218AGF525				To keep the RC4700s high-performance pipe
D78421AGF507 D78421AGF507	NEC			Note: All devices contains Access.bus (ACB), Clo
D78421AGF-515 D78421AGF-515	NEC	QFP	07+/08+	Terminal nos. 3 and 8 are soft start terminals.
D78421AYGC-113-8EU D78421AYGC-113-8EU				Note 1: Absolute maximum ratings indicate limits
D7844GF-135 D7844GF-135	NEC		97	DESCRIPTION Low cost dual center tap rectifier
D784914AGF D784914AGF				Features 1) Built-in bias resistors enabl
D784915AGF D784915AGF	NEC	97+	TSOP	The slow sweeping of the frequency from preheat t
D784935AGF149 D784935AGF149				Hynix HYMD132G725B(L)8-M/K/H/L series is designed
D784936AGF124 D784936AGF124	NEC	QFP100	04+	SMSC DISCLAIMS AND EXCLUDES ANY AND ALL WARRANTI
D784936AGF146 D784936AGF146	NEC	QFP100	04+	4ž_ÞÐW FUNC [1]‘ôD&Egr
D784936AGF169 D784936AGF169				High-current sink/source 25 mA/25 mA &nbs
D7849H D7849H				Genesis Microchip Inc. reserves the right to chan
D784D38GC305 D784D38GC305	NEC			Maximum ratings are those values beyond which de
D78517GF-241 D78517GF-241	NEC	QFP	07+/08+	s 16/32-bit ARM7TDMI-S microcontroller in a LQFP
D7852GB D7852GB	NEC	TQFP1010-64		The TSOP11..KA1 C series are miniaturized receiv
D7854GC-096 D7854GC-096	NEC	QFP	07+/08+	A. These materials are intended as a reference t
D78600L D78600L	NEC	PLCC		Note 8: CIN, COUT, C1, and C2: Low-ESR Surface-M
D78609 D78609				Max. UnitsConditions CCCVVGS = 0V, ID = 25
D78716GF340 D78716GF340	NEC		96	†For information on tape and reel specific
D789 D789		TO-92M	06+	The CD4512BC buffered 8-channel data selector is
D78901 D78901	N/A	N/A	N/A	The LM2936 ultra-low quiescent current regulator
D789011CT014 D789011CT014	NEC			Note: Definition of I/O column pneumonic on pin d
D789011GT D789011GT	NEC		652	Internal sample-and-hold Internal Reference Ca
D789012 D789012	N/A	N/A	N/A	NOTE: ESD data available upon request. 1. 10H c
D789054GC D789054GC				NOTE: Intersil Pb-free plus anneal products emplo
D7890AL D7890AL	NEC	PLCC		POWER GROUND. Terminals 7 through 17 and
D789166 D789166	NEC	QFP	QFP	3-phase rectifier bridge 3-phase, short circuit
D789188CT001 D789188CT001	NEC	DIP	N/A	Ideal for battery operated applications; the MIC5
D789324 D789324				You can determine the version of a data sheet by
D789352AG107 D789352AG107	NEC		97	One Instruction/Clock Execution Core Clock Rate
D789406-020 D789406-020	NEC	TQFP80	07+/08+	Please read the General Operating Conside
D789406A-020 D789406A-020	NEC	TQFP80	01+	Note: 1. Agilents enhancement mode E-pHEMT &nbs
D789407A D789407A				The 1.25Gbps MAX3264/MAX3268/MAX3768 and the 2.5
D789416 D789416	NEC	00+	QFP	Description The HCPL-90xx and HCPL-09xx CMOS di
D789477GCA15 D789477GCA15	NEC	QFP	2	Notes: 1. Test conditions assume signal transit
D789477GCA26 D789477GCA26				l Up to 2.5 Gbps Bi-directional Data Links l Co
D789477GCA27 D789477GCA27				The Am30LV0064D is entirely command set compati-
D789488GCA23 D789488GCA23	NEC	QFP	03+	All Min/Max characteristics and specifications ar
D789488GCA57 D789488GCA57
D789835GJ D789835GJ	N/A	N/A	N/A	The MSC III is a component of the TV-SAM Feature
D78C10 D78C10	NEC	QFP64		This high voltage MOSFET uses an advanced termina
D78C10ACW D78C10ACW	NEC	DIP	07+	Direct interface to high voltage display Serial
D78C10AGF D78C10AGF		QFP		This is a dual purpose pin. During Master Reset,
D78C10AGQ D78C10AGQ	NEC	DIP-64	03+	Virtex devices feature a flexible, regular archi
D78C10AGQ36 D78C10AGQ36	NEC	DIP64	03+	• Output Voltage Accuracy • Reset Vo
D78C10AL D78C10AL	NEC	PLCC		PCM input C 102 dB of Stopband Attenuation C Su
D78C10C D78C10C				In Power-Save mode, HCLK Clock is driven by Slow
D78C10CW D78C10CW	NEC	DIP	07+	The HT48CA0 is an 8-bit high performance RISC-l
D78C10CW/ACW D78C10CW/ACW				n Generates all clock frequencies for Pentium (I
D78C10G D78C10G	NEC	QFP	04+	• Diode noise level of this series is appro
D78C10GF D78C10GF	NEC	QFP	QFP	The ZILOG ZHX1810 is a low-profile version of ZiL
D78C10L D78C10L	NEC	PLCC		The BR9080A and BR9016A series are serial EEPROMs
D78C10L(A) D78C10L(A)	NEC	PLCC	00+	Hynix HYMD232646B(L)8-M/K/H/L series is designed
D78C11ACW D78C11ACW	NEC	DIP	06+	DESCRIPTION The SLIC KIT (L3000N/L3092) is a se
D78C11AGF D78C11AGF	NEC	QFP		10-bit ADC -1LSB INL; No Missing Codes -Progra
D78C11AGF-E21 D78C11AGF-E21	NEC	1991	QFP	characteristics enable this device to be used in
D78C11AGQ D78C11AGQ	NEC	DIP64		The device will support SVHS mode for three enco
D78C11CW D78C11CW	NEC	DIP64	04+/05+/06+/07+	The RDRAM architecture enables the highest susta
D78C11CW694 D78C11CW694				Ripple current, less than 100 mΩ equivalen
D78C11G D78C11G	NEC	QFP64		Notes: 1. For Max. or Min. conditions, use appr
D78C12ACN D78C12ACN	NEC		04+	Notes: 1. Test conditions assume signal transit
D78C12ACW D78C12ACW	NEC	DIP64	00+
D78C12ACW-697 D78C12ACW-697	NEC		04+	- Removed all references to XCLKS, since functio
D78C12ACW-F58 D78C12ACW-F58	NEC		O7+	The 80C186EB is the first product in a new gener
D78C12ACW-F73 D78C12ACW-F73				Signal Operation tpd = 4.9 ns Max at 3.3 V Suit
D78C12AGF-317 D78C12AGF-317	NEC		O7+	Figure 1 shows the equivalent circuit for the OT
D78C12AGF-E45-3BE D78C12AGF-E45-3BE	1002
D78C12AGF-E48-38E D78C12AGF-E48-38E	NEC	QFP	97	(1) An export permit needs to be obtained from t
D78C12AGQ D78C12AGQ	NEC		DIP	(2) When the receiver will be used as the wire-le
D78C12AGQA04 D78C12AGQA04	NEC	STK	2004+	The S29C51004T/S29C51004B is a high speed
D78C12AGQ-A04 D78C12AGQ-A04			96+	EWC: Event and Waveform Controller • Compat
D78C12AGQA67 D78C12AGQA67				The output drivers in the HIP6602B have the capac
D78C12AGQ-A69 D78C12AGQ-A69	161	NEC	99+	The ISSI 4400 Series is a 4,194,304 x 4-bit high
D78C12AGQA82 D78C12AGQA82				FEATURES • SMD Versions of SFH610, 615, 61
D78C12AGQ-B01 D78C12AGQ-B01				NOTES: 1. At f = fMAX, address and control lines
D78C14 D78C14	NEC	QFP	N/A	A: The value of R JA is measured with the device
D78C14ACW D78C14ACW	NEC		04+	The DSP block specifications are as follows: Da
D78C14-B82 D78C14-B82	NEC	STK	2004+	The CD54AC257/3A and CD54ACT257/3A are quad 2-in
D78C14CW D78C14CW	NEC	DIP64	04+/05+/06+/07+	• SuperWIDE™ HIGH-DENSITY IN-SYSTEM
D78C14CW008 D78C14CW008	NEC	DIP	98+	The design of the main power inductor in a switc
D78C14CWG09 D78C14CWG09	NEC	DIP	98+	International Rectifier's D78C14CWG09 is a state
D78C14CW-G09 D78C14CW-G09				1. ICC is dependent on output loading when the d
D78C14CWM23 D78C14CWM23			03+	The LM393 series are dual independent pre
D78C14CWM66 D78C14CWM66	NEC	DIP	01+	Single amplifiers are available in SOT-23 package
D78C14CW-M66 D78C14CW-M66				Luma Output / Red Output A 75 Ω terminatio
D78C14CWN97 D78C14CWN97	NEC	DIP	99+	Meets or Exceeds the Requirements of ANSI TIA/EI
D78C14CW-N97 D78C14CW-N97				The NCP5314 provides full−featured
D78C14CW-T40 D78C14CW-T40				The MAX6902 SPI™-compatible real-time clock
D78C14G D78C14G	NEC	QFP64		ADV/LD is a synchronous input that is used to loa
D78C14G(A) D78C14G(A)	NEC		90+	• High-speed switching (tstg: storage time/t
D78C14G(A)S19 D78C14G(A)S19	NEC		DIP	Note 3: The maximum power dissipation must be der
D78C14G-15 D78C14G-15	NEC	STK	2004+	The Cs capacitor performs the charge integration
D78C14GB95 D78C14GB95
D78C14GF D78C14GF	NEC		06+	Note 1. For current consumption, it is assumed th
D78C14GFE72 D78C14GFE72				Figure 5 shows the effects of a fast transient on
D78C14GFE94 D78C14GFE94				The 3-state output buffers are controlled by a 2
D78C14G-J45-36 D78C14G-J45-36	NEC		9729+	Advantages n Replace expensive hybrid and modul
D78C14G-J48 D78C14G-J48	NEC			PRODUCT PREVIEW information concerns prod
D78C14L D78C14L		PLCC		Tachyon TL provides the highest levels of conc
D78C170 D78C170			99+	NOTES: (1) Calibration can minimize these errors
D78C17GF D78C17GF	NEC	QFP	07+	Interrupts • 12 sources 8 vectored interru
D78C17GQ D78C17GQ	NEC	DIP64		(5-V Input and Output Voltages With 3.3-V VCC)
D78C18CW D78C18CW				Short Circuit Protective Function (SC) : SC pro
D78C18CWF10 D78C18CWF10				The SPI protocol is controlled by op-codes. Thes
D78C18GQ D78C18GQ				When High, this input holds the address counter
D78CG14E D78CG14E				†These options are available on some devic
D78CJOGF D78CJOGF				The counter is loaded digit by digit correspondi
D78CP14CW D78CP14CW			95	Reference Inputs The voltage differential betwe
D78CP14DW D78CP14DW	NEC		97/99+	Bild / Fig. 8 W3 C - Dr eiphasen -We chselwegsch
D78CP14G D78CP14G	NEC	2007		* All specs and applications shown above subject
D78CP14GF D78CP14GF	NEC	QFP-64	N/A	The NCV8800 is an automotive synchronous
D78CP14L D78CP14L	NS		03+	The drain pins are designed to connect directly t
D78CP18CW D78CP18CW	NEC	DIP64	95+	Direct interface to high voltage display Serial
D78D058YGC D78D058YGC	NEC		99	The VI input monitors the bus-side voltage for b
D78E226GF-023 D78E226GF-023				Specified Performance High Speed Mo
D78F0034A D78F0034A	NEC	QFP	2004	dsPIC, dsPICDEM.net, ECONOMONITOR, FanSense, Fl
D78F0034ACN D78F0034ACN	NEC	04+	DIP	Once the initial conditions have been satisfied,
D78F0034ACW D78F0034ACW	NEC	DIP	99+	OV (Pin 2): Analog Overvoltage Input. When OV is
D78F0034AGC D78F0034AGC		QFP64	08+	Four stereo 24-bit multi-bit sigma delta DACs are
D78F0034AGK D78F0034AGK	NEC	QFP	QFP	When T1 is set to logic 1, the programmable divi
D78F0034AY D78F0034AY				Collector-Emitter Voltage (R BE 0 Ω) Col
D78F0034AYG D78F0034AYG	NEC	STK	2004+	Serial configuration control input. This inputs
D78F0034AYGC D78F0034AYGC	NEC	QFP	01/	Eight of the macrocells (I/OF0CI/OF7) have two
D78F0034AYGK D78F0034AYGK	36	NEC	O3	The V62C51864 is a 65,536-bit static rand
D78F0058GC D78F0058GC	NEC	QFP	07+	Flexibly organized as 32k x 32, 64k x 16 or 128
D78F0058YGC D78F0058YGC		01+	QFP-M80P	Stresses beyond those listed under Absolute Maxi
D78F0078GC D78F0078GC	NEC	QFP	2001	The A-to-B enable (CEAB) input must be low to e
D78F0078GK D78F0078GK				Main CLK(Hz)Under 3.58M7.16M10.74M14.3M &
D78F0338GC D78F0338GC		QFP		The HYM72V64C756B(L)T4 -Series are high s
D78F0511 D78F0511				Command Structure There are six commands called
D78F0513 D78F0513				For Surface Mount Applications Protection from s
D78F0536 D78F0536	NEC	TQFP64	06+	Notes: 1. Permanent damage may occur if any of t
D78F058FGC D78F058FGC	NEC	2007		A low-impedance model is recommended for
D78F078GC D78F078GC	NEC	2007		3 5 LOOPBACK FUNCTIONS Logic high at loopback in
D78F0822BGF D78F0822BGF	NEC		0606+	SNR = 90 dB in 150 kHz bandwidth (to Nyquist &n
D78F0833YGC D78F0833YGC	NEC	TQFP	04+	The AT28C010-12DK is a high-performance Electric
D78F0835 D78F0835		TQFP1414-100
D78F0948GF D78F0948GF	NEC	QFP	07+	• ML22Q54 The ML22Q54 is a speech sy
D78F4046GC(A) D78F4046GC(A)	57	NEC	99+	The PCF85xxC-2 is a family of floating gate Elec
D78F4216AGC D78F4216AGC	NEC	2007		connected to common Ports Dn) when the nIN inpu
D78F4216AYGC D78F4216AYGC	NEC	2007		Notes: 1. V = Valid , x = Dont Care, L = Low Le
D78F4216GC D78F4216GC	NEC	STK	2004+	Writing to the SRAM is accomplished when the chi
D78F4216GF D78F4216GF	NEC	STK	2004+	− Active Mode: 160 µA at 1 MHz, 2.2 V
D78F4216YGC D78F4216YGC	NEC	STK	2004+	Note: All devices contains Access.bus (ACB), Clo
D78F4218AGC D78F4218AGC	NEC	2007		To drive the device from an external clock sourc
D78F4218AGF D78F4218AGF			00	Analog circuit power terminals. A combination of
D78F4218GC D78F4218GC	NEC	2007		When the X-rays emitted from the X-ray generator
D78F4225GC D78F4225GC				NOTES: 1. Stresses beyond those listed may caus
D78F4928GF D78F4928GF				Notes: 1. All dimensions are in millimeters (in
D78F9026A D78F9026A	NEC	TQFP1010-44	00+	Low Quiescent Current 5.6µA (typical) Wide
D78F9076 D78F9076	31	NEC	O3	n Internal Start-up Bias Regulator n 3A Compoun
D78F9088 D78F9088		SSOP	05+	Note 1) The specified condition Tj = 25C means t
D78F9116A D78F9116A	NEC	9849		These chips, properly assembled, display charact
D78F9116AC D78F9116AC	NEC	DIP28	02+	The accuracy of a successive approximation A/D c
D78F9177 D78F9177	NEC	0729+;07+/08+		The CX65105 is internally matched for optimum lin
D78F9177A D78F9177A	ITE	QFP	03+
D78F9177AY D78F9177AY	NEC		03/04+	1) CPD is defined as the value of the ICs intern
D78F9177CU D78F9177CU				Over Vin range Surface temperature of module, c
D78F9189CT D78F9189CT		DIP		The CPU features two sets of functional units. E
D78F9306GK D78F9306GK
D78F9418 D78F9418	NEC	0230+	TQFP	Control DC input for removing the DC offset gener
D78F9418A D78F9418A				Double Data Rate ( DDR II ) Applications Spread
D78F9478GC D78F9478GC				FEATURES Laser Trimmed to High Accuracy:
D78F9801 D78F9801	NEC	0729+		Voltage on PIO Pin, Relative to VSS Voltage on A
D78IIHG-235-36 D78IIHG-235-36	NEC	STK	2004+	Operates from 2.7V to 44V Over-The-Top®: Inp
D78O98GC015 D78O98GC015	NEC	QFP/80	98+
D78P014CW D78P014CW			97	NOTES: 1. See Test Conditions under TEST CIRCUI
D78P014GC D78P014GC	NEC	QFP64		These products are not designed for use in life s
D78P014TGC D78P014TGC				Switch (DX). It is pin compatible with the MT8980
D78P014YCW D78P014YCW	NEC		9726	One bit of data is shifted into the internal shif
D78P014YG D78P014YG	N/A	QFP		C. These materials are solely intended for a cus
D78P014YGC D78P014YGC		QFP		Ref input is 5V tolerant 4 pairs of programmable
D78P018 D78P018				1. Set the heater block temperature to 260C +/-
D78P018FCW D78P018FCW				† Vres is the minimum input voltage for a
D78P018FGC D78P018FGC	NEC	.		The PIC12C67X devices have 128 bytes of RAM, 16
D78P018FYCW D78P018FYCW				Bidirectional 4-bit input/output ports. Schmitt
D78P018FYGC D78P018FYGC	NEC			Teletext 1.5 and 2.5, Closed-Caption, VPS and &
D78P0208GF D78P0208GF				This is the feedback pin of the device. The feed
D78P0308GC D78P0308GC				3.2 KSO8~15 These pins are direct output from th
D78P0308GF D78P0308GF				Fully Integrated xVCC and xVPP Switching xVPP Pr
D78P0308YGC D78P0308YGC	NEC	TQFP1414-100		The onboard bandgap reference is stable with tem
D78P044GF D78P044GF				Up to 16Kbytes program memory Data RAM: up to
D78P048AGF D78P048AGF	NEC	QFP	97+	Note 1) The specified condition Tj=25˚C mea
D78P04GC D78P04GC				These full reels are individually labeled and pl
D78P054 D78P054	NEC	QFP	07+/08+	HEAT SINKING In addition to assuring that an ap
D78P054GC D78P054GC	NEC	QFP80		The READ instruction outputs serial data on the
D78P054GK D78P054GK	NEC	QFP	2005	These ﬂip-ﬂops have independent J,
D78P054GK-BE9 D78P054GK-BE9				The information in this document is preliminary
D78P054KK D78P054KK				Note 7: For the purpose of specifying deserialize
D78P058FGC D78P058FGC	NEC	QFP84	08+	Auto Memory Store Function This function automat
D78P058G D78P058G				Normally the signal source for the LM1881 is ass
D78P058GC D78P058GC	NEC	QFP	QFP	This family is a 16M bit dynamic RAM organized 4,
D78P058GJ D78P058GJ	NEC	QFP80	08+	Each macrocell has five dedicated product terms
D78P058YGC D78P058YGC	NEC	QFP	08+	Current sensing is done in this case by a
D78P064BGF D78P064BGF	NEC	QFP	99+	The devices also have 96 I/O cells, each of whic
D78P064GC D78P064GC				• High-speed access time: 10, 12, 15, and
D78P064GF D78P064GF		QFP		only when the reference frequency divided by this
D78P064LQ D78P064LQ	NEC	PLCC	02+
D78P078GC D78P078GC	NEC	2007		These Motorola accelerometers contain an
D78P078GF D78P078GF	NEC	QFP100		Out Short Circuit to GND Duration (VIN< 12V)..
D78P083CU D78P083CU	NEC	02+	DIP42	This Guide contains the companys copyright and k
D78P083GB D78P083GB	NEC
D78P108BCW D78P108BCW	NEC		04+	Note 1: VOUT+1V< VIN & 2.5V< VIN <
D78P134-007 D78P134-007				(0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V)
D78P134-074 D78P134-074				The DS1668/DS1669 Dallastats are controlled thro
D78P134GF D78P134GF	NEC		91+	No output filter required for inductive loads E
D78P14GF D78P14GF	NEC		96+	The IC must be equipped with external RC circuit
D78P18CW D78P18CW				TMIN = −40C, TMAX = +85C. Typical values a
D78P214CW D78P214CW	NEC	2007		Functional Tests (In Freescale Test Fixture, 50 o
D78P214CW(A) D78P214CW(A)	NEC	DIP-64	93+	Note 5: Each digital input includes a small posit
D78P214DW D78P214DW
D78P214GC D78P214GC
D78P214L D78P214L	NEC		PLCC68	In the test mode, the normal operation of the SC
D78P218ACW D78P218ACW	NEC	DIP64		Constructed with the Intersil Rad-hard Silicon Ga
D78P218AGC D78P218AGC	NEC	TQFP	05+	The circuits contain only surface mountable devic
D78P224GJ D78P224GJ				When CS is high, or UB and LB are high, the devi
D78P224I D78P224I	NEC		06+	The 40L..CW center tap Schottky rectifier has bee
D78P224L D78P224L	NEC	PLCC84	03/+04+	In order to provide a regulated output voltage o
D78P238GJ D78P238GJ		QFP94		high di/dts. The diodes negative di/dt during ta
D78P238KF D78P238KF	NEC	1991		When the Deserializer PLL locks to the embedded
D78P238LQ D78P238LQ	NEC			• Burst Mode Operation to Reduce the Power
D78P312ACW D78P312ACW	NEC	DIP	07+	The logic enable disables the power switch, the
D78P312AL D78P312AL	NEC	PLCC	00+	Maximum storage capacity is 245 760 words by 12
D78P312AR D78P312AR	NEC	PLCC		Applications for these amplifiers include Portab
D78P322KD D78P322KD				line is at logic low and the data is latched w
D78P322L D78P322L	NEC		07+	Use NC Relays for power control up to 5 A or T
D78P324LP D78P324LP	NEC	PLCC		HUSH LITTLE BABY LITTLE STAR LONDON BRIDGE
D78P328CW D78P328CW	NEC	DIP	96+	This document is a general product description an
D78P334LQ D78P334LQ	NEC	PLCC	02+	The data will be transmitted in the silent period
D78P368GF D78P368GF	NEC	QFP	QFP	Excellent IFT stabilityIR emitting diode
D78P4026GC D78P4026GC	NEC	QFP80		The HSMx-S670 is the industry standard 2.0 x 1
D78P4218AGC D78P4218AGC	NEC		03+	The A-to-B enable (CEAB) input must be low to &
D78P4908GF D78P4908GF	NEC	QFP	98	The input for the integrator-feedback buffer A7
D78P612AL D78P612AL	NEC
D78P7012GC D78P7012GC	NEC	QFP100		The e5130 contains 4 independent driver outputs
D78P9014 D78P9014	N/A	N/A	N/A	VARIABLE DELAY MODE The delay in Variable
D78P9014CT D78P9014CT	NEC	DIP
D78P9014GT D78P9014GT	NEC	SOP28W	2007+	Note(READ CYCLE): 1. tCHZ and tOHZ are defined a
D78PG11E D78PG11E				The ISL6118 is a fully independent dual channel o
D78PO18FYCW D78PO18FYCW				The HAL 805 is a recent member of the Micronas f
D78PO64GC D78PO64GC				This chip, when properly assembled, displays cha
D78PQ58GC D78PQ58GC				MAX 7000A devices use CMOS EEPROM cells to imple
D78PS014CT D78PS014CT

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