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Operating Voltage Breakdown Voltage Active Diameter Responsivity at 1300 nm Ceramic (D1)/TO-18 (D2) Fiber (D6)/FC (D4)/ST (D3)/SC (D5)1 Responsivity at 1550 nm Ceramic (D1)/TO-18 (D2) Fiber (D6)/FC (D4)/ST (D3)/SC (D5)1 Dark Current Spectral Noise Current (10 kHz, 1.0 Hz) Capacitance at VR = VOP (typ)
nous static RAM designed to provide a burstable, high- performance, secondary cache for the Pentium™, 680X0™, and PowerPC™ microprocessors. It is organized as 65,536 words by 64 bits, fabricated with ISSI's advanced CMOS technology. The device integrates a 2-bit burst counter, high- speed SRAM core, and high-drive capability outputs into a single monolithic circuit. All synchronous inputs pass through registers controlled by a positive-edge-triggered single clock input.
Operating Voltage Breakdown Voltage Active Diameter Responsivity at 1300 nm Ceramic (D1)/TO-18 (D2) Fiber (D6)/FC (D4)/ST (D3)/SC (D5)1 Responsivity at 1550 nm Ceramic (D1)/TO-18 (D2) Fiber (D6)/FC (D4)/ST (D3)/SC (D5)1 Dark Current Spectral Noise Current (10 kHz, 1.0 Hz) Capacitance at VR = VOP (typ)
nous static RAM designed to provide a burstable, high- performance, secondary cache for the Pentium™, 680X0™, and PowerPC™ microprocessors. It is organized as 65,536 words by 64 bits, fabricated with ISSI's advanced CMOS technology. The device integrates a 2-bit burst counter, high- speed SRAM core, and high-drive capability outputs into a single monolithic circuit. All synchronous inputs pass through registers controlled by a positive-edge-triggered single clock input.
| Parr number/PDF | Mfg | Pack | D/C | Descrpion |
27M2 27M2  |
TI | SOP8 | 04+ | Drain-to-Source Breakdown Voltage 200 Gate Thre |
| 27M20KMGY 27M20KMGY |
The HEF4049B provides six inverting buffers with | |||
| 27M21 27M21 |
SOP-8 | Positive input supply voltage. This pin is conne | ||
| 27M24 27M24 |
NS | 84+ | DIP16陶瓷 | The PCM58P accepts TTL-compatible logic input le |
| 27M28C 27M28C |
TI | SOP | 99+ | 1. Storage Under normal circumstances, storage |
| 27M28I 27M28I |
The devices operate in the newly developed LinSk | |||
| 27M2AI 27M2AI |
TI | SOP8S | 2007+ | In addition to the power-on-reset and undervolta |
| 27M2BC 27M2BC |
TI | SOP | 0210+ | Notes: (1) OIP3 is measured with two tones at 1 |
| 27M2BI 27M2BI |
N/A | 01+ | SOP-8 | B. Panasonic is endeavoring to continually impro |
| 27M2C 27M2C |
ST | SOP8 | 00+ | DC ACCURACY Integral Linearity Error Different |
| 27M2C.I 27M2C.I |
TI | SOP8S | 2007+ | Some confusion exists in the area of defining an |
| 27M2I 27M2I |
ST | SOP8 | Notes: 1. The algebraic convention, where most | |
| 27M2LCP 27M2LCP |
A latch is a device where the operate po | |||
| 27M4 27M4 |
ST | 06+ | 500 | 3. Dropout Voltage is defined as the input to out |
| 27M41 27M41 |
99+ | The 833C/W for the SOT-563 package assume | ||
| 27M4AC 27M4AC |
TI | 2007 | Maximum ratings are those values beyond wh | |
| 27M4AC.C 27M4AC.C |
TI | SOP14S | 2007+ | *CPU: PGA 478 for Intel Pentium 4 CPU with Hyper |
| 27M4AC/D 27M4AC/D |
||||
| 27M4AI 27M4AI |
ST | © 2003 Xilinx, Inc. All rights reserved. Al | ||
| 27M4AO 27M4AO |
MOT | SMD | 99+ | The HYM72V64636H(L)T8 Series are 64Mx64bits Synch |
| 27M4BC 27M4BC |
SOP | SOP | Power dissipation at 25ºC: 1.0 watts (also | |
| 27M4C 27M4C |
ST | 2007 | The COPSAx Rom based and OTP microcontrollers ar | |
| 27M4I 27M4I |
N/A | N/A | N/A | PACMAN™ POP™ Power247™ Power |
| 27M7 27M7 |
TI | SOP8 | MTV038 is designed for CRT/LCD monitor ap | |
| 27M7C 27M7C |
TI | SOP8 | 04+ | The built-in LDO can be used for a second output |
| 27MHZ 27MHZ |
NIHON | 2520 | 05+ | • Clock frequency: 166, 143, 100 MHz R |
| 27MHZ30PPM10PF(PB-FREE) 27MHZ30PPM10PF(PB-FREE) |
Note 2: Absolute Maximum Ratings indicate limits | |||
| 27MHZAMP-CAM 27MHZAMP-CAM |
This is the forward transconductance of the devi | |||
| 27MHZRFAMP 27MHZRFAMP |
This data sheet includes device-specific informa | |||
| 27MHZRFAMP-A 27MHZRFAMP-A |
The device features fully programmable R and N c | |||
| 27MHZRFAMP-E 27MHZRFAMP-E |
The S29C51004T/S29C51004B is a high speed | |||
| 27MHZRXANT 27MHZRXANT |
a. Absolute maximum continuous ratings are those | |||
| 27MHZRXOSC2 27MHZRXOSC2 |
Differential analog Inputs. With a 1.0V referenc | |||
| 27MSP00375 27MSP00375 |
OUTPUT VOLTAGE RANK LIST Device NameVOUTDevice | |||
| 27MSP00875 27MSP00875 |
NOTES: 1. Dimensions are in inches. &nbs | |||
| 27MSP01000 27MSP01000 |
VHF Synthesizer and Oscillator: The on-chip VHF | |||
| 2.000000MHZ 2.000000MHZ |
UTECH | N/A | 08+ | Both circuits have three binary select inputs (A |
| 2.000000MHZ-IQXO-350C 2.000000MHZ-IQXO-350C |
||||
| 2.000M 2.000M |
Enhanced page-mode operation allows faster memor | |||
| 2.000MHZ 2.000MHZ |
The SP3222H and the 3232H are 2 driver/2 receiver | |||
| 2.00E11 2.00E11 |
All inputs to the 626162 SDRAM are latched on th | |||
| 2.00E18 2.00E18 |
The 3B Series of Signal Conditioning I/o Subsyst | |||
| 2.0122E11 2.0122E11 |
Notes: 1. VDD = 5.0 V. 2. See Thermal Consi | |||
| 2.01E13 2.01E13 |
The JAW050A and JAW075A Power Modules are dc-dc | |||
| 2.01E18 2.01E18 |
MILLER ENCODING: If the data state is a 1, there | |||
| 2.03E11 2.03E11 |
The MAX5631/MAX5632/MAX5633 are 16-bit digital-to | |||
| 2.04051E11 2.04051E11 |
The ML66525 family devices support clock gear fu | |||
| 2.048 2.048 |
UNKNOWN | 07+ | Absolute maximum ratings indicate limits beyond w | |
| 2.0480B 2.0480B |
Three types of memory are provided on the DS2751 | |||
| 2.048MHZ 2.048MHZ |
ITT | A 2-to-1 multiplexer is provided on each fi |
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