| Parr number/PDF | Mfg | Pack | D/C | Descrpion |
| A020 A020 |
ST | 06+ | The TLV320AIC32 is a low-power stereo-audio code | |
| A020045960-01 A020045960-01 |
The BS616LV1013 is a high performance, very low p | |||
| A020045960-02 A020045960-02 |
The 10ETF..S fast soft recovery QUIETIR rectifie | |||
| A0201D A0201D |
DIP8 | 07+ | 6. Automatic insertion To maintain the internal | |
| A02043 A02043 |
The DEU is used for bulk data encryption. It can | |||
| A0204C13K20B1A A0204C13K20B1A |
VIN shunt voltageIVIN = 10 mA15.0 Line r | |||
| A0204C200K0B1A A0204C200K0B1A |
If you have any marketing or sales questions, ple | |||
| A0205709 A0205709 |
Many of the applications described below apply to | |||
| A0207411 A0207411 |
High Power Switching Regulator Controller for DD | |||
| A021 A021 |
The CPU provides fast instruction (up to 10 MHz | |||
| A0211 A0211 |
The Fault output is latched high when a short-ci | |||
| A02358MYM A02358MYM |
The A02358MYM VGA image sensor produces raw VGA | |||
| A0243251P A0243251P |
Notes: 1: VC1,VC2, VM12 = 3.3V, TC = 25C, PA is | |||
| A0243582 A0243582 |
Todo el material que no es necesario fu retirado | |||
| A0244565 A0244565 |
Absolute Maximum ratings are those values beyond | |||
| A0244608 A0244608 |
This document is a general product description an | |||
| A0245923 A0245923 |
The specifications on this data book are only gi | |||
| A0246593 A0246593 |
When SEL is a logic low, the device is in the re | |||
| A0247662 A0247662 |
Capacitor connection for short-circuit protectio | |||
| A0249524G08 A0249524G08 |
||||
| A024HA0.2A-E A024HA0.2A-E |
Hynix HYMD232726B(L)8-M/K/H/L series is unbuffere | |||
| A024HA0.2A-E-W A024HA0.2A-E-W |
Memories C 16K to 60K bytes Program memory &nb | |||
| A024HA0.2B-W A024HA0.2B-W |
NOTE: 1. Permanent device damage may occur if A | |||
| A024HA0.4A-C-W A024HA0.4A-C-W |
N/A | Multi-channel selector Lch input Input selector | ||
| A024HA0.4A-E A024HA0.4A-E |
N/A | N/A | N/A | The IGBT technology is the key to International |
| A024HA0.4B-W A024HA0.4B-W |
Burst Write Accesses The CY7C1350G has an on-chi | |||
| A024HA0.75A-5-W A024HA0.75A-5-W |
N/A | Ear Audio Out: An audio output of the Rx path (o | ||
| A024HA0.75A-B-W A024HA0.75A-B-W |
N/A | ESD damage can range from subtle performance deg | ||
| A024HA0.75A-E A024HA0.75A-E |
Synchronization with the parent channel is perfo | |||
| A024HA0.75A-E-W A024HA0.75A-E-W |
||||
| A024HA0.75B-W A024HA0.75B-W |
This new series of digital transistors is | |||
| A024HA01.5A-C-W A024HA01.5A-C-W |
N/A | In order for Xinger surface mount components to w | ||
| A024HA04A-E A024HA04A-E |
N/A | The input pin of the regulator. Typically a large | ||
| A024HA1.5A-C-W A024HA1.5A-C-W |
N/A | N/A | N/A | Thermal Design The IRU1010 incorporates an inter |
| A024HA1.5A-E A024HA1.5A-E |
The ATF1502ASV macrocell, shown in Figure 1, is | |||
| A024HA1.5A-E-W A024HA1.5A-E-W |
The clock signal connected to this pin is used t | |||
| A024HA1.5B-W A024HA1.5B-W |
PCI Compliance The FLASH370i family of CMOS CPLD | |||
| A025 A025 |
2008 | Configurations or a Single Bidirectional Configu | ||
| A0252936 A0252936 |
3. This input current only exists when the volta | |||
| A0253314P A0253314P |
Note 3: The maximum power dissipation must be der | |||
| A0253336 A0253336 |
TEST CONDITIONMINTYP Io=10mA, Tj=25!C, (Vin-Vo)= | |||
| A0253377P A0253377P |
Reduced Threshold Voltages for LVTTL on Control | |||
| A0253430 A0253430 |
VCU1 3.80 to 4.40 Adjustment VCD1 3.45 to 4.40 | |||
| A0253432 A0253432 |
||||
| A0253484 A0253484 |
||||
| A0254040T08 A0254040T08 |
The 74LVC(H)16244A is a 16-bit non-inverting buf | |||
| A0254545P A0254545P |
DISP high disables the LED display. DISP tied to | |||
| A0254714 A0254714 |
Turn-On Time: In the circuit of Figure 1, turning | |||
| A0254838 A0254838 |
Hynix HYMD264646B(L)8-M/K/H/L series incorporates | |||
| A0255618P A0255618P |
The QS3VH126 is a high bandwidth bus swit | |||
| A0256939 A0256939 |
The XC4000E family provides a regular, flexible, | |||
| A0256939G05 A0256939G05 |
Ballast control and half-bridge driver in | |||
| A0257662 A0257662 |
NOTES 1Sample tested. 2Input bias current is sp | |||
| A0259305 A0259305 |
1. ICC is dependent on output loading when the d | |||
| A0259321 A0259321 |
After an erase operation, all of the bytes in the | |||
| A0259337T A0259337T |
Note 1: A remote diode is any diode-connected tra | |||
| A0259341S03 A0259341S03 |
Each transmit and receive channel contains an ind | |||
| A0259400 A0259400 |
The device can be used as a 22-bit switch, with | |||
| A0259441 A0259441 |
The IDTQS74FCT2244T is an 8-bit buffer/li | |||
| A0259502 A0259502 |
Electrical characteristics apply over the full o | |||
| A0259504G05 A0259504G05 |
DESCRIPTION These diode-transistor | |||
| A0259504G06 A0259504G06 |
The MSM514252A is an 1-Mbit CMOS multiport DRAM c | |||
| A0259505P A0259505P |
The ADF7012 is a low power FSK/GFSK/OOK/GOOK/ASK | |||
| A0259506G05 A0259506G05 |
The Simultaneous Read/Write architecture provides | |||
| A0259508 A0259508 |
Operating voltage: 2.4V~5.0V Directly drives an | |||
| A0261396G05 A0261396G05 |
Advanced circuit design achieves 85 ns settling | |||
| A0262481 A0262481 |
Figure 1 shows a Block Diagram of the P8xC591. T | |||
| A0262959 A0262959 |
No matter how complicated the signals youre deal | |||
| A0262959G05 A0262959G05 |
Hardware Reset. Self-asserted by internal pull-u | |||
| A0264252 A0264252 |
• Synchronous Operation. • 2 Stage P | |||
| A0264285 A0264285 |
3.3/5.0 VOLT SELECT: 3/5 » high configures | |||
| A0265068 A0265068 |
The situation is somewhat more complicated in th | |||
| A0265137 A0265137 |
CHANNEL SELECT (F/R) Highest Logic Low Level L | |||
| A0266127 A0266127 |
In AM mode the AM mixer, the AM RF-AGC and the 1 | |||
| A0266523 A0266523 |
DM74184 BCD-TO-BINARY CONVERTERS The 6-bit BCD-t | |||
| A0267198P A0267198P |
A user selectable mode input is provided to allow | |||
| A026A0013401 A026A0013401 |
NA | 04+ | The voltage drop (VSR) across the sense re- sis | |
| A0271541 A0271541 |
• CMOS low power operation 400 mW | |||
| A0271780 A0271780 |
Voltage and current measurement are performed du | |||
| A0271822 A0271822 |
The BAfffLBSG (the fff indicates the output volt | |||
| A0271925 A0271925 |
The HYM72V64736(L)T8 Series are 64Mx72bits ECC Sy | |||
| A0271962 A0271962 |
FEATURES • Current Limit Protection ̶ | |||
| A0273457 A0273457 |
• In-house programming of samples and prot | |||
| A0275133 A0275133 |
Master) generate TCLK (Transmit Clock), the inte | |||
| A0276017 A0276017 |
The A0276017 dual-band PA controller is designed | |||
| A0278036 A0278036 |
The MAX101 ECL-compatible, 500Msps, 8-bit analog- | |||
| A0278606P A0278606P |
TAOperating free-air temperatureC4085C NOT | |||
| A0279310 A0279310 |
The RST control signal is used to enable the 3-w | |||
| A0279485 A0279485 |
OPERATING SUPPLY VOLTAGE FROM 8 TO 52V 2.8A OU | |||
| A027K0381 A027K0381 |
A fast, high precision differential input stage | |||
| A02802B2 A02802B2 |
The 512Mb DDR2 SDRAM is organized as a 32Mbit x 4 | |||
| A0285067 A0285067 |
•Input and output pins for the main clock | |||
| A0285636S02 A0285636S02 |
Hynix HYMD132G725A(L)4-K/H/L series is designed f | |||
| A0287226 A0287226 |
The CY29946 is capable of generating 1 and 1/2 si | |||
| A0288529 A0288529 |
International Rectifier's MUR.. series are the st | |||
| A0290164 A0290164 |
Serial Control Interface Clock (For MPI)/Timeslo | |||
| A0291380P A0291380P |
Highly specialized electronic sensors have been d | |||
| A0291508 A0291508 |
In designing a crystal oscillator, the values of | |||
| A0291509 A0291509 |
||||
| A0291510 A0291510 |
Housed in a small 24-pin DDIP or SMT (gull-wing) | |||
| A0291517 A0291517 |
In order to increase the adjustment range of VCO | |||
| A0291519 A0291519 |
Channel 0 Sync-On-Green-Input. A high impedance | |||
| A0291522 A0291522 |
(VDD = 5V 5%; VSS = 0V or -5V; fCLK = 2.0MHz, ext | |||
| A0291526 A0291526 |
Where frequency is in Hertz (Hz), RT resistance | |||
| A0291863 A0291863 |
As an alternative to a full chip erase or a plan | |||
| A0292116 A0292116 |
Assuming, the following conditions: VOUT =2.5V | |||
| A0292267 A0292267 |
Thermal Resistance (Typical, Note 5)JA (oC/W) & | |||
| A0292393 A0292393 |
HALF-FULL FLAG (HF) After half of the mem | |||
| A0292420 A0292420 |
The HA-5020 is a wide bandwidth, high slew rate a | |||
| A0292425 A0292425 |
VCXOs are usually used as a narrowband local fr | |||
| A0292428 A0292428 |
Stresses above those listed under Absolute Maxim | |||
| A0292429 A0292429 |
The TPS6202x is a high efficiency synchronous s | |||
| A0292430 A0292430 |
Note 4: C PD is defined as the value of the inte | |||
| A0292432 A0292432 |
Note 2: The algebraic convention is used in this | |||
| A0292434 A0292434 |
Filter Isolation: Rated voltage Resistance Ca | |||
| A0292817 A0292817 |
The ISD5008 device is designed for use in a micr | |||
| A0293047 A0293047 |
Parameter Forward Voltage Reverse Current Te | |||
| A0293585 A0293585 |
♦ Direct IF Sampling Up to 400MHz ♦ | |||
| A0293712 A0293712 |
NOTES: 1. tPLH and tPHL are production tested. | |||
| A0293770 A0293770 |
DNL: 1 LSB Max SINAD = 81.5 dB, SFDR = 95 dB TH | |||
| A0293779 A0293779 |
When OE is set HIGH, the data flow through the th | |||
| A0293816 A0293816 |
The VP5313/VP5513 converts digital Y Cr C | |||
| A0294418 A0294418 |
Notes: (i) Io 1(min) current of 0.1A can be div | |||
| A0295118 A0295118 |
SERIAL INTERFACE TIMING The IDT72V8985 ma | |||
| A0295120 A0295120 |
- Output voltage: 3.3V, 5V, 12V and adjustable & | |||
| A0295122 A0295122 |
Vishay Siliconix maintains worldwide manufacturin | |||
| A0295124 A0295124 |
technology. It is ideal for low power and low no | |||
| A0295125 A0295125 |
SYNC (Pin 5): The SYNC pin can be used to synchro | |||
| A0296302 A0296302 |
DMA Controller supports: 25 DMA channels for tra | |||
| A0296363 A0296363 |
The MAX6501CMAX6504 fully integrated temperature | |||
| A0296364 A0296364 |
Read Cycle, Begin Burst Read Cycle, Begin Burs | |||
| A0296650 A0296650 |
Note 7: Pins G6 and RESET are designed with a hig | |||
| A0296785 A0296785 |
Use series termination when the PCB trace betwee | |||
| A0296797 A0296797 |
The LH543601 has two 36-bit ports, Port A | |||
| A0296948P A0296948P |
suitable for Low Noise, Low Power applications | |||
| A0297214 A0297214 |
Introduction The IRU1075 adjustable Low Dropout | |||
| A0297636 A0297636 |
Note 1: Absolute Maximum Ratings are those values | |||
| A0297662 A0297662 |
(4) The products described in this book are inte | |||
| A0298034 A0298034 |
Synchronous active low chip enable. CE1 and CE2 a | |||
| A0298037 A0298037 |
Notice: Stresses greater than those listed unde | |||
| A0298506 A0298506 |
In the case where high load currents or a short | |||
| A0298562 A0298562 |
guarantees lower guaranteed maximum supply curre | |||
| A02A A02A |
NATIONAL | SOT23-5 | 03+ | Maximum ratings are those values beyond which de |
| A02B A02B |
NATIONAL | SOT23-5 | 03+ | The input stage contains an Automatic Gain Contr |
| A02B-OCW43 A02B-OCW43 |
The ML9209-xx is an alphanumeric type vacuum flu | |||
| A02C12 A02C12 |
This serie of T-module uses fast recovery power | |||
| A02T A02T |
Coilcraft | 1210 | High Efficiency: Up to 95% Very Low Quiescent Cu | |
| A02TCOIL A02TCOIL |
High current sink/source 25 mA/25 mA Four exter | |||
| A02TJ A02TJ |
© Atmel Corporation 2001. Atmel Corporation | |||
| A02TK A02TK |
N/A | An RC network may be connected to this pin in ord | ||
| A02V01-SY A02V01-SY |
TCL | DIP36 | 03+ | The HIP6017 provides the power control and prote |
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