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STATIC ELECTRICAL CHARACTERISTICS Characteristics noted under conditions TA = 25C, VDD = VM = 5.0 V, GND = 0 V unless otherwise noted. Typical values noted reflect the approximate parameter means at TA = 25C under nominal conditions unless otherwise noted.
Synchronous Output Enable. When HIGH, it stops clock outputs (except 2Q0 and 2Q1) in a LOW state (for PE = H) - 2Q0 and 2Q1 may be used as the feedback signal to maintain phase lock. When TEST is held at MID level and sOE is HIGH, the nF[1:0] pins act as output disable controls for individual banks when nF[1:0] = LL. Set sOE LOW for normal operation (has internal pull-down).
The DG403DJ incorporates a 16C550A compatible UART and one Multi-Mode parallel port with ChiProtect circuitry plus EPP and ECP support. The DG403DJ does not require any external filter components, is easy to use and offers lower system cost and reduced board area.
Parr number/PDF Mfg Pack D/C Descrpion
DG400CJ   DG400CJ DG400CJ PDF Download 00+ NOTES: (1) Junction Temperature = Ambient Temper
DG400GP   DG400GP DG400GP PDF Download
DG401   DG401 DG401 PDF Download HAR CDIP16 20715 Improved, Dual, High-Speed Analog Switches
DG401ABK   DG401ABK DG401ABK PDF Download HAR DIP The dMAX controller includes features such as th
DG401AK   DG401AK DG401AK PDF Download SIL CDIP16 9542+ Full implementation of CAN protocol specificatio
DG401AK.   DG401AK. DG401AK. PDF Download DG DIP PRODUCT PREVIEW information concerns products in
DG401AK/883   DG401AK/883 DG401AK/883 PDF Download INTERSIL DIP 2008+ operation instruction. To utilize this function,
DG401AK/883B   DG401AK/883B DG401AK/883B PDF Download Full synchronous operation on both ports C 3.5n
DG401CJ   DG401CJ DG401CJ PDF Download Maxim Integrated Products DIP 05+ Power down protection is provided on all inputs
DG401CY   DG401CY DG401CY PDF Download Maxim Integrated Products SMD 05+ The SecSi™ (Secured Silicon) Sector is an e
DG401DJ   DG401DJ DG401DJ PDF Download Maxim Integrated Products DIP 97+ RST is a device reset pin. When RST is pulsed hi
DG401DK   DG401DK DG401DK PDF Download HAR/INTERSIL,Vishay 04+
DG401DY   DG401DY DG401DY PDF Download Intersil N/A N/A Thirteen CLB inputs and four CLB outputs provide
DG401DY-T   DG401DY-T DG401DY-T PDF Download Intersil ESD (electrostatic discharge) sensitive device.
DG401DYZ   DG401DYZ DG401DYZ PDF Download Intersil The CS4344 family contains on-chip digital de-emp
DG401DYZ-T   DG401DYZ-T DG401DYZ-T PDF Download Intersil Hynix HYMD212G726A(L)S4-M/K/H/L series incorporat
DG401EJ   DG401EJ DG401EJ PDF Download HAR 95+ G760 is a single chip solution for fan speed cont
DG402   DG402 DG402 PDF Download The ICSI IC61S6432 is a high-speed, low-power syn
DG403   DG403 DG403 PDF Download N/A N/A N/A Improved, Dual, High-Speed Analog Switches
DG4030DJ   DG4030DJ DG4030DJ PDF Download 未提供 N/A   The Driver-Plus Board, shown in figure 3,
DG4030DY   DG4030DY DG4030DY PDF Download SILICONIX SOP 04+ • 8/10-bit A/D converter : 15 channels &nb
DG403ACJ   DG403ACJ DG403ACJ PDF Download 00+ High Efficiency: Up to 95% 4A Output Current Lo
DG403AK   DG403AK DG403AK PDF Download SI DIP-16 03+ The sensor consists of 64 photodiodes arranged i
DG403AK/883   DG403AK/883 DG403AK/883 PDF Download SILICONIX DIP-16 N/A During the Program operation, the only valid read
DG403AK/883B   DG403AK/883B DG403AK/883B PDF Download MAX The 3 Volt Intel® Advanced+ Boot Block Flash
DG403BDY-E3   DG403BDY-E3 DG403BDY-E3 PDF Download SI 05/06+   The SMB series is designed to protect volt
DG403BDY-T1-E3   DG403BDY-T1-E3 DG403BDY-T1-E3 PDF Download SI 05/06+ Register oriented 8/16 bit CORE with RUN, WFI,
DG403CJ   DG403CJ DG403CJ PDF Download Maxim Integrated Products 00+ Any data, prices, descriptions or specifications
DG403CY   DG403CY DG403CY PDF Download Maxim Integrated Products Single Power Supply 3.3 V 0.3 V C DG403CY 2.7
DG403D   DG403D DG403D PDF Download 98 gate, deactivating the gate drive circuits and s
DG403DJ   DG403DJ DG403DJ PDF Download Maxim Integrated Products DIP-16 05+ IF+, IF C (Pins 2, 3): Differential IF Signal Inp
DG403DJ-4   DG403DJ-4 DG403DJ-4 PDF Download TTL/CMOS Input Select Control. Selects either XTA
DG403DJ-E3   DG403DJ-E3 DG403DJ-E3 PDF Download SI 05/06+ The appropriate converters must be ordered to ta
DG403DK   DG403DK DG403DK PDF Download Absolute maximum ratings indicate sustained limi
DG403DY   DG403DY DG403DY PDF Download Maxim Integrated Products SOP 07+ 1. H = HIGH voltage level   L = LOW voltag
DG403DY-   DG403DY- DG403DY- PDF Download The UC1842A/3A/4A/5A family of control ICs is a
DG403DY-E3   DG403DY-E3 DG403DY-E3 PDF Download VISHAY Note 1: In the typical PECL 100K logic output V
DG403DY-T   DG403DY-T DG403DY-T PDF Download Intersil presented in straight binary or twos complement
DG403DYT1   DG403DYT1 DG403DYT1 PDF Download The DS1554 is available in two packages (32-pin
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DG403DY-T1-E3   DG403DY-T1-E3 DG403DY-T1-E3 PDF Download VISHAY All parameters measured at fMAX unless noted oth
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DG403DYZ   DG403DYZ DG403DYZ PDF Download Intersil 0601+;08+ 3-wire FSK Interface Data (CMOS Output). Mark fr
DG403DYZF412-6531(TUBE   DG403DYZF412-6531(TUBE DG403DYZF412-6531(TUBE PDF Download The graphs and tables provided following this not
DG403DYZ-T   DG403DYZ-T DG403DYZ-T PDF Download Intersil A A Low skew, fanout buffer 1 to 12 differential c
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DG403EY   DG403EY DG403EY PDF Download The MK1491-06 provides more functionality in a 2
DG404   DG404 DG404 PDF Download Amplifier noise performance is outstanding with a
DG405   DG405 DG405 PDF Download HAR 00+ Improved, Dual, High-Speed Analog Switches
DG4050DJ   DG4050DJ DG4050DJ PDF Download max max dc92 When reading the RTC, the timekeeping registers a
DG4052BD   DG4052BD DG4052BD PDF Download DIP 93+ The TOSHIBA products listed in this document are
DG4053BD   DG4053BD DG4053BD PDF Download N/A DIP 3 Figure 10 shows a sampled triangular signal. The
DG405AK   DG405AK DG405AK PDF Download SILICONIX CDIP14 94   N.100 BSC2.54 BSC NOTES:   1. Dime
DG405AK.   DG405AK. DG405AK. PDF Download DG DIP Disable mode places the device in a sleep state,
DG405AK/883   DG405AK/883 DG405AK/883 PDF Download N/A N/A N/A Each GLB contains 32 macrocells and a fully popu
DG405AK/883B   DG405AK/883B DG405AK/883B PDF Download Notes: 1. The luminous intensity, I v, is measu
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DG405CJ   DG405CJ DG405CJ PDF Download Maxim Integrated Products DIP (All voltages referenced to V-. VDD = 13V, a 10&m
DG405CY   DG405CY DG405CY PDF Download Maxim Integrated Products STK 2004+ The host system can detect whether a program or
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DG405DY-E3   DG405DY-E3 DG405DY-E3 PDF Download - Preface Table "Document References":
DG405DY-T   DG405DY-T DG405DY-T PDF Download © 2004 Lattice Semiconductor Corp. All Latt
DG405EJ   DG405EJ DG405EJ PDF Download When this input pin transitions from LOW to HIGH,
DG405EY   DG405EY DG405EY PDF Download Note 4: Receiver Skew Margin is defined as the va
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DG406CWI-T   DG406CWI-T DG406CWI-T PDF Download Ground pin. This pin should be connected to sy
DG406DJ   DG406DJ DG406DJ PDF Download Maxim Integrated Products DIP-28 02+ Block Protect Bits - BP2, BP1, BP0 - (Nonvolatile
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DG406DJZ   DG406DJZ DG406DJZ PDF Download Intersil 0722+ Resistance R1 Capacitance C1 at 2.5V dc; 1MHz, 3
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DG407DJ-E3   DG407DJ-E3 DG407DJ-E3 PDF Download SI 05/06+   These devices employ the Schottky Barrier
DG407DM   DG407DM DG407DM PDF Download INTERISIL PLCC 07+ Serial configuration control input. This inputs
DG407DN   DG407DN DG407DN PDF Download INTERSIL PLCC 2008+ The quad consists of eight differential low nois
DG407DN-E3   DG407DN-E3 DG407DN-E3 PDF Download SI 05/06+ TRB Transmitter or receiver select. A logic low
DG407DW   DG407DW DG407DW PDF Download VISHAY SILICONIX SOP28L 04+ The W29EE512 includes a data polling feature to i
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DG407EY   DG407EY DG407EY PDF Download After the OTG Host detects one of the above pulsi
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DG407J   DG407J DG407J PDF Download DIP When using the internal demodulator, the oscillat
DG407KN   DG407KN DG407KN PDF Download The HY29DL16x can be programmed and erased in-s
DG407N   DG407N DG407N PDF Download DG PLCC Note 1: Relative accuracy is the deviation of the
DG408   DG408 DG408 PDF Download 99 Improved, 8-Channel/Dual 4-Channel, CMOS Analog M
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DG408AK/883   DG408AK/883 DG408AK/883 PDF Download DIP16 0229 Output of 1394b driver block. These twisted-pair
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DG408BR   DG408BR DG408BR PDF Download SOP 04+ † Stresses beyond those listed under absol
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DG408CUE   DG408CUE DG408CUE PDF Download tions (-1 = crystal; -2 = external; -3 = interna
DG408CUE-T   DG408CUE-T DG408CUE-T PDF Download Unlike other devices, the error amplifier in the
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DG408D   DG408D DG408D PDF Download n/a S0 Pin   The S0 pin is used to select the
DG408D7   DG408D7 DG408D7 PDF Download Any data, prices, descriptions or specifications
DG408DG   DG408DG DG408DG PDF Download Using C4 = 9.2 pF 2%, C5 = 6.8 pF 5%, a switch
DG408DJ   DG408DJ DG408DJ PDF Download Intersil SOP 07+ Sensitivity is defined as the average signal lev
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DG408DQ   DG408DQ DG408DQ PDF Download Source code: ◊ VHDL Source Code or/and &#
DG408DQ-E3   DG408DQ-E3 DG408DQ-E3 PDF Download In addition to the standard output configuration
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DG408EJ   DG408EJ