| Parr number/PDF |
Mfg |
Pack |
D/C |
Descrpion |
|
|
|
|
|
HD70158AP HD70158AP  |
|
|
|
The COP820CJ is a member of the COP8TM 8-bit Micr |
HD706M HD706M  |
|
|
|
1~4 Cell Alkaline Battery Operating Range Outpu |
HD706P HD706P  |
|
|
|
Comments, suggestions, or questions on this docum |
HD708M HD708M  |
HITACHI |
CAN-12 |
07+ |
The VC33 instruction register is 8 bits long. Ta |
HD70C140F003 HD70C140F003  |
HITACHI |
QFP-144 |
07+ |
The RC4700 ALU consists of the integer ad |
HD710M HD710M  |
|
|
|
DESCRIPTION The NJW1503A is a PLL |
HD711M HD711M  |
|
92 |
|
HY57V561620A is offering fully synchronous operat |
HD713M HD713M  |
|
|
|
The control signals for the configuration memory |
HD71G102D2R10FD HD71G102D2R10FD  |
|
|
|
These bits are for programming the PLLs internal |
HD7279 HD7279  |
|
N/A |
—— |
Ratiometricity simply means that the outp |
HD7279A HD7279A  |
HD |
|
|
CHS=0,BAL=11111 Vin = 1Vrms Vo=0.5Vrms BW=400H |
HD7279A-SP HD7279A-SP  |
HD |
SOP/DIP |
08+ |
Figure 4 shows the logic in the XC5200 CLB, whic |
HD7279A-SP/ HD7279A-SP/  |
HD |
SOP-28 |
07+ |
The analogue section consists of a comparator wi |
HD7279A-WP HD7279A-WP  |
HIT |
DIP-28 |
05+ |
NOTES: 1. These parameters are determined by dev |
HD7279A-WP/ HD7279A-WP/  |
HD |
DIP-28 |
07+ |
The drivers provide four selectable levels of pr |
HD7279-S HD7279-S  |
|
07+ |
|
• USB V2.0 Compliant SIE • Low-spee |
HD7279S-SP HD7279S-SP  |
HD |
SOP |
07+ |
Adjustable Output Down to 1.2V Output Current of |
HD7279-WP HD7279-WP  |
HIT |
DIP |
|
230 Hz Ultrafast Lock Times From DDS Implementa |
HD73LS373 HD73LS373  |
|
|
|
The ISL6527 provides simple, single feedback loop |
HD73M801ABT HD73M801ABT  |
|
|
01 |
If high inductance values and low capacitor valu |
HD7400 HD7400  |
HITACHI |
DIP |
1987 |
The bq2019 provides 64 bytes of general-purpose |
HD7400-A HD7400-A  |
HIT |
|
04+ |
The members of this family are single power suppl |
HD7400D HD7400D  |
HIT |
DIP/14/磁 |
90+ |
VCU1 3.80 to 4.40 Adjustment VCD1 3.45 to 4.40 |
HD7400P HD7400P  |
HIT |
DIP-14P |
9640+ |
n Software selectable I/O options (TRI-STATE &re |
HD7401 HD7401  |
|
|
|
Notes: 1. See thermal regulation specifications |
HD740107P HD740107P  |
HIT |
DIP |
DIP |
Buffer Delays tINInput buffer delay tGCKGCK bu |
HD7401-A HD7401-A  |
1088 |
HD |
|
Phase Angle C Power Factor and Dissipation Factor |
HD7401P HD7401P  |
HIT |
DIP |
93+ |
A buffered output-enable (OE) input can be used |
HD7402 HD7402  |
HIT |
|
|
The PI90LV02 and PI90LVT02 are single differenti |
HD7402P HD7402P  |
N/A |
DIP |
07+ |
Product names or services listed in this publica |
HD7403 HD7403  |
Hitachi |
|
|
Transmission bit rate in normal communication is |
HD7403-A HD7403-A  |
|
|
|
Flash Memory Plus SRAM Reduces Memory Board Sp |
HD7403P HD7403P  |
HIT |
DIP-14P |
98+ |
The CS8920As highly efficient StreamTrans- ferT |
HD7403P-Z HD7403P-Z  |
HIT |
|
95+ |
• Sealed construction for automatic wave so |
HD7404 HD7404  |
HITACHI |
DIP |
1987 |
In this mode, CS is inactive (high) between seri |
HD7404-A HD7404-A  |
HD |
|
|
• Fast Page Mode Access Cycle • TTL |
HD7404P HD7404P  |
|
|
93 |
The PI5A317A is a single-pole single-throw (SPST |
HD7405 HD7405  |
Hitachi |
|
|
‡ Unless otherwise indicated, voltages are |
HD7405P HD7405P  |
N/A |
DIP |
07+ |
Functional Tests (In Freescale Test Fixture, 50 o |
HD7406 HD7406  |
N/A |
N/A |
N/A |
4K bit Ferroelectric Nonvolatile RAM Orga |
HD7406FP HD7406FP  |
HIT |
1994+ |
SOP-14 |
Stresses beyond those listed under Absolute |
HD7406FPEL HD7406FPEL  |
HITACHI |
SMD |
1995 |
The reference is postpackage-trimmed to increase |
HD7406FPTL HD7406FPTL  |
HIT |
07+ |
|
• High-speed access times: 8, 10, |
HD7406P HD7406P  |
HIT |
DIP |
DIP |
The 3.3-volt device is fully accessible and data |
HD7406RP HD7406RP  |
HIT |
SOP |
94/P |
Notes: 1. For conditions shown as Max. or Min., |
HD7407 HD7407  |
HD |
08+ |
|
When a logic 0 of TRB is latched in with the fal |
HD7407FPEL HD7407FPEL  |
HITACHI |
08+ |
|
It is important that the logic used to turn ON a |
HD7407FPTL HD7407FPTL  |
HIT |
05+/06+ |
|
This device has built-in protection against high |
HD7407FPTR HD7407FPTR  |
|
|
96 |
NOTES 1Stresses above those listed under Absolut |
HD7407OP HD7407OP  |
|
|
|
!Features 1) Suitable for damping resistors. 2) |
HD7407P HD7407P  |
HITACHI |
DIP-14P |
6+ |
A0, A1, A2, A3 (Pins 2, 3, 21, 22) Addres |
HD7408 HD7408  |
HIT |
DIP/14/磁 |
|
Warning: Stresses beyond those listed under Absol |
HD7408P HD7408P  |
Hitachi |
|
|
18 MHz operation frequency 32 K 8 ROM (SAB 83C |
HD7409 HD7409  |
HIT |
DIP陶瓷 |
99+ |
NOTE: Intersil Pb-free plus anneal products emplo |
HD7409P HD7409P  |
HIT |
DIP-14P |
96+ |
• Extended Data-Out (EDO) Page Mode   |
HD7409PP HD7409PP  |
|
|
|
The OPA363 and OPA364 families offer excellent C |
HD7410 HD7410  |
HIT |
DIP |
|
• High-speed access time: 35, 45, 55, 70 n |
HD74107 HD74107  |
HIT |
DIP/14/磁 |
|
A multiplier block is associated with each Selec |
HD74107P HD74107P  |
Hitachi |
|
|
. . . employing the Schottky Barrier princ |
HD7410P HD7410P  |
HIT |
|
95 |
PFKC03 series required a minimum 10% loading on |
HD7411P HD7411P  |
|
|
|
TEST LEVEL CODES All electrical characteristics |
HD74121 HD74121  |
N/A |
DIP |
07+ |
Figure 3 shows a typical test circuit for evaluat |
HD74121P HD74121P  |
HIT |
|
|
The IS25C32/64 utilizes an 8-bit instruction reg |
HD74123 HD74123  |
|
|
92 |
The GTL16923 devices are 18-bit registered bus t |
HD74123P HD74123P  |
|
|
90 |
Vth can be expressed as voltage between ga |
HD74125 HD74125  |
Hitachi |
|
|
ODIS 14 OUTPUT DISABLE - asserting this |
HD74125P HD74125P  |
Hitachi |
|
|
per Figure 5 Waveform Peak Power − Min. 15 |
HD74126 HD74126  |
Hitachi |
|
|
The device operates on demand via a sync input p |
HD74126P HD74126P  |
N/A |
N/A |
N/A |
The MC74HC04A is identical in pinout to t |
HD7412P HD7412P  |
Hitachi |
|
|
V+ (Pin 8): Positive Power Supply. This supply mu |
HD74132 HD74132  |
Hitachi |
|
|
|
HD74132P HD74132P  |
Hitachi |
|
|
The READ instruction will stream out data at a |
HD74136 HD74136  |
Hitachi |
|
|
VPC3 is the control pin for the stage 3 active bi |
HD74136P HD74136P  |
HIT |
SOP |
03+ |
Sample: NR-SD-24V, 10 pcs. Contact voltage: 10 |
HD74139P HD74139P  |
|
|
|
Unless otherwise specified, the following specif |
HD7414 HD7414  |
HIT |
DIP |
04+ |
The FETKY product family incorporates low |
HD74141P HD74141P  |
|
|
|
Typical Data is at TA = +25C and VCC = 5 V and is |
HD74145P HD74145P  |
HIT |
|
93+ |
NOTES: 1. WE is high in read Cycle. 2. Device i |
HD74147 HD74147  |
Hitachi |
|
|
The Treble adjustment is made by changing |
HD74147P HD74147P  |
HIT |
|
|
Designing for Very Fast Load Transients The tran |
HD74148 HD74148  |
Hitachi |
|
|
The devices are stable with capacitive loads up |
HD74148P HD74148P  |
|
HIT |
88 |
I2C Interface General Device Address I2C Regis |
HD7414P HD7414P  |
Hitachi |
|
|
The device incorporates auto-calibration and buil |
HD74150 HD74150  |
Hitachi |
|
|
Continuous Drain Current, V GS @ 4.5V Continuou |
HD74150P HD74150P  |
HITACHI |
DIP24P |
05+ |
Single Package Fully-integrated 4-bit Flash Micro |
HD74151A HD74151A  |
HIT |
DIP |
87+ |
Glass passivated high commutation triacs in a |
HD74151AP HD74151AP  |
HITACHI |
DIP16 |
|
Note: _ _ represents the two number suffix needed |
HD74153 HD74153  |
Hitachi |
|
|
|
HD74153P HD74153P  |
HIT |
|
91 |
The PLL will work correctly, meaning it will pha |
HD74154 HD74154  |
Hitachi |
|
|
When #CE and #RESET pins are at VDD, the ICC CMOS |
HD74154P HD74154P  |
HIT |
DIP |
06+ |
NOTES: Stresses above those listed under |
HD74155 HD74155  |
Hitachi |
|
|
Hynix HYMD216646A(L)6J-J series incorporates SPD( |
HD74155D HD74155D  |
HIT |
DIP/16/磁 |
90+ |
Note: 1. For DIP package: Soldering temperature |
HD74155P HD74155P  |
HIT |
DIP |
97+ |
The sensor has two readout registers located at |
HD74156 HD74156  |
Hitachi |
|
|
The DSTINIm400 is a fully assembled and tested c |
HD74156P HD74156P  |
N/A |
N/A |
N/A |
Inductance: Measured at 1 volt with no DC current |
HD74157 HD74157  |
HITACHI |
DIP |
1987 |
Note 1: Power dissipation is 500 mW when mounted |
HD74157P HD74157P  |
HIT |
SOP |
00+ |
Specifications Outline Dimensions Pin Connectio |
HD74159 HD74159  |
Hitachi |
|
|
The DDU7C relies on a stable power supply to pro |
HD74159P HD74159P  |
HIT |
DIP |
05+ |
Note 2: The maximum allowable power dissipation i |
HD7416 HD7416  |
Hitachi |
|
|
Applications l Telecom and Data-Com 24 and 48V |
HD74160P HD74160P  |
Hitachi |
|
|
As described under "Current Limiting," |
HD74161 HD74161  |
Hitachi |
|
|
At C40C to 85C, +VA = +5 V, +VBD = +5 V or +VBD |
HD74161P HD74161P  |
HIT |
DIP |
97+ |
The parallel I/O interface may be configured for |
HD74162P HD74162P  |
HIT |
DIP |
98+ |
This new generation of TRENCH MOSFETs from Zetex |
HD74163 HD74163  |
HITCHIA |
DIP |
DIP |
The CS pin must remain low during the loading of |
HD74163P HD74163P  |
N/A |
DIP |
07+ |
Notes: 1. The dominant wavelength, ëd, is |
HD74164 HD74164  |
Hitachi |
|
|
The Intersil ISL5120CISL5123 devices are precisi |
HD74164P HD74164P  |
|
95 |
DIP |
HOLD ACKNOWLEDGE: The active high Hold Acknowled |
HD74166 HD74166  |
Hitachi |
|
|
1. Hitachi neither warrants nor grants licenses |
HD74166P HD74166P  |
HIT |
|
|
The TLE 4471 is a monolithic integrated very low |
HD7416P HD7416P  |
|
|
94 |
Accesses to the MBAR register at long word $3FF0 |
HD7417 HD7417  |
Hitachi |
|
|
Reading from the device is accomplished by taking |
HD74170R HD74170R  |
HIT |
|
04+ |
Loading With the rising edge of the Cloc |
HD74170R-P HD74170R-P  |
HITACHI |
DIP |
07+ |
The ISL6208 features 4A typical sinking current f |
HD74173 HD74173  |
Hitachi |
|
|
COMP, 0 VCS 0.4 V. DV |
HD74173P HD74173P  |
N/A |
N/A |
N/A |
In addition, the L1 instruction memory and L1 da |
HD74174 HD74174  |
Hitachi |
|
|
Typical values represent average readings |
HD74174P HD74174P  |
N/A |
N/A |
N/A |
Information furnished by Linear Technology Corpor |
HD74175 HD74175  |
Hitachi |
|
|
Guaranteed by measurement of initial offse |
HD74175P HD74175P  |
N/A |
DIP |
07+ |
GENERAL DESCRIPTION NJM2567 is a l |
HD74177P HD74177P  |
Hitachi |
|
|
The Clock and Data Recovery stage was designed to |
HD74179 HD74179  |
HIT |
|
|
allow adjacent I/O cell outputs to be directly c |
HD7417P HD7417P  |
HIT |
DIP-14P |
0416+ |
The THAT 4311 Low Power Dynamics Proces- |
HD74180 HD74180  |
|
|
91 |
Notes: 1. TC is defined as case temperature, the |
HD74180P HD74180P  |
HIT |
DIP |
DIP |
Block check character is transmitted/received as |
HD74182 HD74182  |
Hitachi |
|
|
Designed for use in solid state relays, M |
HD74182P HD74182P  |
N/A |
DIP |
07+ |
|
HD74190N HD74190N  |
HITACHI |
|
|
The RC4700 also incorporates a four-entry |
HD74192 HD74192  |
HITCHIA |
DIP |
DIP |
regardless of the operating mode of the device. |
HD74192P HD74192P  |
Hitachi |
|
|
ACST4-7S triggering current has to be sunk from |
HD74193 HD74193  |
HITACHI |
DIP |
1987 |
NOTES: 1. Dimensions are in inches.   |
HD74193P HD74193P  |
Hitachi |
|
|
The TMS551xx devices offer a split-register-tran |
HD74194 HD74194  |
Hitachi |
|
|
The MAX1555s CHG is an active-low, open-drain c |
HD74194-B HD74194-B  |
HIT |
|
9M1 |
Designed for broadband commercial and ind |
HD74194P HD74194P  |
N/A |
DIP |
07+ |
When a HIGH-going transition is detected on this |
HD74195 HD74195  |
HIT |
DIP/16/磁 |
|
nRF401 is a true single chip UHF transceiver desi |
HD74195P HD74195P  |
Hitachi |
|
|
|
HD74197P HD74197P  |
Hitachi |
|
|
The primary function of the receiver is to recov |
HD74198 HD74198  |
Hitachi |
|
|
Hynix HYMD132725A(L)8-K/H/L series incorporates S |
HD74198P HD74198P  |
|
|
|
Supports PIO mode 4, both at 16.6 Mbytes/second |
HD74199P HD74199P  |
HIT |
DIP24 |
04+/05+/06+/07+ |
This new generation of trench MOSFETs from Zetex |
HD7420 HD7420  |
Hitachi |
|
|
ADDRESS STROBE: This is an active high signal us |
HD7420-A HD7420-A  |
|
|
|
The eight latches of the LVTH573 devices are tra |
HD7420P HD7420P  |
N/A |
DIP |
07+ |
The 74HC/HCT377 have eight edge-triggered, D-typ |
HD74221 HD74221  |
Hitachi |
|
|
The MCU provides the following features: 40K byt |
HD74221P HD74221P  |
HIT |
SOP |
90+ |
Features NPT IGBT technology low sa |
HD7422P HD7422P  |
Hitachi |
|
|
The IRU3027 controller IC is specifically designe |
HD7425 HD7425  |
Hitachi |
|
|
The LM139 series consists of four independent pr |
HD7425P HD7425P  |
HIT |
DIP |
DIP |
Soldering (10 seconds)+260˚C ESD Sus |
HD7426P HD7426P  |
N/A |
N/A |
N/A |
State-of-the-Art Advanced BiCMOS Technology (ABT |
HD7427 HD7427  |
Hitachi |
|
|
202 or CCITT V.23 FSK format and transmitted at |
HD74279 HD74279  |
Hitachi |
|
|
Clocks in the ispLSI 2096V device are selected u |
HD74279P HD74279P  |
HITACHI |
|
|
DC Supply Voltage, VCC . . . . . . . . . . . . . |
HD7427P HD7427P  |
HIT |
DIP |
|
The architecture of the current feedback opamp co |
HD74283P HD74283P  |
HIT |
DIP-16P |
9317+ |
Stresses above those listed under Absolute Maxim |
HD74290P HD74290P  |
Hitachi |
|
|
The FDC37M60x with IrDA v1.0 support incorporat |
HD74293 HD74293  |
Hitachi |
|
|
This Logic Level Vertical Power MOSFET is |
HD74293P HD74293P  |
HIT |
|
|
[CAUTION] The specifications on this data |
HD7430 HD7430  |
Hitachi |
|
|
The 512K EPROM and OTP PROM are programmed using |
HD7430P HD7430P  |
Hitachi |
|
|
The EM78860 is an 8-bit RISC type microprocessor |
HD74312R HD74312R  |
|
陶瓷DIP |
03+ |
The Phase Frequency Detector (PFD) then compares |
HD7432 HD7432  |
HITACHI |
DIP |
1987 |
The ICSI IC61S6432 is a high-speed, low-power syn |
HD7432P HD7432P  |
HIT |
|
90 |
Comprehensive Power Management Capability for Mo |
HD7437 HD7437  |
HIT |
DIP-14P |
01+ |
Even Parity. Parity is even parity across AD31-0 |
HD7437-A HD7437-A  |
|
|
|
The Fairchild Switch FSTU32160A is a 16-bit to 3 |
HD7437D HD7437D  |
HIT |
DIP/14/磁 |
|
Voltage follower/buffer/amplifier Charge integra |
HD7437P HD7437P  |
HIT |
DIP |
97+ |
DFS Double Speed Sampling Mode Pin TEST Test |
HD7438 HD7438  |
HIT |
|
|
The ADF4360-6 is a fully integrated integer-N sy |
HD7438-A HD7438-A  |
HIT |
|
04+ |
The LH1556FP is robust, ideal for telecom and g |
HD7438BP HD7438BP  |
|
|
|
The bandwidth of KESRX05 is set by the external |
HD7438D HD7438D  |
HIT |
|
97 |
These devices consist of four independent high- |
HD7438FPEL HD7438FPEL  |
HITACHI |
05+/06+ |
|
The IRU1261, using a proprietary process, combine |
HD7438FPER HD7438FPER  |
HIT |
SOP |
95 |
System Characteristics The following spec table e |
HD7438FPTL HD7438FPTL  |
HITACHI |
95 |
7858
|
The Forward Biased Safe Operating Area cu |
HD7438P HD7438P  |
HIT |
DIP-14P |
00+ |
90% Efficiency at 20W Frequency to 600kHz 30W o |
HD7440 HD7440  |
Hitachi |
|
|
NOTES 1. Data, Clock and Enable inputs are high |
HD744051FPEL HD744051FPEL  |
HIT |
99 |
1678
|
NOTES 1Stresses above those listed under Absolut |
HD7440P HD7440P  |
HIT |
|
|
SINGLE-CHIP SOLUTION TO DIRECTLY MEASURE FOUR LO |
HD7442A HD7442A  |
Hitachi |
|
|
and 4 to 40 V Low current consumption of less th |
HD7442AP HD7442AP  |
N/A |
N/A |
N/A |
The device will respond with a 64-bit ATR code, |
HD7442P HD7442P  |
HIT |
DIP-16P |
04+ |
An internal power-on reset (POR) and an enable i |
HD74442AP HD74442AP  |
HIT |
|
00 |
Chip Enable (E). The Chip Enable, E, activates t |
HD7445P HD7445P  |
HIT |
DIP-16P |
03+ |
The MAX8586 single current-limited switch control |
HD7446AP HD7446AP  |
50 |
|
|
The host system can detect whether a program or |
HD7446P HD7446P  |
|
|
94 |
DESCRIPTION This power MOSFET is designed using |
HD7447 HD7447  |
|
|
|
A default serial loader program in the Boot ROM |
HD7447A HD7447A  |
Hitachi |
|
|
SYSTEM ERROR is used for reporting address parity |
HD7447A-B HD7447A-B  |
|
|
|
|
HD7447AG HD7447AG  |
HIT |
DIP -16 陶封 |
96 |
The Fairchild Power Switch(FPS) product family i |
HD7447AP HD7447AP  |
|
|
96 |
Total memory size is 128 Kbytes, equivalent to a |
HD744C74P HD744C74P  |
|
|
|
REPEATER MODE When the RPTR pin is high or regis |
HD7450 HD7450  |
Hitachi |
|
|
When the DRAIN pin of the LT4250L is above VEE by |
HD7450P HD7450P  |
HIT |
|
|
NEC's NESG2021M05 is fabricated using NECʼs |
HD7451 HD7451  |
HITCHIA |
DIP |
DIP |
First ASIC replacement FPGA for high-volume pro |
HD7451D HD7451D  |
|
|
|
The HYM72V64636H(L)T8 Series are 64Mx64bits Synch |
HD7451P HD7451P  |
HIT |
DIP |
|
These dual P-Channel logic level enhancement mode |
HD7453P HD7453P  |
Hitachi |
|
|
Note 1: Absolute maximum ratings are the extreme |
HD7454P HD7454P  |
Hitachi |
|
|
Clocks in the ispLSI 1032E device are selected u |
HD74574P HD74574P  |
|
HIT |
98 |
The LH28F016SU provides user-selectable b |
HD7472P HD7472P  |
HITACHI |
DIP-14 |
96+ |
The Blackfin processor assembly language uses an |
HD7473 HD7473  |
Hitachi |
|
|
The HD7473 is a VFD (Vacuum Fluorescent Display) |
HD7473P HD7473P  |
HIT |
DIP |
|
line is at logic low and the data is latched w |
HD7474 HD7474  |
HIT |
|
92 |
The state of the Boot Block lockout can b |
HD7474-A HD7474-A  |
HIT |
|
04+ |
Maximum ratings are those values beyond which de |
HD7474G HD7474G  |
Hitachi |
|
|
Feedback Disable: This input controls the state o |
HD7474P HD7474P  |
HIT |
|
|
The thermal path between the plastic package and |
HD7475 HD7475  |
Hitachi |
|
|
LINEAR GCI MODE In GCI linear mode, one G |
HD7475P HD7475P  |
HIT |
|
4A38;92 |
Other operating features include an on/off inhib |
HD7476 HD7476  |
Hitachi |
|
|
Temperature sensor ICs such as the MAX6672/ MAX6 |
HD7476P HD7476P  |
Hitachi |
|
|
Notes a. The algebraic convention whereby the m |
HD7483A HD7483A  |
Hitachi |
|
|
256 Independent, Bidirectional HDLC Channels Up |
HD7483AP HD7483AP  |
N/A |
N/A |
N/A |
|
HD7485 HD7485  |
Hitachi |
|
|
Each MMU provides read-only and supervisor-only |
HD7485P HD7485P  |
N/A |
N/A |
N/A |
¡Compact, thin. (8.04.51.8mm) ¡For s |
HD7486 HD7486  |
Hitachi |
|
|
The HT48CA0 is an 8-bit high performance RISC-l |
HD7486G HD7486G  |
N/A |
N/A |
N/A |
Voltage, current, and temperature measurements ar |
HD7486P HD7486P  |
HITACHI |
00+ |
DIP-14 |
Setting the LED Current The regulated output cur |
HD7489 HD7489  |
|
|
94 |
Vcc = 2.3V~2.7V, TA= 0C to 70C/ -40C to 85C, unle |
HD7489P HD7489P  |
|
|
97 |
The BiCMOS process is used, as a result a supply |
HD7490 HD7490  |
HIT |
DIP |
|
Derate linearly above 70oC free air temperature |
HD7490A HD7490A  |
HIT |
DIP陶 |
01+ |
Program memory - bytes60K48K32K60K48K32K16K16K |
HD7490AP HD7490AP  |
HIT |
DIP |
99+ |
• Packaged in 28 pin, 300 mil wide SOIC or |
HD7491A HD7491A  |
Hitachi |
|
|
7.1 User Interface API A development kit dedica |
HD7491AP HD7491AP  |
Hitachi |
|
|
UL60950 requires minimum creepage and clearances |
HD7491P HD7491P  |
HIT |
|
|
Shift clock signal input for the PCMIN and PCMOUT |
HD7492AP HD7492AP  |
N/A |
N/A |
N/A |
Hynix HYMD232726(L)8-K/H/L series is unbuffered 1 |
HD7493A HD7493A  |
Hitachi |
|
|
• Combine Step-Up and Step-Down for   |
HD7493AP HD7493AP  |
Hitachi |
|
|
The MAX4626 successfully meets the qualit |
HD7495AP HD7495AP  |
HIT |
DIP |
93+ |
The DS1258 128k x 16 nonvolatile (NV) SRAMs are 2 |
HD7496P HD7496P  |
HIT |
DIP |
95+ |
True 64-bit microprocessor C 64-bi |
HD74AC00 HD74AC00  |
HITACHI |
|
SOP14 |
The HCMOS MC68SEC000s static architecture is a d |
HD74AC00FP HD74AC00FP  |
HIT |
SOP-14 |
01+ |
ELECTRICAL CHARACTERISTICS The block diagram is |
HD74AC00FPEL HD74AC00FPEL  |
HITACHI |
SOP5.2 |
00+ |
1. Absolute Maximum Ratings indicate limits beyo |
HD74AC00FPER HD74AC00FPER  |
HIT |
SOP5.2mm-14L |
2006 |
Logic 0 Input Voltage (OUT = LO) Logic 1 Input |
HD74AC00FPTR HD74AC00FPTR  |
日立 |
SOP |
95+ |
The PCI I/O region is also a 4 Gbyte space. Howe |
HD74AC00P HD74AC00P  |
HIT |
97 |
|
Many conditions affect the thermal perfor |
HD74AC00TEL HD74AC00TEL  |
HIT |
|
95 |
The maximum repetition rate for Timer T2 is twic |
HD74AC00T-EL HD74AC00T-EL  |
HIT |
SSMD |
2000 |
The ICSI IC61S6432 is a high-speed, low-power syn |
HD74AC02 HD74AC02  |
|
00+ |
SOP |
s Memory mapped I/O s Multilevel Low Voltage De |
HD74AC02FP HD74AC02FP  |
Hitachi |
|
|
In FM mode the FM mixer, the FM RF-AGC and the 1 |
HD74AC02FPEL HD74AC02FPEL  |
HIT |
SOP |
99/P |
The VSX60 Series are dual output converters with |
HD74AC02FP-EL HD74AC02FP-EL  |
HITACHI |
|
|
The Preliminary designation indicates that the p |
HD74AC02FPTR HD74AC02FPTR  |
HIT |
91+ |
|
The input buffer threshold has programmable TTL/ |
HD74AC02P HD74AC02P  |
|
|
99 |
These devices contain two independent positive- |
HD74AC02TELS HD74AC02TELS  |
HIT |
SSMD |
98 |
The HD74AC02TELS series is a two stage, hybrid s |
HD74AC04 HD74AC04  |
HIT |
|
|
Max. Instantaneous Forward Voltage*** @ IF = 0.1 |
HD74AC04FP HD74AC04FP  |
Hitachi |
|
|
The Advanced Interrupt Controller (AIC) controls |
HD74AC04FPEL HD74AC04FPEL  |
|
|
03 |
The output voltage of the Power Trends Wide Inpu |
HD74AC04FP-EL HD74AC04FP-EL  |
|
|
|
Fully Integrated xVCC and xVPP Switching xVPP Pr |
HD74AC04FPT HD74AC04FPT  |
|
|
|
FEATURES 8-18V Supply Operating Range 1 |
HD74AC04FPTL HD74AC04FPTL  |
HITACHI |
SOP5.2 |
96 |
Attenuates wander from 2.1 Hz Fast Lock mode P |
HD74AC04P HD74AC04P  |
|
|
99 |
The HD74AC04P is a 14 pin integrated circ |
HD74AC04RP HD74AC04RP  |
HIT |
SOP |
94P3 |
Conversion Time: CNV Rising Edge to Data Availab |
HD74AC04RPEL HD74AC04RPEL  |
HIT |
SOP3.9mm-14L |
2006 |
|
HD74AC04T HD74AC04T  |
|
|
|
The logic is supplied by the VCC voltage, typ. w |
HD74AC04TEL HD74AC04TEL  |
HITACHI |
05+/06+; |
|
The output serial data is straight binary, and i |
HD74AC04TELL HD74AC04TELL  |
HIT |
1997 |
TSSOP |
SUPPLY VOLTAGE, +VS to CVS OUTPUT CURRENT, con |
HD74AC08 HD74AC08  |
Hitachi |
|
|
|
HD74AC08FP HD74AC08FP  |
HIT |
SOP14 |
96+ |
The HYM72V32C756B(L)T8 Series are gold plated soc |
HD74AC08FPEL HD74AC08FPEL  |
HITACHI |
SOP |
1999 |
The CY7C138AV/144AV/006AV/007AV and CY7C139AV/ |
HD74AC08FPTL HD74AC08FPTL  |
HIT |
SOP |
99/P |
(1) The algebraic convention, whereby the most n |
HD74AC08FPTR HD74AC08FPTR  |
HIT |
|
96 |
The HMS9xC7132/4 is a single-chip microcontrolle |
HD74AC08P HD74AC08P  |
|
|
06+ |
The PCM58P accepts TTL-compatible logic input le |
HD74AC08PC HD74AC08PC  |
|
|
|
The A3946 is designed specifically |
HD74AC08RP HD74AC08RP  |
HIT |
SOP |
92P3 |
To assist in the transceiver evaluation proces |
HD74AC08RPEL HD74AC08RPEL  |
HIT |
SOP-14 3.9mm |
3L46 |
The HT6221/HT6222 remain in the halt mode during |
HD74AC08RP-EL HD74AC08RP-EL  |
HIT |
SOP |
93/P3 |
Important Information and Disclaimer:The informat |
HD74AC08TELL HD74AC08TELL  |
|
|
97 |
Notes: 1. For Max. or Min. conditions, use appr |
HD74AC107FPEL HD74AC107FPEL  |
HITACHI |
00+ |
SOP |
• Adjust the contrast in LCD displays |
HD74AC112P HD74AC112P  |
Hitachi |
|
|
The V3020 is a low power CMOS real time clock. D |
HD74AC123AP HD74AC123AP  |
HITATHI |
|
|
Connect control terminal to VIN terminal The qui |
HD74AC125 HD74AC125  |
Hitachi |
|
|
Drain-Source Voltage Gate-to-Source Volta |
HD74AC125FP HD74AC125FP  |
HIT |
SOP |
02+ |
|
HD74AC125FPEL HD74AC125FPEL  |
HITACHI |
|
|
(4) Bold lines should be short and thick in PCB p |
HD74AC125FP-EL HD74AC125FP-EL  |
|
|
|
Radiation Hardened up to 1 x 10 6 Rads (Si) Sin |
HD74AC125FPER HD74AC125FPER  |
HITACHI |
SOP5.2 |
99 |
Each channel of the HA-2400/04/05 can be control |
HD74AC125FPTR HD74AC125FPTR  |
|
|
93 |
The STPC Atlas integrates a standard 5th genera |
HD74AC125P HD74AC125P  |
HIT |
SOP |
02+ |
Basic building blocks of the HCPL-x710 are a CMO |
HD74AC125TEL HD74AC125TEL  |
HITACHI |
TSOP-14 |
95+ |
The NCV8800 is an automotive synchronous |
HD74AC125TELL HD74AC125TELL  |
HIT |
9935+ |
|
The MSK 5115 series are highly thermally conduct |
HD74AC126FP HD74AC126FP  |
Hitachi |
|
|
An external resistor RCF is recommended be- twe |
HD74AC126P HD74AC126P  |
Hitachi |
|
|
This advanced technology has been tailored to min |
HD74AC138 HD74AC138  |
Hitachi |
|
|
The HD74AC138 device utilizes DirectFET TM packa |
HD74AC138FP HD74AC138FP  |
N/A |
SOP |
07+ |
The D-Pak is designed for surface mounting using |
HD74AC138FPEL HD74AC138FPEL  |
HIT |
SOP-16 |
98+ |
• 1.25 (31.75mm) PCB Height • 168-Pi |
HD74AC138FPTL HD74AC138FPTL  |
HIT |
SOP |
97+ |
• 500-ps max. Total Timing Budget™ (T |
HD74AC138FPTR HD74AC138FPTR  |
|
|
|
The IN74AC14 is identical in pinout to th |
HD74AC138P HD74AC138P  |
HIT |
DIP |
01+ |
The base timer is an 8-bit counter with a 1MHz cl |
HD74AC138PF HD74AC138PF  |
HIT |
|
|
For the adjustable output controller, the VREF p |
HD74AC138RP HD74AC138RP  |
HIT |
SOP |
92/P |
The EC000 processor core communicates with these |
HD74AC138TELL HD74AC138TELL  |
|
|
|
C1 is the transfer capacitor and C2 stores energy |
HD74AC139 HD74AC139  |
Hitachi |
|
|
The Address Sequencer is a 24-bit programmable a |
HD74AC139FP HD74AC139FP  |
Hitachi |
|
|
Limits in standard typeface are for TJ = 25˚ |
HD74AC139FPEL HD74AC139FPEL  |
|
|
95 |
In simple mode all feedback paths of the output p |
HD74AC139FPTR HD74AC139FPTR  |
HIT |
|
95 |
Compliant to USB specifications Low MOSFET on re |
HD74AC139P HD74AC139P  |
Hitachi |
|
|
In the second-generation XC3000A LCA devices, in |
HD74AC14FP HD74AC14FP  |
Hitachi |
|
|
SSCG uses a patented technology of modulating th |
HD74AC14P HD74AC14P  |
Hitachi |
|
|
USB C Revision 1.1 compliant   |
HD74AC153FPTR HD74AC153FPTR  |
|
92 |
SOP |
Description Pulses for operating the MOS |
HD74AC154P HD74AC154P  |
HIT |
DIP |
DIP |
(Both segment mode and common mode) ! Supply vol |
HD74AC157 HD74AC157  |
Hitachi |
|
|
Note 6: A filter on SDA and SCL delays the sampli |
HD74AC157FP HD74AC157FP  |
HIT |
08+ |
|
The HD4074318 is a PROM version ZTAT™ micr |
HD74AC157FPEL HD74AC157FPEL  |
HIT |
SOP |
97/P2 |
Note A: Characteristic data has been developed f |
HD74AC157FPTR HD74AC157FPTR  |
HIT |
SOP |
95+ |
A proper value of feed forward capacitor parallel |
HD74AC157P HD74AC157P  |
HIT |
|
|
When the VO2Cont terminal voltage is set to 0.5V |
HD74AC158FPTR HD74AC158FPTR  |
HIT |
SOP-16 |
92 |
Either 256 refresh cycles or read/write cycles o |
HD74AC161P HD74AC161P  |
Hitachi |
|
|
For example, if the OTG Host were to turn off VBU |
HD74AC164 HD74AC164  |
Hitachi |
|
|
CLOCK functions as a pipeline clock, loading the |
HD74AC164FP HD74AC164FP  |
Hitachi |
|
|
All components of a charge pump, except the hold |
HD74AC164FPEL HD74AC164FPEL  |
HIT |
99 |
1250
|
The RFR6000 device is fabricated using a SiGe Bi |
HD74AC164FPTL HD74AC164FPTL  |
HIT |
|
|
If you have any marketing or sales questions, ple |
HD74AC164FPTR HD74AC164FPTR  |
HIT |
|
00 |
SEN enables serial loading of programmable flag o |
HD74AC164P HD74AC164P  |
|
|
96 |
† Stresses beyond those listed under absol |
HD74AC166F HD74AC166F  |
HIT |
08+ |
|
|
HD74AC166FP-EL HD74AC166FP-EL  |
HIT |
SOP |
97+ |
When the receiver is placed in the power-down (sl |
HD74AC166P HD74AC166P  |
HIT |
DIP-16 |
00+ |
The IL400 is an optically coupled SCR with a gal |
HD74AC174P HD74AC174P  |
HIT |
|
06+ |
This document is a general product description an |
HD74AC175 HD74AC175  |
HITACHI |
SOP5.2 |
98 |
n Sector Protection C Sectors may be lock |
HD74AC175FP HD74AC175FP  |
Hitachi |
|
|
High speed switching (tstg: storage time/t |
HD74AC175FPEL HD74AC175FPEL  |
HIT |
2000 |
798
|
Each channel is equipped with a programmable Vce |
HD74AC175P HD74AC175P  |
Hitachi |
|
|
OFFSET VOLTAGE, initial OFFSET VOLTAGE, vs. te |
HD74AC240FP HD74AC240FP  |
Hitachi |
|
|
• CASE: Hermetically sealed DO-213AB glass |
HD74AC240FPEL HD74AC240FPEL  |
HIT |
|
|
A six-byte command (Enter Single Pulse Program M |
HD74AC240FPT HD74AC240FPT  |
|
|
|
The HD74AC240FPT is tested using the CCIF standa |
HD74AC240FPTR HD74AC240FPTR  |
HIT |
|
|
Supports a 4 Gbps high bus bandwidth Variable b |
HD74AC240P HD74AC240P  |
|
|
97 |
The high-resolution (HR) SHARE feature allows ev |
HD74AC240RP HD74AC240RP  |
HIT |
SOP |
93P1 |
The ISL6434 includes an Intel® -compatible, |
HD74AC244 HD74AC244  |
Hitachi |
|
|
Core C ARM7TDMI 32-bit RISC CPU C 32 MIPS @ 3 |
HD74AC244FP HD74AC244FP  |
Hitachi |
|
|
The synchronous boost converter generates a low n |
HD74AC244FPEL HD74AC244FPEL  |
HIT |
SOP |
00P2 |
Port 3 pins P3.0 to P3.5, P3.7 are seven bi-dire |
HD74AC244FPT HD74AC244FPT  |
|
|
|
FACTORY INSTALLED OPTIONS 1 &nb |
HD74AC244FPTR HD74AC244FPTR  |
HIT |
SOP |
|
For applications requiring guaranteed RF-tested |
HD74AC244P HD74AC244P  |
Hitachi |
|
|
• fast CoolMOS power MOSFET - 2nd |
HD74AC244RP-EL HD74AC244RP-EL  |
HITACHI |
08+ |
|
Edition 16.3.99 Published by Siemens AG, Bereic |
HD74AC244TELL HD74AC244TELL  |
|
|
|
The RF2958 is a single-chip transceiver specific |
HD74AC245 HD74AC245  |
HITACHI |
|
|
Note 2: Electrical Table values apply only for fa |
HD74AC245FP HD74AC245FP  |
Hitachi |
|
|
All synchronous inputs pass through input registe |
HD74AC245FPE HD74AC245FPE  |
|
|
|
A resistor divider from this pin to the VOUT pin |
HD74AC245FPTR HD74AC245FPTR  |
HITACHI |
SOP |
97 |
Write Protect Pin and Write Disable Instructions |
HD74AC245P HD74AC245P  |
HIT |
|
06+ |
All input pins. Input pins XHD and CKI. Input |
HD74AC245RP-EL HD74AC245RP-EL  |
HITACHI |
|
93 |
"Preliminary" product information descr |
HD74AC245TEL HD74AC245TEL  |
|
94 |
SSOP |
The MCU core is fully compatible with the indust |
HD74AC273 HD74AC273  |
HITACHI |
SOP |
07+ |
|
HD74AC273FP HD74AC273FP  |
Hitachi |
|
|
The UCC3808 is a family of BiCMOS push-pull, hig |
HD74AC273FP-E HD74AC273FP-E  |
|
|
|
The CPU core of MTV230M is compatible with the in |
HD74AC273FPEL HD74AC273FPEL  |
HIT |
SOP |
99/P2 |
Transmit high impedance mode is activated by set |
HD74AC273P HD74AC273P  |
HIT |
|
|
Regulates voltage over a broad operating current |
HD74AC280FPEL HD74AC280FPEL  |
HIT |
SOP |
94/P |
The HD74AC280FPEL provides eight bits of |
HD74AC280P HD74AC280P  |
Hitachi |
|
|
CAUTION: These devices are sensitive to e |
HD74AC283 HD74AC283  |
Hitachi |
|
|
Serial-test information is conveyed by means of |
HD74AC283FPEL HD74AC283FPEL  |
HIT |
SOP |
95/P2 |
Notes: 1. Repetitive Rating : Pulse width limite |
HD74AC283P HD74AC283P  |
Hitachi |
|
|
The PWR5104 and PWR5105 offer respectively 12VDC |
HD74AC32 HD74AC32  |
Hitachi |
|
|
Capacitor Table Table 1 identifies the character |
HD74AC32FP HD74AC32FP  |
HIT |
SOP14 |
97+ |
PNPN devices designed for high volume, li |
HD74AC32FPEI HD74AC32FPEI  |
HIT |
|
|
LDQM and UDQM control the lower and upper bytes |
HD74AC32FPEL HD74AC32FPEL  |
|
0 |
SOP |
NOTES: 1. Stresses greater than those listed un |
HD74AC32FP-EL HD74AC32FP-EL  |
|
|
|
I/O performance is increased to 622 Mb/s using S |
HD74AC32FPTR HD74AC32FPTR  |
|
92 |
SOP |
Fifth Generation HEXFETs from International Recti |
HD74AC32P HD74AC32P  |
HIT |
|
|
24 Bits, No Missing Codes Fixed-Channel or Autom |
HD74AC32RP HD74AC32RP  |
HIT |
SOP |
92P3 |
The recommended dose of ultraviolet light for era |
HD74AC32TEL HD74AC32TEL  |
HITACHI |
TSSOP |
95+ |
The HC595 contain an 8-bit serial-in, parallel-o |
HD74AC32TELL HD74AC32TELL  |
HIT |
|
|
Instructions 1. Place codewheel on shaft. 2. |
HD74AC373FP HD74AC373FP  |
Hitachi |
|
|
Stresses beyond those listed under "absolut |
HD74AC373FPEL HD74AC373FPEL  |
HIT |
SOP |
01/P2 |
The Kawasaki KL5KUSB111 Controller is a unique s |
HD74AC373FPEL-E HD74AC373FPEL-E  |
HITACHI |
|
|
ADVANCE INFORMATION documents contain information |
HD74AC373FPTR HD74AC373FPTR  |
|
92 |
SOP |
Data Outputs: A 4-bit parallel data word, forming |
HD74AC373P HD74AC373P  |
HIT |
|
06+ |
To close the feedback loop of the PI6C2308A, the |
HD74AC374 HD74AC374  |
Hitachi |
|
|
DigitalClarity ™ CMOS Imaging Techno |
HD74AC374FP HD74AC374FP  |
Hitachi |
|
|
The UC1854 provides active power factor correcti |
HD74AC374P HD74AC374P  |
HIT |
|
05+ |
This device is manufactured on a complimentary h |
HD74AC393FPEL HD74AC393FPEL  |
HIT |
SOP |
97+ |
Hynix HYMD132G725A(L)4-K/H/L series is registered |
HD74AC393FPTR HD74AC393FPTR  |
HIT |
SOP |
93/P2 |
Tutte le informazioni contenute sul presente man |
HD74AC393P HD74AC393P  |
Hitachi |
|
|
RFMs RX5000 series amplifier-sequenced hybrid (AS |
HD74AC74 HD74AC74  |
Hitachi |
|
|
Power DissipationInternally limited Input Volta |
HD74AC74FP HD74AC74FP  |
Hitachi |
|
|
2. A variety of power saving modes Attach |
HD74AC74FPEL HD74AC74FPEL  |
HIT |
SOP |
01/P |
TI does not warrant or represent that any licens |
HD74AC74FP-EL HD74AC74FP-EL  |
HIT |
|
97 |
Fault Status (Output): Open drain N-Channel devi |
HD74AC74FPER HD74AC74FPER  |
|
|
|
The video control inputs drive weighted current |
HD74AC74P HD74AC74P  |
Hitachi |
|
|
Notes: 1. For codes not listed in the figure ab |
HD74AC74RP HD74AC74RP  |
HIT |
SOP |
92P3 |
Acknowledge Acknowledge is a software conventio |
HD74AC74TEL HD74AC74TEL  |
|
|
|
M/S = VIH for BUSY output flag on Master M/S = |
HD74AC86 HD74AC86  |
Hitachi |
|
|
Notes a: Stresses greater than those listed und |
HD74AC86FP HD74AC86FP  |
Hitachi |
|
|
INPUT CAPACITOR To improve load transien |
HD74AC86FPEL HD74AC86FPEL  |
HIT |
SOP |
97+ |
Absolute maximum continuous ratings are those va |
HD74AC86FPTL HD74AC86FPTL  |
HIT |
SOP |
97/P |
Device erasure occurs by executing the erase com |
HD74ACQ245 HD74ACQ245  |
|
93 |
SOP |
ESD damage can range from subtle performance deg |
HD74ACT08TELL HD74ACT08TELL  |
HIT |
SSOP |
07+ |
• Direct bus connection when switches are |
HD74ACT107P HD74ACT107P  |
HIT |
06+ |
1250 |
8-bit resolution. ADC gain adjust. 2 GHz full p |
HD74ACT112FP HD74ACT112FP  |
HIT |
|
99 |
† Stresses beyond those listed under absol |
HD74ACT112P HD74ACT112P  |
N/A |
DIP |
07+ |
The devices feature single 3.0 V power supply op |
HD74ACT125FP HD74ACT125FP  |
Hitachi |
|
|
After FIR filtering, data can be routed directly |
HD74ACT125FPEL HD74ACT125FPEL  |
HIT |
SOP |
99 |
|
HD74ACT125TEL HD74ACT125TEL  |
HIT |
96 |
2500
|
Notes: 1. If the protect bit of the byte addres |
HD74ACT125TELL HD74ACT125TELL  |
HIT |
07+ |
|
This flip-flop has independent data, preset, cle |
HD74ACT138 HD74ACT138  |
HITACHI |
TSSOP |
00+ |
Magnitude of Common Emitter Small-Signal Short C |
HD74ACT138FP HD74ACT138FP  |
Hitachi |
|
|
The epoxy TO-92 and TO-220 configurations feature |
HD74ACT138FPEL HD74ACT138FPEL  |
HITACHI |
SOP16 |
04+ |
(3) The products described in this material are |
HD74ACT138P HD74ACT138P  |
Hitachi |
|
|
The Hynix HY57V281620E(L)T(P) series is a 134,217 |
HD74ACT138RP HD74ACT138RP  |
HIT |
SOP |
92P3 |
Low stand-by current 0.1µA (typ.) Directl |
HD74ACT138RP-EL HD74ACT138RP-EL  |
HIT |
94+ |
14200
|
Muting all channel drivers can be obtained using |
HD74ACT138TELL HD74ACT138TELL  |
HIT |
2000 |
1985
|
The timing of the demodulated data signal is del |
HD74ACT139 HD74ACT139  |
Hitachi |
|
|
Peak Pulse Power dissipation at 25ºC: 1500 w |
HD74ACT139FPEL HD74ACT139FPEL  |
HITACHI |
SOP16 |
04+ |
The DDX-2100 is a high efficiency dual channel d |
HD74ACT161P HD74ACT161P  |
HIT |
|
06+ |
Crystal Oscillator Period 19.79 Hz Update Rate |
HD74ACT164 HD74ACT164  |
Hitachi |
|
|
NOTES: (1) Stresses above these ratings may caus |
HD74ACT164P HD74ACT164P  |
HIT |
|
06+ |
Features • Resistant to High Humidity and |
HD74ACT166FP HD74ACT166FP  |
HITACHI |
97 |
|
Inductance Tolerance: 10% standard. 5% availab |
HD74ACT166P HD74ACT166P  |
Hitachi |
|
|
Silicon chip on Direct-Copper-Bond substrate - |
HD74ACT240FP HD74ACT240FP  |
Hitachi |
|
|
The CAN-transceiver TLE 6250 is a monolithic int |
HD74ACT240FPEL HD74ACT240FPEL  |
HIT |
SOP |
00+ |
VOUT = 3.3 V, IOUT = 300 mA Current−Mode P |
HD74ACT240P HD74ACT240P  |
HIT |
DIP-20P |
0027+ |
Maximum ratings are those values beyond which de |
HD74ACT240TELL HD74ACT240TELL  |
HIT |
0606+ |
|
Internal PWM current control. Each pair of output |
HD74ACT244 HD74ACT244  |
Hitachi |
|
|
This product paves the way for a smaller, ligh |
HD74ACT244FP HD74ACT244FP  |
HIT |
5.2MM |
95+ |
The QS3VH16245 HotSwitch is a 16-bit high |
HD74ACT244FPEL HD74ACT244FPEL  |
MIT |
SOP |
02+ |
DESCRIPTION This MOSFET is the latest developme |
HD74ACT244FPTL HD74ACT244FPTL  |
HITACHI |
95+ |
SOP-20 |
Fully Compliant to IrDA 1.0 Physi |
HD74ACT244FPTR HD74ACT244FPTR  |
|
|
|
The Start Circuitry generates the output signal |
HD74ACT244P HD74ACT244P  |
Hitachi |
|
|
|
HD74ACT244RP HD74ACT244RP  |
HIT |
SOP |
92P1 |
The IC provides 12 key inputs (KEY1~KEY12). Of |
HD74ACT244TEL HD74ACT244TEL  |
HITACHI |
TSSOP |
00+ |
Signal Processors (DSPs) TMS320C62x C 5-, 4-, 3. |
HD74ACT244TELL HD74ACT244TELL  |
HIT |
SOP20 |
94+ |
Connect a resistor from this pin to the drain of |
HD74ACT245 HD74ACT245  |
Hitachi |
|
|
• Fast Page Mode Access Cycle • TTL |
HD74ACT245FP HD74ACT245FP  |
HIT |
SOP |
01+ |
The Motorola accelerometers contain an on |
HD74ACT245FPEL HD74ACT245FPEL  |
HIT |
SOP20L |
00+ |
Motorola reserves the right to make changes with |
HD74ACT245FP-EL HD74ACT245FP-EL  |
HIT |
|
|
NOTE: Intersil Pb-free plus anneal products emplo |
HD74ACT245FPER HD74ACT245FPER  |
HIT |
|
98+ |
Footnotes: 1) Standard frequency stability (20,2 |
HD74ACT245FPTL HD74ACT245FPTL  |
|
|
95 |
Device Description The following information is |
HD74ACT245P HD74ACT245P  |
HIT |
|
05+ |
DESCRIPTION The HD74ACT245PB is a monolithic in |
HD74ACT245RP HD74ACT245RP  |
HIT |
SOP |
92P1 |
s High-speed: 35, 70 ns s Ultra low DC operating |
HD74ACT245RPEL HD74ACT245RPEL  |
HIT |
SOP7.2mm-20L |
2006 |
Chapter 4, "Control Registers," contain |
HD74ACT245RP-EL HD74ACT245RP-EL  |
HIT |
原装 |
03+ |
In a slow mode, the conversion is completed befo |
HD74ACT245TELL HD74ACT245TELL  |
HIT |
05+/06+ |
|
CMOS Low Power Consumption Oscillation Frequency |
HD74ACT24FP HD74ACT24FP  |
|
|
|
Organization Memory cell allay 528 ´ |
HD74ACT280P HD74ACT280P  |
N/A |
N/A |
N/A |
ELECTRICAL CHARACTERISTICS A.C. T amb = C40C t |
HD74ACT32RP HD74ACT32RP  |
HIT |
|
92P3 |
NOTE : 1. Samsung are not designed or manufactur |
HD74ACT367P HD74ACT367P  |
Hitachi |
|
|
In terms of signal measurement, THD+N is the rat |
HD74ACT373 HD74ACT373  |
HIT |
SOP |
06+ |
n Drives up to 7 LEDs with up to 20mA each n LE |
HD74ACT373FP HD74ACT373FP  |
HIT |
SOP |
93P2 |
<Mobile SDRAM> • Power Supply Volta |
HD74ACT373FPT HD74ACT373FPT  |
|
|
|
All parameters are measured in a Helmholtz arran |
HD74ACT373P HD74ACT373P  |
Hitachi |
|
|
A read cycle is initiated by the falling edge of |
HD74ACT373RP HD74ACT373RP  |
HIT |
2003+ |
SOP-20 |
The output and reset of the integrators is contr |
HD74ACT374FP HD74ACT374FP  |
Hitachi |
|
|
Continuous Drain Current, VGS @ 10V Continuous |
HD74ACT374FPEL HD74ACT374FPEL  |
HITACH |
|
|
Notes: 1. The input and output negative-voltage |
HD74ACT374FPTR HD74ACT374FPTR  |
|
|
|
The device is available with an access time of 5 |
HD74ACT374P HD74ACT374P  |
Hitachi |
|
|
The MSK 610 is a high voltage very wideba |
HD74ACT86 HD74ACT86  |
Hitachi |
|
|
reliable operation, the stored energy from circu |
HD74ACTQ245 HD74ACTQ245  |
|
|
|
Figure 4 illustrates the differential or |
HD74AG245FP HD74AG245FP  |
|
|
|
The integrated low-power high-efficiency dc-dc c |
HD74AHC1G66CMEN HD74AHC1G66CMEN  |
HITACHI/RENESAS |
SOT-353 |
|
This is an advance information data sheet The A |
HD74ALAC162835A HD74ALAC162835A  |
|
|
|
The DM9801 uses a low-power and high-performance |
HD74ALC162835ATE HD74ALC162835ATE  |
Renesas Technology America |
TSSOP56L |
9950+ |
The user can program the frequency of the output |
HD74ALC2G04USE HD74ALC2G04USE  |
RENESAS |
|
04+ |
The LM4781 is a three channel audio amplifier ca |
HD74ALCVCH16374TE HD74ALCVCH16374TE  |
HITACHL |
TSSOP |
02+ |
Q Channel 4-bit A-D Converter's digital outputs, |
HD74ALF162834TE HD74ALF162834TE  |
HIT |
TSSOP56 |
07+ |
|
HD74ALF162835TE HD74ALF162835TE  |
|
|
|
† Package drawings, standard packing |
HD74ALS06P HD74ALS06P  |
|
|
|
NOTES: 1. A14X is a NC for IDT70V9269. 2. All V |
HD74ALS175 HD74ALS175  |
N/A |
SOP |
07+ |
The MOC810X and CNY17F-X devices consist of a ga |
HD74ALS540FP HD74ALS540FP  |
HIT |
|
|
• Two potentiometers in one package • |
HD74ALV16245TEL HD74ALV16245TEL  |
RENESAS |
SSOP |
04+ |
Zener Voltage Range − 3.3 V to 200 V ESD |
HD74ALV2G04USE HD74ALV2G04USE  |
HITACHI |
|
03+ |
Note 2: Operating Ratings indicate conditions for |
HD74ALVC162834ATE HD74ALVC162834ATE  |
HITACHI |
|
|
OBDIn (pin11) The OBD data is input to thi |
HD74ALVC162835A HD74ALVC162835A  |
HITACHI |
SMD |
|
NOTES: 1. A write occurs during the overla |
HD74ALVC162835AT HD74ALVC162835AT  |
Hitachi |
|
|
− Timer 1: Offers auto-reload functi |
HD74ALVC162835CTE HD74ALVC162835CTE  |
TSSOP-56P |
HITACHI |
00+ |
6. JA is measured in free air with the component |
HD74ALVC162835TE HD74ALVC162835TE  |
Renesas Technology America |
|
|
Stresses above those listed under Absolute Maxim |
HD74ALVC162835VC HD74ALVC162835VC  |
|
|
98 |
The Hynix HYM7V63801B F-Series are 8Mx64bits Sync |
HD74ALVC162836TE HD74ALVC162836TE  |
HITACHI |
|
98 |
The SSM2275 and SSM2475 are ideal for applicatio |
HD74ALVC162836TEL HD74ALVC162836TEL  |
HIT |
99 |
78600
|
The DS1386 executes a read cycle whenever WE (Wri |
HD74ALVC16334 HD74ALVC16334  |
Hitachi |
|
|
The TP3070 and TP3071 are second-generation comb |
HD74ALVC16835TE HD74ALVC16835TE  |
HIT |
|
O7+ |
NOTES: 1. Dimensions are inches. Metric equival |
HD74ALVC16835TEL HD74ALVC16835TEL  |
HIT |
TSSOP56 |
04+ |
The Simtek STK11C88 is a fast static RAM with a |
HD74ALVC1G00VSE HD74ALVC1G00VSE  |
HIT |
SOT23 |
0210+PB |
Notes: 1. Repetitive Rating : Pulse width limite |
HD74ALVC1G04VSE HD74ALVC1G04VSE  |
|
|
|
The CS8920A is a single-chip, ISA Plug-and- Pla |
HD74ALVC1G06CM HD74ALVC1G06CM  |
renesas/Hitachi |
SOT-353 |
06+ |
s Three-Terminal Adjustable Or Fixed Outp |
HD74ALVC1G07CM HD74ALVC1G07CM  |
renesas/Hitachi |
SOT-353 |
06+ |
|
HD74ALVC1G07VSE HD74ALVC1G07VSE  |
HITHCHI |
SOT-353 |
05+pb |
Inputs Are TTL-Voltage Compatible Flow-Through A |
HD74ALVC1G08VSE HD74ALVC1G08VSE  |
HITACHI |
SOT353 |
04+ |
The device offers a highly integrated solution fo |
HD74ALVC1G126CM HD74ALVC1G126CM  |
renesas/Hitachi |
SOT-353 |
06+ |
Small 8-pin package types: SO8 and TSSOP8 |
HD74ALVC1G126VSE HD74ALVC1G126VSE  |
HITACHI |
|
03+ |
1. - T - = Seating Plane and Datum Surface. 2. |
HD74ALVC1G14CM HD74ALVC1G14CM  |
renesas/Hitachi |
SOT-353 |
06+ |
and negative supplies separately and add the pow |
HD74ALVC1G14VSE HD74ALVC1G14VSE  |
HIT |
SOT-553 |
04+ |
• Designed for industrial and telecommunic |
HD74ALVC1G240VSE HD74ALVC1G240VSE  |
HITACHI |
|
03+ |
The LM2471 is an integrated high voltage CRT dri |
HD74ALVC1G32VSE HD74ALVC1G32VSE  |
HITACHI |
|
03+ |
− Low Noise: 75nV PGA From 1 to 128 |
HD74ALVC1G66VSE HD74ALVC1G66VSE  |
RENESAS |
SOT-553 |
06NOPB |
‡ Stresses beyond those listed under absol |
HD74ALVC1G79CM HD74ALVC1G79CM  |
renesas/Hitachi |
SOT-353 |
06+ |
‡ Stresses beyond those listed under absol |
HD74ALVC1G79VSE HD74ALVC1G79VSE  |
RENESAS |
SC70-5 |
2006 |
Note: Stresses greater than those listed under |
HD74ALVC1G80CM HD74ALVC1G80CM  |
renesas/Hitachi |
SOT-353 |
06+ |
Small outline SO8 and TO92 style packages. No s |
HD74ALVC1G80VSE HD74ALVC1G80VSE  |
SOT-353 |
RENESAS |
05+ |
Thaler Corporation has developed a nonlinear co |
HD74ALVC1G86VSE HD74ALVC1G86VSE  |
RENESAS |
SOT-353 |
05+PB |
It is our intention to provide our valued custom |
HD74ALVC2G02USE HD74ALVC2G02USE  |
HITACHI |
|
03+ |
True Dual-Port memory cells which allow simultane |
HD74ALVC2G04USE HD74ALVC2G04USE  |
|
|
|
The driver controls the gate voltage of the powe |
HD74ALVC2G04USE-E HD74ALVC2G04USE-E  |
|
|
|
As VCE is further increased, beyond the thermally |
HD74ALVC2G06USE HD74ALVC2G06USE  |
HITACHI |
|
03+ |
n Available in 1.8V, 2.5V, 2.85V, 3.3V, 5V, and |
HD74ALVC2G07USE HD74ALVC2G07USE  |
|
|
|
|
HD74ALVC2G08USE HD74ALVC2G08USE  |
HITACHI |
|
03+ |
HXXXXZ High voltage level High volt |
HD74ALVC2G126USE HD74ALVC2G126USE  |
HITACHI |
|
03+ |
• 15 kV/µs Common-Mode Rejec |
HD74ALVC2G14USE HD74ALVC2G14USE  |
HITACHI |
|
03+ |
The MT8985 master clock (C4i) is a 4.096 MHz allo |
HD74ALVC2G157USE HD74ALVC2G157USE  |
HITACHI |
|
03+ |
The PI6C104 is a high-speed low-noise clock gener |
HD74ALVC2G240AUSE HD74ALVC2G240AUSE  |
|
|
|
Cartesian amplitude and phase modulation 1.5 GH |
HD74ALVC2G240USE HD74ALVC2G240USE  |
HITACHI |
|
03+ |
For improved FM performance, an integrated IF fi |
HD74ALVC2G241USE HD74ALVC2G241USE  |
HITACHI |
|
03+ |
The UCC3808A dual output drive stages are arrang |
HD74ALVC2G245USE HD74ALVC2G245USE  |
HITACHI |
|
03+ |
AfT = exp((Ea/k)*(1/Tu - 1/Ts)) = tu/ts AfT = Ac |
HD74ALVC2G32AUSE HD74ALVC2G32AUSE  |
|
|
|
Specifications are production tested at TA =25C. |
HD74ALVC2G32USE HD74ALVC2G32USE  |
RENESAS |
|
03+ |
Note: Both regulators can be bypassed if external |
HD74ALVC2G32USE-E- HD74ALVC2G32USE-E-  |
|
|
|
The MC68307 (shown in Figure 1) contains a stati |
HD74ALVC2G34AUSE HD74ALVC2G34AUSE  |
|
|
|
The SN74GTLP22034 is a high-drive, 8-bit, three- |
HD74ALVC2G34USE HD74ALVC2G34USE  |
HITACHI |
|
03+ |
The transient conduction of charge during and af |
HD74ALVC2G53USE HD74ALVC2G53USE  |
|
|
|
The HSDL-3600 comes in three package options; |
HD74ALVC2G74USE HD74ALVC2G74USE  |
RENESAS |
SOT-8 |
|
Literature Distribution Centers: USA: Motorola |
HD74ALVC2G86USE HD74ALVC2G86USE  |
HITACHI |
SOT-183 |
05+ |
The TPS211x family of power multiplexers enables |
HD74ALVCF162834TEL HD74ALVCF162834TEL  |
|
|
|
Input Current, IIN Input Capacitan |
HD74ALVCF162835TEL HD74ALVCF162835TEL  |
|
|
|
Specifically designed for Automotive application |
HD74ALVCH16244 HD74ALVCH16244  |
Hitachi |
|
|
This is a Class B product based on the standard |
HD74ALVCH16244TE HD74ALVCH16244TE  |
HIT |
|
00 |
† All typical values are at VCC = 5 V, TA |
HD74ALVCH16244TE-E HD74ALVCH16244TE-E  |
|
|
|
Information furnished by Analog Devices is belie |
HD74ALVCH16244TEL HD74ALVCH16244TEL  |
HITACHI |
03+ |
SSOP |
The minimum pulse width of the pulse generator is |
HD74ALVCH16245 HD74ALVCH16245  |
HITACHI |
|
|
SS (Pin 10): Soft Start. Connect a capacitor (CSS |
HD74ALVCH16245TE HD74ALVCH16245TE  |
HIT |
|
00 |
Before valid data exchanges between the serializ |
HD74ALVCH16245TE-E HD74ALVCH16245TE-E  |
|
|
|
The information provided herein is believed to b |
HD74ALVCH16245TEL HD74ALVCH16245TEL  |
HIT |
TSSOP |
2001 |
Meets the ExpressCard™ Standard (ExpressCa |
HD74ALVCH162501TEL HD74ALVCH162501TEL  |
HITACHI |
02+ |
TSSOP |
OSD - Muestra en la pantalla el nmero del canal, |
HD74ALVCH16260TELL HD74ALVCH16260TELL  |
TI |
TSSOP |
98 |
The no-correction window acts as a filter for low |
HD74ALVCH162721T HD74ALVCH162721T  |
Hitachi |
|
|
Gain Control Range Phase Control R |
HD74ALVCH16373 HD74ALVCH16373  |
Hitachi |
|
|
Glass passivated high commutation triacs in a |
HD74ALVCH16374TE HD74ALVCH16374TE  |
HIT |
TSSOP48 |
04+ |
n Efficiency up to 92% n Simple and easy to de |
HD74ALVCH16374TEL HD74ALVCH16374TEL  |
HITACHI |
TSSOP |
03+ |
The STPC Atlas integrates two USB ports. Univer |
HD74ALVCH16820TE HD74ALVCH16820TE  |
|
|
|
The CopperWing12 ADSL Chipset family targets a |
HD74ALVCHS162830TEL HD74ALVCHS162830TEL  |
HITACIH |
TSSOP |
01+ |
These counters feature a fully independent clock |
HD74AVC16245 HD74AVC16245  |
HITACHI |
|
|
|
HD74BC16244A HD74BC16244A  |
|
|
|
The HD74BC16244A consists of two sets of nine D- |
HD74BC240AFP HD74BC240AFP  |
|
|
|
This device is particularly well suited for port |
HD74BC240AFPEL HD74BC240AFPEL  |
|
|
|
ICSI reserves the right to make changes to its pr |
HD74BC240AP HD74BC240AP  |
|
|
|
This three terminal negative adjustable voltage |
HD74BC244A HD74BC244A  |
HITACHI |
SSOP20 |
02+ |
Pulled-high, this pin is a Schmitt trigger input |
HD74BC244AFP HD74BC244AFP  |
|
|
|
Working Peak Reverse Voltage Range C 5.8 to 171 |
HD74BC244AFPEL HD74BC244AFPEL  |
|
|
|
|
HD74BC244AP HD74BC244AP  |
HIT |
|
95 |
Wafer Lot Acceptance Non-destructive Bond Pull |
HD74BC244ATQEL HD74BC244ATQEL  |
HITACHI |
|
|
DESCRIPTION Power input pins for VCC operate mod |
HD74BC245AFPEL HD74BC245AFPEL  |
|
|
|
SD is a serial bi-directional data bus which is |
HD74BC245AP HD74BC245AP  |
|
|
|
Chapter 2, "Address Spaces," describes |
HD74BC245ATQEL HD74BC245ATQEL  |
HITACHI |
|
TSSOP |
1.1 GHz Toggle Frequency Supply Voltage 4.5 to 5 |
HD74BC373 HD74BC373  |
HIT |
SOP |
95+ |
|
HD74BC373FPQER HD74BC373FPQER  |
|
|
|
Addresses, data I/Os, chip enables (E1, E2, E3), |
HD74BC374AFPEL HD74BC374AFPEL  |
|
|
|
The HD74BC374AFPEL is a monolithic CMOS analog-t |
HD74BC540 HD74BC540  |
|
|
|
At + 25C, the leakage current shall not exceed th |
HD74BC541AP HD74BC541AP  |
HITACHI |
|
|
The VCC supply to each optoisolator must |
HD74BC573AP HD74BC573AP  |
N/A |
DIP |
07+ |
only when the reference frequency divided by this |
HD74BC645FPQEL HD74BC645FPQEL  |
RENESAS |
01+ |
SOP-20 |
PWRGOOD(Undervoltage/LowerOvervoltage Output): T |
HD74C08FP HD74C08FP  |
|
|
02 |
The AAT351x PowerManager™ products are mem |
HD74C08P HD74C08P  |
|
|
|
The TVS low capacitance device configuration is s |
HD74C27P HD74C27P  |
|
|
|
FullCduplex capability External lo |
HD74CBT3244TELL-E HD74CBT3244TELL-E  |
|
|
|
system is fail-safe; that is, the slaves will be |
HD74CDC2509BSTE HD74CDC2509BSTE  |
SIERAWIRELESS |
00+ |
N/A |
available. The data applied to the data inputs a |
HD74CDC2509BTEL HD74CDC2509BTEL  |
HIT |
00+ |
SOP |
PG_DLY connects to an external capacitor to adju |
HD74CDC2509STE HD74CDC2509STE  |
HIT |
TSOP |
01+ |
s GENERAL DESCRIPTION The NJW1151 is a |
HD74CDC2510BTEL HD74CDC2510BTEL  |
Hitachi |
|
|
Bursts can be initiated with either ADSP (Addres |
HD74CDCF2509BTE HD74CDCF2509BTE  |
HIT |
TSSOP24 |
04+ |
4096 bits of nonvolatile dual-port memory   |
HD74CDCF2509BTEL HD74CDCF2509BTEL  |
Hitachi |
|
|
(VCC = +2.97V to +3.63V, CML output load is 50 |
HD74CDCF2510B01TE HD74CDCF2510B01TE  |
HIT |
|
|
The HYM72V16M636H(L)T6 Series are Dual In-line Me |
HD74CDCF2510BTE HD74CDCF2510BTE  |
HIT |
08+ |
|
Guaranteed by design and characterization. ESD |
HD74CDCF2510BTEL HD74CDCF2510BTEL  |
HIT |
SOP |
2000+ |
An analog to digital (A/D) conversion can |
HD74CDCV852SSEL HD74CDCV852SSEL  |
RENESAS |
SSOP-28 |
2003+ |
(Continued) Instruction system best suit |
HD74CO4FPEL HD74CO4FPEL  |
|
|
|
At TA = +25C, VDDA = VDDB = VDDR = +5V, load res |
HD74CS157P HD74CS157P  |
|
|
|
Conexant products are not intended for use in med |
HD74CS32 HD74CS32  |
|
|
|
Programming of each output occurs through an ind |
HD74CT240P HD74CT240P  |
HIT |
DIP |
04/05+ |
FO transceivers The widely used Time Division Mu |
HD74F126P HD74F126P  |
|
|
|
Packaging Codes - Options (Antistatic): SML4728 |
HD74F157ASJ HD74F157ASJ  |
HITACHI |
|
|
An address block is completed when the number of |
HD74H123A HD74H123A  |
|
|
|
The function generator can OR its inputs, wideni |
HD74H139P HD74H139P  |
|
|
|
producing n sets of encrypted (ciphertext) blocks |
HD74H175P HD74H175P  |
HIT |
|
93 |
The MAX7447 is designed to process S-Video and C |
HD74H373T1 HD74H373T1  |
|
|
00 |
The AMC5902 is a monolithic chip with 6 channel |
HD74HC/LS374P HD74HC/LS374P  |
|
|
|
Protection diodes are employed at all pin |
HD74HC00 HD74HC00  |
HIT |
SMD |
SMD |
• Extended single - supply voltage range 2 |
HD74HC00FP HD74HC00FP  |
|
|
02 |
FEATURES Wideband Switch: C3 dB @ 4.5 GHz Abso |
HD74HC00FPD HD74HC00FPD  |
|
|
|
† Package drawings, standard packing quant |
HD74HC00FPDEL HD74HC00FPDEL  |
HITACHI |
SOP |
2002 |
The MAX6326/MAX6327/MAX6328/MAX6346/MAX6347/ MAX |
HD74HC00FP-E HD74HC00FP-E  |
|
|
|
The CS8920A is available in a thin 144-pin TQFP |
HD74HC00FPEL HD74HC00FPEL  |
HIT |
SOP |
95+ |
Logic Output. The Watchdog Output, WDO, goes low |
HD74HC00FPER HD74HC00FPER  |
HITACHI |
08+ |
|
4 PLL architecture Linear frequency programming |
HD74HC00FPLH HD74HC00FPLH  |
HIT |
|
5.2mm |
Notes: (i) For operation below 0 C the external |
HD74HC00FPTL HD74HC00FPTL  |
HIT |
|
94 |
The Self Refresh allows the user a dynamic refre |
HD74HC00FP-TL HD74HC00FP-TL  |
HIT |
SOP5.2mm-14L |
2006 |
The 74HC/HCT153 have two identical 4-input mul |
HD74HC00FPTR HD74HC00FPTR  |
HITACHI |
SMD |
93+ |
|
HD74HC00P HD74HC00P  |
HIT |
DIP |
DIP |
By leaving both the RCLK and RSER outputs unconn |
HD74HC00RP HD74HC00RP  |
HITACHI |
SMD |
95+ |
Note 2: Absolute maximum ratings are those values |
HD74HC00RPEL HD74HC00RPEL  |
HIT |
SOP14L |
9736 |
Fourth Generation HEXFETs from International Rect |
HD74HC00RP-EL HD74HC00RP-EL  |
HIT |
SOP |
93/P |
• Supports AT&T TR62411 and Telcordia |
HD74HC00TELL HD74HC00TELL  |
HIT |
|
98 |
for individual units, within the specified |
HD74HC00Y HD74HC00Y  |
N/A |
DIP |
94 |
These data selectors/multiplexers contain inver |
HD74HC01FP HD74HC01FP  |
HIT |
SOP5.2 |
01+ |
FEAST provides a flexible slave interface for eas |
HD74HC01P HD74HC01P  |
HIT |
DIP |
DIP |
Data Inputs/Outputs (DQ0-DQ7). The Data In- puts |
HD74HC02 HD74HC02  |
HIT |
SMD |
SMD |
The FM811/FM812 is a low cost microprocessor sup |
HD74HC02D HD74HC02D  |
|
|
|
CAUTIONS: The BiCMOS inherent to the design of |
HD74HC02FP HD74HC02FP  |
HITACHI |
SOP5.2mm-14L |
2006 |
Agilent Part # and Options Commercial MIL-PRF- |
HD74HC02FPEL HD74HC02FPEL  |
HITACHI |
SMD |
98+ |
1.8-V to 3.6-V Input Voltage Range UltraLow Oper |
HD74HC02FPTL HD74HC02FPTL  |
HIT |
|
5.2mm |
The HFBR-5710L offers maxi- mum flexibility to |
HD74HC02FRTR HD74HC02FRTR  |
HIT |
|
94 |
Each GLB contains 32 macrocells and a fully popu |
HD74HC02P HD74HC02P  |
HIT |
DIP |
DIP |
ternational Airport Industrial Park • Maili |
HD74HC02P-E HD74HC02P-E  |
|
|
|
3. Initializes function parameters. The paramete |
HD74HC02RPEL HD74HC02RPEL  |
HIT |
SMD |
|
Fourth Generation HEXFETs from International Re |
HD74HC02RP-EL HD74HC02RP-EL  |
HIT |
|
93 |
(Unless otherwise specified, these specification |
HD74HC02TEL HD74HC02TEL  |
HIT |
TSSOP |
92+ |
In the external oscillator mode the external sou |
HD74HC02TELL HD74HC02TELL  |
HIT |
|
04+ |
CAUTION: These devices are sensitive to e |
HD74HC04 HD74HC04  |
HIT |
SMD |
96+ |
Writing memory data is performed in word/byte inc |
HD74HC043.9MM HD74HC043.9MM  |
|
|
|
Add to the Interrupt Acknowledge Bus Cycles sect |
HD74HC04A HD74HC04A  |
HITACHI |
SMD |
1996 |
(5) When designing your equipment, comply with t |
HD74HC04AP HD74HC04AP  |
|
|
|
The PI6C104 is a high-speed low-noise clock gener |
HD74HC04AP-TL HD74HC04AP-TL  |
HIT |
SOP5.2mm-14L |
2006 |
The two independent ADCs (primary and auxiliary) |
HD74HC04FP HD74HC04FP  |
HIT |
SOP |
99/P2 |
|
HD74HC04FP-E HD74HC04FP-E  |
|
|
|
1. ICC is dependent on output loading when the d |
HD74HC04FPEL HD74HC04FPEL  |
HIT |
SOP |
01+ |
A power-up clear function is supplied that force |
HD74HC04FPLH HD74HC04FPLH  |
|
|
100 |
Notes a. Surface Mounted on 1 x 1 FR4 Board. b |
HD74HC04FPTL HD74HC04FPTL  |
|
|
|
The TCMD10.. Series consist of a photodarlington |
HD74HC04FPTR HD74HC04FPTR  |
HITACHI |
SMD |
N/A |
Input to configure for DDR-ONLY mode or STANDARD |
HD74HC04FRTR HD74HC04FRTR  |
HITACHI |
08+ |
|
The HT1204 monolithic quad analog switch consist |
HD74HC04P HD74HC04P  |
|
|
03+ |
The HY29DS16x can be programmed and erased in-s |
HD74HC04PD HD74HC04PD  |
|
|
|
Normally the PWM comparator will sense a ramp cr |
HD74HC04PLEADFREE HD74HC04PLEADFREE  |
|
|
|
The MC74HC245A is identical in pinout to |
HD74HC04RP HD74HC04RP  |
Hitachi |
|
|
† All typical values are at VCC = 3.3 V or |
HD74HC04RPEL HD74HC04RPEL  |
|
SMD |
|
Notes regarding these materials 1. These materia |
HD74HC04RP-EL HD74HC04RP-EL  |
HIT |
SMD |
95+ |
These devices do not normally require heat sinks |
HD74HC04RPER HD74HC04RPER  |
|
|
|
Operating air gap is dependent on the ava |
HD74HC04TEL HD74HC04TEL  |
HITACHI |
2007 |
|
address, and I/O pins that permit independent, as |
HD74HC04TELL HD74HC04TELL  |
HITACIH |
TSSOP PB |
06+ |
3.3 GHz Full Power Input Bandwidth (-3 dB) Gain |
HD74HC05 HD74HC05  |
Hitachi |
|
|
The data contained in the data stream can also a |
HD74HC05FP HD74HC05FP  |
HIT |
SOP5.2mm-14L |
2006 |
DESCRIPTION The ST3237E is a 3V to 5.5V powered |
HD74HC05FPEL HD74HC05FPEL  |
HIT |
SOP14 |
94+ |
power consumption by 90% when addresses are not |
HD74HC05FPEL(PB) HD74HC05FPEL(PB)  |
RENESAS |
2004+ |
SOP-14 |
The device offers two power-saving features. Whe |
HD74HC05FPER HD74HC05FPER  |
HIT |
SMD |
96 |
If the password mode is enabled with PW_ON, read |
HD74HC05FPTR HD74HC05FPTR  |
HITACHI |
08+ |
|
|
HD74HC05P HD74HC05P  |
|
|
03+ |
NOTES: 1. DIMENSIONING AND TOLERANCING & |
HD74HC05RPEL HD74HC05RPEL  |
HIT |
SOP3.9-14P |
00+ |
FEATURES D Data Rate: 1.25MSPS D Signal-to-Nois |
HD74HC08 HD74HC08  |
|
2 |
SOP |
For the most current package and ordering inform |
HD74HC08D HD74HC08D  |
|
|
|
Cellular Base Transceiver Station Transmit Chann |
HD74HC08FP HD74HC08FP  |
HIT |
SOP14 |
94+ |
The D 2Pak is a surface mount power package capa |
HD74HC08FPD HD74HC08FPD  |
|
|
|
These circuits perform a single function: they as |
HD74HC08FPEL HD74HC08FPEL  |
HIT |
SOP |
2001 |
Ultra Low RDS(on) Higher Efficiency Extending Ba |
HD74HC08FPEL-E HD74HC08FPEL-E  |
|
|
|
combination with the antenna damping AGC |
HD74HC08FPER HD74HC08FPER  |
|
|
94 |
The AT8xC5111 has 3 software-selectable modes of |
HD74HC08FPTL HD74HC08FPTL  |
HITACHI |
SMD |
N/A |
Write All (WRALL) The WRALL instruction is valid |
HD74HC08FPTR HD74HC08FPTR  |
HIT |
|
95 |
The power dissipation of the SCC70/SOTC323 |
HD74HC08P HD74HC08P  |
|
|
03+ |
The external crystal must be connected as close |
HD74HC08P-E-Q HD74HC08P-E-Q  |
RENESAS |
|
05/06+ |
The local bus controller also generates two cont |
HD74HC08RP HD74HC08RP  |
HIT |
SOP |
07+ |
Note 1: Absolute Maximum continuous ratings are t |
HD74HC08RPEL HD74HC08RPEL  |
HIT |
SOP |
97/P3 |
3.3 Electrical performance characteristics |
HD74HC08RP-EL HD74HC08RP-EL  |
HITACHI 日立 |
|
|
This ACS™ switch is triggered with a negat |
HD74HC08T HD74HC08T  |
Hitachi |
|
|
The UC382 is easy to use. The adjustable version |
HD74HC08TEIL HD74HC08TEIL  |
HIT |
|
TSSOP |
If the open-load detection bit (OLD) is set to l |
HD74HC08TEL HD74HC08TEL  |
HITACHI |
07+ |
|
READ ENABLES (REN) When both Read Enable |
HD74HC08TELL HD74HC08TELL  |
HIT |
TSSOP/14 |
98+ |
During packet reception the TPA and TPB transmit |
HD74HC08T-EWS HD74HC08T-EWS  |
|
|
|
As address generators, the IALUs perform immedia |
HD74HC09 HD74HC09  |
Hitachi |
|
|
Because of the consideration for minimized powe |
HD74HC09FP HD74HC09FP  |
Hitachi |
|
|
DESCRIPTION The LE00 regulator series are very |
HD74HC09FPEL HD74HC09FPEL  |
HIT |
08+ |
|
The LH28F800SG-L is a high-performance 8 M-bit |
HD74HC09FPTL HD74HC09FPTL  |
|
|
|
1. JA is measured with the component mounted on |
HD74HC09FP-TL HD74HC09FP-TL  |
HITACHI |
SOP(5.2) |
05+ |
• SuperFAST HIGH DENSITY IN-SYSTEM |
HD74HC09P HD74HC09P  |
N/A |
DIP |
07+ |
The availability of the amplifier bias current ( |
HD74HC10 HD74HC10  |
HITACHI |
SOP5.2 |
01+ |
These N-Channel power MOSFETs ar |
HD74HC107 HD74HC107  |
Hitachi |
|
|
VIN TO IOUT TRANSFER FUNCTION Output Spe |
HD74HC107FP HD74HC107FP  |
Hitachi |
|
|
Through the choice of p-type or n-type silicon, |
HD74HC107FPEC HD74HC107FPEC  |
|
|
|
Please be aware that an important notice |
HD74HC107FPEL HD74HC107FPEL  |
HIT |
SOP |
04/P2 |
Diagonal 3mm (Type 1/6) 752 (H) 582 (V) appro |
HD74HC107FPTL HD74HC107FPTL  |
HIT |
|
95/96/98 |
Die Standardlieferform von Serientypen beinhaltet |
HD74HC107FP-TR HD74HC107FP-TR  |
HIT |
07+ |
|
e) Figure 5 shows a three phase power system imp |
HD74HC107P HD74HC107P  |
|
|
97 |
Note 1: In the typical PECL 100K logic output V |
HD74HC109FP HD74HC109FP  |
Hitachi |
|
|
The D/A converter is based on a 4th-order multi- |
HD74HC109FPEL HD74HC109FPEL  |
HIT |
SOP |
05+ |
The MMA series of silicon capacitive, mic |
HD74HC109FPTR HD74HC109FPTR  |
HIT |
SOP |
|
TIs new, small geometry, state-of-the-art, analo |
HD74HC109P HD74HC109P  |
HITACHI |
|
|
The DAC5687 has six signal processing blocks: tw |
HD74HC10FP HD74HC10FP  |
Hitachi |
|
|
The crystal is the frequency reference of the VC |
HD74HC10FP//HD74HC10FP-Q HD74HC10FP//HD74HC10FP-Q  |
HITACHI |
SOP |
00+ |
Unless otherwise specified, these specifications |
HD74HC10FPEL HD74HC10FPEL  |
HIT |
SOP |
00/P |
Positive digital supply pin for the ADC11DL066s |
HD74HC10FP-EL HD74HC10FP-EL  |
HIT |
SOP; |
05/06+ |
(Multiple winds are connected in parallel) Indu |
HD74HC10FPER HD74HC10FPER  |
|
|
97 |
The TC58FVM5T2A/B2A/T3A/B3A is a 33554432 |
HD74HC10FP-TC HD74HC10FP-TC  |
HIT |
99 |
12000
|
NOTES: 1. Maximum IF(ON) is the maximum current |
HD74HC10FP-TL HD74HC10FP-TL  |
HIT |
SOP5.2mm |
2006 |
e) Figure 5 shows a three phase power system imp |
HD74HC10FPTR HD74HC10FPTR  |
HIT |
|
96 |
The carry output goes high with the leading edge |
HD74HC10P HD74HC10P  |
HIT |
08+ |
|
The LH543601 has two 36-bit ports, Port A |
HD74HC10P-E-Q HD74HC10P-E-Q  |
RENESAS |
|
05/06+ |
V1: Minimum absolute applied voltage cor |
HD74HC10RPEL HD74HC10RPEL  |
HIT |
|
97 |
a: Stresses greater than those listed under R |
HD74HC10RP-EL HD74HC10RP-EL  |
TOS |
SOP14 |
02+ |
Competition among network providers enables the m |
HD74HC11 HD74HC11  |
HITACHI |
SOP5.2 |
01+ |
A fixed 1.4MHz operating frequency ensures operat |
HD74HC112 HD74HC112  |
Hitachi |
|
|
As the LEDs are driven directly by the MCU, care |
HD74HC112EPEL HD74HC112EPEL  |
HIT |
SOP |
97 |
In the past 10 years, microprocessors have evolv |
HD74HC112FP HD74HC112FP  |
HITACHI |
|
|
Clock inputs CLK+ and CLK- may also be driven wi |
HD74HC112FPEL HD74HC112FPEL  |
HITACHI |
|
|
This document is a general product description an |
HD74HC112FPER HD74HC112FPER  |
HIT |
|
96 |
These devices are adjustable high-precision shun |
HD74HC112FP-TR HD74HC112FP-TR  |
|
|
|
Rf||Rg = Rseq for bias current cancellation. Fig |
HD74HC112P HD74HC112P  |
Hitachi |
|
|
Maximum Repetitive Reverse Voltage Average Rect |
HD74HC112TELL HD74HC112TELL  |
HIT |
SSOP |
SSOP |
NOTES: 1. Dimensions are in inches.r.0070 |
HD74HC112TELL01 HD74HC112TELL01  |
HD |
SMD |
07+ |
The keyboard input may be from either the standar |
HD74HC113P HD74HC113P  |
Hitachi |
|
|
• 1.8V+0.1V/-0.1V Power Supply. • I/ |
HD74HC11A HD74HC11A  |
HITACHI |
|
|
Low-latency option Skew alignment support |
HD74HC11FP HD74HC11FP  |
HITACHI |
SOP14 |
05/06+ |
No glitch on power-up Supports hot |
HD74HC11FPEL HD74HC11FPEL  |
HIT |
SOP |
02+ |
The sensors are designed for industrial and auto |
HD74HC11FP-ER HD74HC11FP-ER  |
HIT |
|
9510 |
These miniature surface mount MOSFETs feat |
HD74HC11FPTD HD74HC11FPTD  |
HITACHI |
|
|
The regulated voltage output. An output capacito |
HD74HC11FP-TL HD74HC11FP-TL  |
HITACHI |
SMD |
|
Notes: 1. The regulator will operate down to no |
HD74HC11FPTR HD74HC11FPTR  |
HIT |
|
96 |
Designed with an internal P-channel MOSFET pass |
HD74HC11P HD74HC11P  |
|
|
90 |
Provides 5 styles of 8 kHz framing pulses and a |
HD74HC11PEL HD74HC11PEL  |
|
|
|
The submount product may show the change of the |
HD74HC11RP HD74HC11RP  |
Hitachi |
|
|
Serial configuration control input. This inputs |
HD74HC11RP-EL HD74HC11RP-EL  |
|
|
|
The 1.25Gbps MAX3264/MAX3268/MAX3768 and the 2.5 |
HD74HC123 HD74HC123  |
|
|
98 |
Notes :- 1. M aximum of 0.5% of the   |
HD74HC123A HD74HC123A  |
HIT |
SOP Middle |
|
The UC3825A,B has dual alternating outputs and t |
HD74HC123AF HD74HC123AF  |
|
|
|
2.1 General. The documents listed in this |
HD74HC123AFP HD74HC123AFP  |
|
|
02 |
The NetPHY™ 4LP device is a highly integrat |
HD74HC123AFPEL HD74HC123AFPEL  |
HIT |
SOP |
02+03+ |
When the DRAIN pin of the LT4250L is above VEE by |
HD74HC123AFP-EL HD74HC123AFP-EL  |
|
|
|
Package drawings, standard packing quantities, t |
HD74HC123AFPER HD74HC123AFPER  |
HIT |
SOP-16 |
2003 |
SLEW RATE At slew rates above a given threshold |
HD74HC123AFPLL HD74HC123AFPLL  |
HITACHI |
|
|
Radiation Hardened up to 1 x 106 Rads (Si) Sing |
HD74HC123AFPTR HD74HC123AFPTR  |
HIT |
SOP16L |
96+ |
High-Performance Static CMOS Technology TMS470R1 |
HD74HC123AFRTR HD74HC123AFRTR  |
HIT |
SOP |
04+ |
Notes a. Not to exceed TPULSE = 50 ns. b. Requ |
HD74HC123AG-T2 HD74HC123AG-T2  |
HIT |
|
02/P2 |
Information in this document is provided in conn |
HD74HC123AP HD74HC123AP  |
HIT |
|
|
Since this codecCfilter design has a sing |
HD74HC123APEL HD74HC123APEL  |
|
|
|
DTMF signal. Every digit of a phone number to b |
HD74HC123FP HD74HC123FP  |
|
|
|
TFT Interface Programmable panel size up to 102 |
HD74HC123P HD74HC123P  |
|
|
03+ |
When the internal control section of the SP8480 |
HD74HC123RP-EL HD74HC123RP-EL  |
HIT |
SOP |
05+ |
A current booster is not a stand-alone product, |
HD74HC125 HD74HC125  |
HIT |
TSSOP |
97P4 |
Positive Power Supply Voltage Ground (0 V) Refer |
HD74HC125FP HD74HC125FP  |
|
|
94 |
Macrocell registers can be clocked from one of s |
HD74HC125FPEL HD74HC125FPEL  |
HITACHI |
SOP-14 |
01+ |
The total synthesized voice contents (2.8 sec- o |
HD74HC125FP-EL HD74HC125FP-EL  |
HIT |
SOP |
99/P |
NOTES: (1) Stresses above these ratings may caus |
HD74HC125FPLH HD74HC125FPLH  |
HIT |
SOP5.2mm-14L |
2006 |
The improved architecture of the DMUX facilitate |
HD74HC125FPTL HD74HC125FPTL  |
HIT |
SOP5.2mm-14L |
2006 |
For more details on UniqueWare and how to set up |
HD74HC125FPTR HD74HC125FPTR  |
HIT |
05+/06+ |
|
Absolute Maximum Ratings indicate limits beyond |
HD74HC125P HD74HC125P  |
|
|
03+ |
If the FIFO is configured to have two write enab |
HD74HC125P-E HD74HC125P-E  |
|
|
|
Maximum ratings are those values beyond which de |
HD74HC125RP HD74HC125RP  |
HITACHI |
SOP3.9 |
05+ |
The NLAS44599 is an advanced dual−in |
HD74HC125RPEL HD74HC125RPEL  |
|
0 |
SOP |
12-bit Resolution ADC, 30MHz Sampling Rate 10-b |
HD74HC125RP-EL HD74HC125RP-EL  |
HIT |
SOP14L |
1995 |
The HD74HC125RP-EL is a non-inverting 8-bit Bidi |
HD74HC125TELL HD74HC125TELL  |
HIT |
0515+环保 |
|
Time taken for PLL lock voltage to achieve 90% t |
HD74HC126 HD74HC126  |
HIT |
|
|
1) CPD is defined as the value of the ICs intern |
HD74HC126FPEL HD74HC126FPEL  |
HIT |
SOP |
01P2 |
Reading from the device is accomplished by takin |
HD74HC126FPER HD74HC126FPER  |
HITACHI |
SOP5.2 |
99 |
This device is designed for FM tuning, ge |
HD74HC126FPTL HD74HC126FPTL  |
HITACHI |
05+/06+ |
|
The RSET resistor is part of the high speed outpu |
HD74HC126FPTR HD74HC126FPTR  |
HIT |
|
96 |
Note 1: Absolute maximum ratings indicate limits |
HD74HC126P HD74HC126P  |
HITACHI |
|
00+ |
• Integrated Temperature Sensing and Multi |
HD74HC126RP HD74HC126RP  |
|
|
|
access for a read or program can begin. The typi |
HD74HC126RPEL HD74HC126RPEL  |
HITACHI |
|
|
Hynix HYMD532M646(L)6-K/H/L series is designed fo |
HD74HC128P HD74HC128P  |
|
|
|
GROUND - Is the return for the VBIAS supply. This |
HD74HC132 HD74HC132  |
HIT |
|
96 |
Comments, suggestions, or questions on this docum |
HD74HC132F HD74HC132F  |
|
|
|
It also provides the non-volatility of Flash wit |
HD74HC132FP HD74HC132FP  |
Renesas |
|
|
The AT40KAL is designed to quickly implement hig |
HD74HC132FPEL HD74HC132FPEL  |
HITACHI |
SOP-5.2-14P |
6+ |
ture. Once the end of a byte program cycle has b |
HD74HC132FPEL-E HD74HC132FPEL-E  |
|
|
|
The state of the data line represents valid data |
HD74HC132FPTR HD74HC132FPTR  |
HIT |
SOP5.2mm-14L |
2006 |
The bq2060 determines battery capacity by monitor |
HD74HC132P HD74HC132P  |
|
|
03+ |
|
HD74HC132RPEL HD74HC132RPEL  |
Hitachi |
|
|
2. TOLERANCE AND TYPE NUMBER DESIGNATION The type |
HD74HC133 HD74HC133  |
Hitachi |
|
|
• E/A Isolation 6000 VDC • Luft-, Kr |
HD74HC133FP HD74HC133FP  |
Hitachi |
|
|
In-band Interference Rejection 20dB max. |
HD74HC133FPEL HD74HC133FPEL  |
RENESAS |
SOP |
|
The ANADIGICS AWL9224 power amplifier is a high |
HD74HC133P HD74HC133P  |
HIT |
DIP |
|
Output Low Voltage (CHRG, ACPR) Enable Input Hig |
HD74HC136FPEL HD74HC136FPEL  |
HITACHI |
SOIC14 |
04+ |
The CMX866 shares internal register addresses and |
HD74HC137 HD74HC137  |
HITACHI |
|
|
This series of 500 W Transient Voltage Suppressor |
HD74HC137FP HD74HC137FP  |
Hitachi |
|
|
¡In the absence of confirmat |
HD74HC137FPEL HD74HC137FPEL  |
|
|
|
Compatible with SPI Bus Serial Interface (Posit |
HD74HC137P HD74HC137P  |
ERNESAS |
5 |
DIP |
The HYM72V16M636T6 Series are 16Mx64bits Synchron |
HD74HC138 HD74HC138  |
HIT |
|
|
The HD74HC138 is a high performance video buffer |
HD74HC138FP HD74HC138FP  |
|
|
02 |
During a memory write cycle the check bits (CB0 |
HD74HC138FPEL HD74HC138FPEL  |
HIT |
SOP |
01/P2 |
The Auto Product Identification mode allows the r |
HD74HC138FPER HD74HC138FPER  |
HD |
|
|
In theory, the proportionality and digitization |
HD74HC138FPTR HD74HC138FPTR  |
HITACHI |
96 |
2500
|
Notes: 3. RL = 50 ohm 1%; Zline = 50 ohm |
HD74HC138FPZEL HD74HC138FPZEL  |
HIT |
SOP |
01/P2 |
The LM711 is a dual differential voltage compara |
HD74HC138N HD74HC138N  |
HIT |
DIP/20 |
97+ |
In more severe ambient conditions, the package/j |
HD74HC138P HD74HC138P  |
HIT |
DIP16 |
03+ |
NOTES: • Use a 0.1 µF capacitor on V |
HD74HC138RFEL HD74HC138RFEL  |
HITACHI |
SOP |
07+ |
These devices have Type-1 and Type-2 receivers t |
HD74HC138RP HD74HC138RP  |
HITACHI |
SMD |
96+ |
NOTES: 1. All VCC pins must be connected to the |
HD74HC138RPEL HD74HC138RPEL  |
HIT |
SOP/16 |
98/P |
AEC-Q100† Qualified for Automotive Applica |
HD74HC138RP-EL HD74HC138RP-EL  |
HITACHI |
|
94 |
Note 1: Absolute Maximum Ratings are those values |
HD74HC138TELL HD74HC138TELL  |
|
|
|
• Single supply with operation down to 1.8 |
HD74HC138TELL-E HD74HC138TELL-E  |
|
|
|
CIRCUIT OPERATION The SP8480 is a complete 8-ch |
HD74HC139 HD74HC139  |
Hitachi |
|
|
Protection diodes are employed at all pin |
HD74HC139FP HD74HC139FP  |
|
|
02 |
CEL Pb-free products have the same base part num |
HD74HC139FPD-EL HD74HC139FPD-EL  |
|
|
89 |
PRBS error counter register to accumulate |
HD74HC139FPEL HD74HC139FPEL  |
HIT |
SOP |
01/P |
4.4.2 Group B inspection. Group B inspecti |
HD74HC139FPER HD74HC139FPER  |
|
|
92 |
VCXO parts from ICS require that locations be p |
HD74HC139FPTL HD74HC139FPTL  |
HIT |
SOP |
96+ |
These chips, when properly assembled, display ch |
HD74HC139FPTR HD74HC139FPTR  |
ROHM |
01+ |
N/A |
Bidirectional 8-bit input/output port. Software i |
HD74HC139FPZEL HD74HC139FPZEL  |
HIT |
SOP |
|
5% tolerance of output voltage Wide input range |
HD74HC139P HD74HC139P  |
|
|
03+ |
The following describes a procedure for evaluati |
HD74HC139RFP HD74HC139RFP  |
|
|
|
Note: 1. Stresses greater than those listed unde |
HD74HC139RP HD74HC139RP  |
HIT |
SOP5.2mm-16L |
2006 |
Frame rate: 30/15/10/5/4/3/2/1 fps Sub-sampling |
HD74HC139RPEL HD74HC139RPEL  |
HIT |
SOP |
97/P3 |
The SG2000 series integrates seven NPN Darlingto |
HD74HC139RP-EL HD74HC139RP-EL  |
HITACHI |
SOP |
94 |
The HD74HC139RP-ELA/HD74HC139RP-EL75A/HD74HC139RP |
HD74HC139TEL HD74HC139TEL  |
HIT |
TSSOP |
95+ |
supply operating voltage). During this time the |
HD74HC139TELL HD74HC139TELL  |
HIT |
|
|
NOTES: 1. Dimensions are in inches.   |
HD74HC14 HD74HC14  |
HIT |
|
95 |
|
HD74HC147FP HD74HC147FP  |
Hitachi |
|
|
(HD74HC147FP6/HD74HC147FP8/HD74HC147FP9 EV kits, |
HD74HC147FP-E HD74HC147FP-E  |
|
|
|
Cell phones, for example, often face ASIC functio |
HD74HC147FPEL HD74HC147FPEL  |
HITACHI |
SOP-16 |
2003 |
The transmit section of the CY7B951 contains a P |
HD74HC147P HD74HC147P  |
HIT |
|
97 |
The initial setup sequence programs the two blin |
HD74HC148 HD74HC148  |
Hitachi |
|
|
- On-board power supplies of battery devices for |
HD74HC148FP HD74HC148FP  |
Hitachi |
|
|
Four of the seven instructions end with the tra |
HD74HC148FPEL HD74HC148FPEL  |
HIT |
SOP |
99P2 |
Decouple the output of the UC382 with at least 1 |
HD74HC148FPTL HD74HC148FPTL  |
HIT |
SOP |
97/P2 |
Notes: 1. TC is defined as case temperature, the |
HD74HC148P HD74HC148P  |
Hitachi |
|
|
Input switch. For V0 to V8 output, VL is outpu |
HD74HC148PTL HD74HC148PTL  |
HIT |
|
94/P2 |
Access to the user zones occurs only through the |
HD74HC14D HD74HC14D  |
|
|
|
The CY7C09159A and CY7C09169A are high-speed syn |
HD74HC14FP HD74HC14FP  |
|
|
02 |
FULL FLAG (FF) The Full Flag (FF) will go |
HD74HC14FPDEL HD74HC14FPDEL  |
HITACHI |
SOP |
2000 |
When an interrupt occurs, the INT# pin will be a |
HD74HC14FPDTL HD74HC14FPDTL  |
HITACHI |
|
|
The STC62WV12816 is a high performance , very low |
HD74HC14FP-E HD74HC14FP-E  |
|
|
|
Input Termination Center-Tap: Each side of the d |
HD74HC14FPEL HD74HC14FPEL  |
HIT |
SOP |
02/P2 |
* Stresses greater than those listed under " |
HD74HC14FP-EL HD74HC14FP-EL  |
HIT |
SOP |
0631+ |
The LCX240 is an inverting octal buffer and line |
HD74HC14FPER HD74HC14FPER  |
HIT |
|
97 |
For the ADS-929, offset adjusting is normally ac |
HD74HC14FP-ER HD74HC14FP-ER  |
|
|
|
The CSPU877A is a PLL based clock driver |
HD74HC14FPLH HD74HC14FPLH  |
|
|
|
The IA186ES/188ES is a form, fit, and function r |
HD74HC14FPTL HD74HC14FPTL  |
HIT |
SOP14 |
04+ |
The HYM7V65401B Q-Series are Small Outline Dual I |
HD74HC14FPTR HD74HC14FPTR  |
HITACHI |
SOP |
96 |
The Bay Linear LM2941 incorporates protection ag |
HD74HC14P HD74HC14P  |
HIT |
DIP |
97 |
The PT4494 is a 20-A Current Booster module des |
HD74HC14P-E HD74HC14P-E  |
RENESAS 2006 |
|
|
• FCT-C speed at 5.5 ns (FCT16841T Coml) & |
HD74HC14PEL HD74HC14PEL  |
|
|
|
Parameter DIFFERENTIAL INPUT PERFORMANCE DYNAMI |
HD74HC14RPEL HD74HC14RPEL  |
HITACHI |
08+ |
|
Cable Length Indication. Provides a voltage outp |
HD74HC14TEL HD74HC14TEL  |
HIT |
TSSOP |
93+ |
No warranty is made with respect to uses, operati |
HD74HC14TELL HD74HC14TELL  |
HIT |
07+ |
|
The device offers two power-saving features. Whe |
HD74HC151 HD74HC151  |
HIT |
SMD |
SMD |
The 1.8 Volt Intel®Wireless Flash Memory with |
HD74HC151FP HD74HC151FP  |
Hitachi |
|
|
The HD74HC151FP is a 50 ohm matched, sing |
HD74HC151FPEL HD74HC151FPEL  |
HIT |
SOP |
98/P |
Serial data input. The 4-bit serial data can be |
HD74HC151FP-EL HD74HC151FP-EL  |
|
|
|
Note 1) The specified condition Tj=25˚C mea |
HD74HC151P HD74HC151P  |
|
|
97 |
RSDS OUTPUT VOLTAGE CONTROL The RSDS output vol |
HD74HC152 HD74HC152  |
HITACHI |
05+/06+ |
|
The Discrete Products Operation of Intersil has |
HD74HC152FP-TL HD74HC152FP-TL  |
HIT |
SOP5.2mm |
2006 |
implement logic functions in the 500- to 800-gate |
HD74HC153 HD74HC153  |
Hitachi |
|
|
Power-down control input. When set to a logic 0, |
HD74HC153AP HD74HC153AP  |
HITACHI |
|
|
The Fairchild Switch FST16232 is a 16-bit to 32- |
HD74HC153F HD74HC153F  |
HITACHI |
2007 |
|
The IS93C56-3 is controlled by seven 9-bit instr |
HD74HC153FP HD74HC153FP  |
Hitachi |
|
|
For cellular phone and PDA applications, voltage |
HD74HC153FPEL HD74HC153FPEL  |
HIT |
SOP |
01+ |
To use the LX1991 at the maximum usable f |
HD74HC153FP-TL HD74HC153FP-TL  |
HIT |
97+ |
SOP14 |
FEATURES • Compliant with ATM, SONET OC-3 |
HD74HC153FPTR HD74HC153FPTR  |
HIT |
SOP5.2mm-16L |
2006 |
can be bypassed under processor control when uns |
HD74HC153P HD74HC153P  |
HIT |
DIP/16 |
98+ |
Precision Optical Performance AlInGaP II (alumin |
HD74HC154 HD74HC154  |
HM |
DIP24条 |
|
Features ❏ InGaP HBT Technology ❏ |
HD74HC154P HD74HC154P  |
|
DIP24 |
|
Hynix HYMD232M646A(L)6-J/M/K/H/L series is design |
HD74HC155FPEL HD74HC155FPEL  |
HD |
SOP |
07+ |
The final component values, shown in Bill |
HD74HC155FPTR HD74HC155FPTR  |
HIT |
07+ |
|
The built-in LDO can be used for a second output |
HD74HC155P HD74HC155P  |
HIT |
|
94 |
Single 3 V supply operation (2.7 V to 3.6 V) SN |
HD74HC157 HD74HC157  |
HIT |
|
DIP-16P |
The SOA curves combine the effect of thes |
HD74HC157FP HD74HC157FP  |
Hitachi |
|
|
The output voltage of the Power Trends Wide Inpu |
HD74HC157FPEL HD74HC157FPEL  |
HITACHI |
SOP |
2000 |
DESCRIPTION The HD74HC157FPEL is a 13-wat |
HD74HC157FP-EL HD74HC157FP-EL  |
HIT |
SOP |
01/P |
A silicone dielectric gel that has been u |
HD74HC157FPLH HD74HC157FPLH  |
HIT |
SOP |
95/P2 |
The HY62UF08401C is a high speed, super lo |
HD74HC157FPTR HD74HC157FPTR  |
HIT |
SOP |
95/P2 |
Output Voltage The fixed voltage LDO voltage re |
HD74HC157P HD74HC157P  |
|
|
03+ |
NOTES: 1. Minimums are guaranteed but not produc |
HD74HC157RP HD74HC157RP  |
Renesas |
|
|
The external crystal must be connected as close |
HD74HC157RPEL HD74HC157RPEL  |
HIT |
SOP |
00+ |
R2 (pin 3) The reference resistance is con |
HD74HC157RP-EL HD74HC157RP-EL  |
HIT |
SOP3.9mm-16L |
2006 |
Purchase of I2C components from Maxim Integrated |
HD74HC157TEL HD74HC157TEL  |
HIT |
SOP |
97+ |
Figure 1 shows the CY7B951 in an ATM system that |
HD74HC157TELL HD74HC157TELL  |
HIT |
TSSOP/20 |
98+ |
Burst mode operation Auto & se |
HD74HC158 HD74HC158  |
N/A |
SOP |
07+ |
Notes: 1. Use only a single 1% resistor in eith |
HD74HC158FPEL HD74HC158FPEL  |
HIT |
SOP |
97/P |
|
HD74HC158FPER HD74HC158FPER  |
|
|
|
These devices are positive edge triggered flip-f |
HD74HC158P HD74HC158P  |
Hitachi |
|
|
The ISL6526 provides simple, single feedback loop |
HD74HC15BP HD74HC15BP  |
HITACHI |
2007 |
|
The device features a precision temperature-comp |
HD74HC160FP HD74HC160FP  |
Hitachi |
|
|
Single supply: 2.7 to 5.5 V Access |
HD74HC160FPEL HD74HC160FPEL  |
HIT |
SMD |
2000 |
NOTE: (1) Stresses beyond those listed under &qu |
HD74HC160FPTR HD74HC160FPTR  |
HIT |
SOP |
|
1. One output at a time for a maximum duration o |
HD74HC160P HD74HC160P  |
HITACHI |
|
95+ |
Unless otherwise specified, the following specif |
HD74HC161 HD74HC161  |
HITACHI |
SOP5.2 |
01+ |
IO‡VCC = 5.5 V,VO = 2.25 VC 20C112C 3 |
HD74HC161AP HD74HC161AP  |
HIT |
ORG PACKING |
08+ |
• Compact disk player (CDP) with tray and |
HD74HC161FP HD74HC161FP  |
HITACHI |
05+/06+ |
|
The first step in choosing the right product is |
HD74HC161FPEL HD74HC161FPEL  |
HITACHI |
SOP |
2002 |
The PCF8591 is a single-chip, single-supply low |
HD74HC161FPR HD74HC161FPR  |
HIT |
SOP5.2mm-16L |
2006 |
The ISL6118 has two shutdown modes. When disabled |
HD74HC161FPTL HD74HC161FPTL  |
HITACHI |
SMD |
1994 |
For applications requiring other voltages, see L |
HD74HC161FPTR HD74HC161FPTR  |
HITACHI |
04+ |
|
The MSA-series is fabricated using Agilents 10 |
HD74HC161P HD74HC161P  |
|
|
03+ |
California Micro Devices's CM1406 is an EMI filt |
HD74HC161RPEL HD74HC161RPEL  |
HIT |
05+环保 |
|
•The module is a Max.4dBm( Class2 ) module. |
HD74HC161TELL HD74HC161TELL  |
HITACHI |
|
|
When the DS1481 first powers up it is in a trans |
HD74HC161TELLL HD74HC161TELLL  |
HIT |
TSOP |
98 |
NOTES: 1. Input voltages may exceed the supply v |
HD74HC162 HD74HC162  |
Hitachi |
|
|
Scan cell TYPE1 is located on each system input |
HD74HC163 HD74HC163  |
Hitachi |
|
|
A low-to-high transition on the CS pin will term |
HD74HC163FP HD74HC163FP  |
Hitachi |
|
|
Support for 12 independent ports. Low power co |
HD74HC163FPEL HD74HC163FPEL  |
HIT |
|
98 |
multiplier. This is analogous to using an elepha |
HD74HC163FPTL HD74HC163FPTL  |
HIT |
|
96 |
Category voltage UC: The maximum direct voltage, |
HD74HC163FPTR HD74HC163FPTR  |
HIT |
SOP |
93/P2 |
|
HD74HC163P HD74HC163P  |
Hitachi |
|
|
DESCRIPTION The L7800 series of three-terminal |
HD74HC163RPEL HD74HC163RPEL  |
|
|
|
The Clock and Data Recovery stage was designed to |
HD74HC164 HD74HC164  |
RENESAS |
|
05/06+ |
Motorola, the Motorola logo and VMEexec are regi |
HD74HC164D HD74HC164D  |
|
|
|
Overcurrent detection pin Monitors equivalent lo |
HD74HC164FP HD74HC164FP  |
Hitachi |
|
|
The LTC®3700 is a constant frequency current |
HD74HC164FPEL HD74HC164FPEL  |
HIT |
SOP |
99+ |
0.9 V Guaranteed Operation Standby Mode: ID = 1. |
HD74HC164FPTR HD74HC164FPTR  |
HITACHI |
08+ |
|
control and communications to other components, |
HD74HC164P HD74HC164P  |
HIT |
DIP |
98+ |
Notes: 1. With 50% of the outputs simultaneousl |
HD74HC164P-E HD74HC164P-E  |
|
|
|
• In-Circuit Serial Programming (ICSP͐ |
HD74HC164P-E-Q HD74HC164P-E-Q  |
RENESAS |
|
05/06+ |
The application note "CHOICE OF DAMPER DIO |
HD74HC164RP HD74HC164RP  |
HIT |
|
O7+ |
The tag requires no internal power supply. Its co |
HD74HC164RPEL HD74HC164RPEL  |
HIT |
SOP |
96 |
The Mode-Select Inputs permit frequency-synthesi |
HD74HC164RP-EL HD74HC164RP-EL  |
HITACHI |
|
94 |
These are single-chip 16-bit microcomputers desi |
HD74HC165 HD74HC165  |
HITACHI |
04+ |
|
The IDT70V3579 is a high-speed 32K x 36 b |
HD74HC165FD HD74HC165FD  |
|
|
|
Hardware Reset. Self-asserted by internal pull-u |
HD74HC165FP HD74HC165FP  |
HIT |
SOP16 |
02+ |
Note: 1. Except for the rating Operating Tempera |
HD74HC165FPEL HD74HC165FPEL  |
HIT |
|
96 |
Register usage rules influence placement of inpu |
HD74HC165FP-TE2 HD74HC165FP-TE2  |
|
97+98 |
SOP |
RXD_14[0]CRSDV_14TXEN_14TXD_14[0]TXD_14[1]RXD_13[ |
HD74HC165P HD74HC165P  |
HIT |
DIP |
DIP |
|
HD74HC166 HD74HC166  |
Hitachi |
|
|
It is an open drain output and may be wire-ORed |
HD74HC166FP HD74HC166FP  |
HIT |
SOP |
|
Using the first two interface options outlined a |
HD74HC166FPEL HD74HC166FPEL  |
HIT |
SOP |
|
Notes: 1. Stress greater than those listed unde |
HD74HC166FPTL HD74HC166FPTL  |
HITACHI |
97 |
2500
|
Notes: (1) Clip mounting (on case), where lead |
HD74HC166P HD74HC166P  |
HIT |
DIP |
DIP |
Output from the internal high voltage start-up I |
HD74HC166RPE HD74HC166RPE  |
|
|
|
data inputs is HIGH. Odd parity is indicated (O |
HD74HC166RPEL HD74HC166RPEL  |
HITACHI |
|
|
AAL2 mode (ITU-T I.363.2): - Support for up to 1 |
HD74HC173 HD74HC173  |
Hitachi |
|
|
Boost converter with a 2A, 0.18Ω switch B |
HD74HC173F HD74HC173F  |
HIT |
|
|
The LTC1998 features a voltage detection circuit |
HD74HC173FP HD74HC173FP  |
|
|
92 |
|
HD74HC173FPTR HD74HC173FPTR  |
HIT |
SOP5.2mm |
2006 |
Functional Description Architecture of the MSP |
HD74HC173P HD74HC173P  |
Hitachi |
|
|
controlled. A built-in level shifting is includ |
HD74HC174 HD74HC174  |
HITACHI |
SOP3.9 |
98+ |
A wide input voltage range and integrated |
HD74HC174FP HD74HC174FP  |
HITACHI |
SMD |
1990 |
operational when the bus is attached to an off-bo |
HD74HC174FPEL HD74HC174FPEL  |
HIT |
SOP |
01+ |
Input Low Voltage Input Current (w |
HD74HC174FPEL-E-Q HD74HC174FPEL-E-Q  |
|
|
|
Full piconet support. On board 4Mbit or 8Mbit ex |
HD74HC174FPLH HD74HC174FPLH  |
|
|
600 |
Max. UnitsConditions CCCSVDS = 50V, ID = 3.3A & |
HD74HC174FPTR HD74HC174FPTR  |
HIT |
SOP |
92/P2 |
Period measurement requires the use of a fast re |
HD74HC174FP-TR HD74HC174FP-TR  |
HITACHI |
|
1250
|
It features a preamplifier module with adjustable |
HD74HC174P HD74HC174P  |
HIT |
DIP |
DIP |
† Stresses beyond those listed under absol |
HD74HC174RP HD74HC174RP  |
HIT |
SOP |
92P3 |
No Connect pin (when ADMODE pin=L) No in |
HD74HC174RPEL HD74HC174RPEL  |
HITACHI |
SOP-16 |
02+ |
The AC273 and ACT273 devices are octal D-type |
HD74HC174RP-EL HD74HC174RP-EL  |
HIT |
|
3.9mm |
The SY88713V low-power limiting post ampl |
HD74HC174TELL HD74HC174TELL  |
HIT |
2001 |
TSSOP |
The line drivers in the TSB41AB3, operating in a |
HD74HC175 HD74HC175  |
Hitachi |
|
|
Register usage rules influence placement of inpu |
HD74HC175FP HD74HC175FP  |
|
94 |
SOP |
The coupler consists of a AlGaAs LED that is opti |
HD74HC175FPEL HD74HC175FPEL  |
HIT |
SOP |
01+ |
(VDD = +4.5V to +5.5V; unipolar input mode; COM = |
HD74HC175FPEL-E HD74HC175FPEL-E  |
|
|
|
The UC3823A and UC3823B and the UC3825A and UC3 |
HD74HC175FPTL HD74HC175FPTL  |
|
92 |
SOP |
Fast Megablock I/O cells with optional I/O regis |
HD74HC175FPTR HD74HC175FPTR  |
HITACHI |
|
|
Each DAC has a high-impedance differential curre |
HD74HC175FP-TR HD74HC175FP-TR  |
HIT |
|
88 |
|
HD74HC175P HD74HC175P  |
|
|
98 |
PIN DESCRIPTIONS VDD C This is the supply input |
HD74HC175RP HD74HC175RP  |
HIT |
SOP3.9mm-16L |
2006 |
The LVC16373A 16-bit transparent D-type l |
HD74HC175RPEL HD74HC175RPEL  |
HIT |
SOP3.9mm-16L |
2006 |
Operating Voltage, VDD Input High Voltage, VIH, |
HD74HC175TELL HD74HC175TELL  |
|
|
|
Referenced to VCCA Voltage VCC Isolation Feature |
HD74HC180P HD74HC180P  |
Hitachi |
|
|
PAE and PAF flags can be programmed indepe |
HD74HC190FP HD74HC190FP  |
Hitachi |
|
|
Local Bus interface Multiplexed with ISA/DMA in |
HD74HC190P HD74HC190P  |
DAAL |
|
|
This series of fixed-voltage integrated-circuit |
HD74HC190P-E HD74HC190P-E  |
|
|
|
The OPA689 is a wideband, voltage feedback op am |
HD74HC191 HD74HC191  |
Hitachi |
|
|
The primary thermal path for power dissipation |
HD74HC191FP HD74HC191FP  |
Hitachi |
|
|
The ADSP-21365/6 contains three megabits of inte |
HD74HC191FPEL HD74HC191FPEL  |
HITACHI |
08+ |
|
Available in Two Configurations - Internal 25mW |
HD74HC191FPT HD74HC191FPT  |
HIT |
05+/06+ |
|
Medium-range Cable, satellite, and IP set-top box |
HD74HC191FPTL HD74HC191FPTL  |
HITACHI |
SOIC-16 |
07+/08+ |
International Rectifiers RAD-HardTM HEXFET® |
HD74HC191P HD74HC191P  |
|
|
94 |
DES is a block cipher that uses a 56-bit key to |
HD74HC191RPEL HD74HC191RPEL  |
|
|
|
As seen in Figure 2, bias current cancellation i |
HD74HC192P HD74HC192P  |
N/A |
DIP |
07+ |
Microprocessor loading is random access and asyn |
HD74HC192P-E HD74HC192P-E  |
|
|
|
• ispDesignEXPERT™ C LOGIC COMPILER A |
HD74HC193 HD74HC193  |
Hitachi |
|
|
To assist in the transceiver evaluation proces |
HD74HC193FP HD74HC193FP  |
Hitachi |
|
|
This document states the current technical speci |
HD74HC193FPEL HD74HC193FPEL  |
HIT |
|
|
MANUAL RESET INPUTMR: Manual Reset inpu |
HD74HC193P HD74HC193P  |
HIT |
DIP |
|
Many systems have been designed using an external |
HD74HC194P HD74HC194P  |
|
|
96 |
Robust High Voltage Termination A |
HD74HC195P HD74HC195P  |
Hitachi |
|
|
The DC restoration function is achieved through t |
HD74HC1G04CE-T HD74HC1G04CE-T  |
HITACHI |
06+ |
SOT-353 |
n 2.5 million pixels/s conversion rate n Implem |
HD74HC1G04CM HD74HC1G04CM  |
Hitachi |
|
|
Pin Compatible with IRFT001 P and N Channel MOSF |
HD74HC1G04CME HD74HC1G04CME  |
RENESAS |
SOT-353 |
05NOPB |
Signal Processors (DSPs) TMS320C62x C 5-, 4-, 3. |
HD74HC1G08CME HD74HC1G08CME  |
HIT |
SOT23/5 |
03+ |
The Microchip Technology Inc. 93AA46/56/66 are 1 |
HD74HC1G14CM HD74HC1G14CM  |
renesas/Hitachi |
SOT-353 |
06+ |
Full piconet support. On board 4Mbit or 8Mbit ex |
HD74HC1G14CME HD74HC1G14CME  |
HITACHI |
SOT-353 |
05+ |
Note a: Stresses greater than those listed under |
HD74HC1G32CM HD74HC1G32CM  |
Hitachi |
|
|
These ICs are part of the regular series of back- |
HD74HC1G32CME HD74HC1G32CME  |
RENESAS |
SOT-353 |
06NOPB |
The register can be asynchronously set or asynchr |
HD74HC1G66CM HD74HC1G66CM  |
renesas/Hitachi |
SOT-353 |
06+ |
Buffered Clock Output This pin provides a buffer |
HD74HC1G66CME HD74HC1G66CME  |
HITACHI |
SOT-353 |
05+ |
Hynix HYMD18M725A(L)6-K/H/L series incorporates S |
HD74HC1G86CME HD74HC1G86CME  |
|
|
|
Notes: 7. CPD is defined as the value of the |
HD74HC1GU04CM HD74HC1GU04CM  |
Hitachi |
|
|
Each port contains a burst counter on the input |
HD74HC20 HD74HC20  |
Hitachi |
|
|
The ADM integrates a standard 40- or 44-pin fema |
HD74HC20FP HD74HC20FP  |
|
95 |
SOP |
The FDS6982AS is designed to replace two single S |
HD74HC20FPEL HD74HC20FPEL  |
RENESAS |
SOP |
03/P2 |
The HIP6601B drives the lower gate in a synchron |
HD74HC20FP-EL HD74HC20FP-EL  |
|
97+98 |
SOP |
The OPA725 and OPA726 series op amps use a stat |
HD74HC20FPTL-TE2 HD74HC20FPTL-TE2  |
|
97 |
SOP |
The amplifier family has an output that swings wi |
HD74HC20FPTR HD74HC20FPTR  |
HITACHI |
08+ |
|
ACEX 1K device package types include thin quad f |
HD74HC20FP-TR HD74HC20FP-TR  |
|
|
|
Stresses above the ratings listed below can cause |
HD74HC20P HD74HC20P  |
|
|
96 |
Hynix HYMD116M725B(L)8-J/M/K/H/L series is unbuff |
HD74HC21 HD74HC21  |
HITACHI |
SOP5.2 |
01+ |
The LCX16373 contains sixteen non-inverting latc |
HD74HC21FP HD74HC21FP  |
|
|
90 |
|
HD74HC21FPD-EL HD74HC21FPD-EL  |
|
|
|
The circuit of the TSOP11..SK1 is designed in th |
HD74HC21FPEL HD74HC21FPEL  |
HITACHI |
SOP |
1997 |
512Kx8-bit Organization Address Access Time: 7 |
HD74HC21FPER HD74HC21FPER  |
HIT |
SOP |
96/P2 |
Program Store-Enable Output, Active Low. This sig |
HD74HC21FP-ER HD74HC21FP-ER  |
日立 |
SMD |
115 |
The MSM66587 Family consists of high-performance |
HD74HC21FP-TL HD74HC21FP-TL  |
HITACHI |
SMD |
|
HY5V62C is offering fully synchronous operation r |
HD74HC21FPTR HD74HC21FPTR  |
HITACHI |
94 |
798
|
Meets or exceeds PC133 registered DIMM specific |
HD74HC21P HD74HC21P  |
HIT |
|
DIP-14P |
A high input impedance, high-gain, broadb |
HD74HC21P-E-Q HD74HC21P-E-Q  |
RENESAS |
|
05/06+ |
MMFT5P03HD is an advanced power MOSFET wh |
HD74HC221 HD74HC221  |
Hitachi |
|
|
GHz TECHNOLOGY INC. RESERVES THE RIGHT TO MAKE C |
HD74HC221FP HD74HC221FP  |
HIT |
SOP-16 |
02+ |
Note 7: Maximum ambient temperature (TA-MAX) is d |
HD74HC221FPEL HD74HC221FPEL  |
HIT |
SOP |
98+ |
|
HD74HC221FPTR HD74HC221FPTR  |
HITACHI |
08+ |
|
The maximum output is set to VMAX, the mi |
HD74HC221P HD74HC221P  |
HITACHI |
DIP |
1999 |
When WEN2/LD is held LOW during Reset, this pin |
HD74HC237P HD74HC237P  |
HIT |
|
|
The PT4140 power modules are a series of |
HD74HC238 HD74HC238  |
Hitachi |
|
|
Note: Stresses greater than those listed under |
HD74HC238BP HD74HC238BP  |
HITACHI |
DIP16 |
05+ |
Hitac his ser ia l EEP RO M ar e author iz ed fo |
HD74HC238FP HD74HC238FP  |
HITACHI |
98/97 |
|
NOTE: (1) Stresses beyond those listed under &qu |
HD74HC238FPEL HD74HC238FPEL  |
RENESAS |
SOP |
2003 |
Some data sheets will contain a combination of p |
HD74HC238FPER HD74HC238FPER  |
N/A |
SOP |
07+ |
|
HD74HC238FPTR HD74HC238FPTR  |
HIT |
SMD |
94+ |
The LPC2210/2220 microcontrollers are based on a |
HD74HC238P HD74HC238P  |
Renesas |
|
|
To achieve proper device operation, an initial p |
HD74HC240 HD74HC240  |
Hitachi |
|
|
Active low signal used to reset the IrDA-SIR Deco |
HD74HC240FEL HD74HC240FEL  |
N/A |
SOP |
07+ |
• Global 3-bit analog control applies to al |
HD74HC240FP HD74HC240FP  |
HIT |
SOP |
00+ |
The OTA, while providing excellent linear ampli& |
HD74HC240FPEL HD74HC240FPEL  |
HIT |
|
98 |
The HD74HC240FPEL is designed for use wher |
HD74HC240FPTR HD74HC240FPTR  |
HITACHI |
SOP20 |
06/07+ |
cient of the circuit. The adjustment range is ge |
HD74HC240FPV HD74HC240FPV  |
|
|
|
o dcOutput Duty Cycle48 NOTE 1: Defined as ske |
HD74HC240FPVEL HD74HC240FPVEL  |
HITACHI |
SOP |
98 |
Integrated 4-band Graphic Equaliser Adjustable o |
HD74HC240P HD74HC240P  |
HITACHI |
DIP-20 |
06+ |
The heart of the PEEL™ Array architecture i |
HD74HC240PV-E-Q HD74HC240PV-E-Q  |
RENESAS |
|
05/06+ |
‡ The D packages are available taped and r |
HD74HC240RPEL HD74HC240RPEL  |
|
|
|
The MAX3873 is a compact, low-power 2.488Gbps/ 2. |
HD74HC240RPV HD74HC240RPV  |
|
|
|
Absolute maximum continuos ratings are those maxi |
HD74HC240TVEL HD74HC240TVEL  |
HITACHI |
TSSOP |
97 |
This document contains information on a product |
HD74HC241FP HD74HC241FP  |
Hitachi |
|
|
All channels are clamped during the sync interva |
HD74HC241FPEL HD74HC241FPEL  |
HIT |
SOP-20 |
2002+ |
(1) S/N can be improved for common mode noise on |
HD74HC241FPTL HD74HC241FPTL  |
|
|
|
Notes: 5. AC characteristics (except High |
HD74HC241FVEL HD74HC241FVEL  |
HIT |
SOP5.2 |
99 |
AMD MirrorBit flash technology combines years of |
HD74HC241P HD74HC241P  |
|
|
95 |
† Package drawings, standard packing quant |
HD74HC242P HD74HC242P  |
HITACHI |
|
|
A six byte command (bypass unlock) sequence to r |
HD74HC243FP HD74HC243FP  |
HIT |
SOP14 |
|
errors. Recovered decoded characters are then wri |
HD74HC243FPEL HD74HC243FPEL  |
HIT |
98 |
1678
|
Dimensions InchesMillimeters &nb |
HD74HC243P HD74HC243P  |
HIT |
|
05+ |
Collector C Base Cutoff Current, IE= 0mA, VCB=- |
HD74HC244 HD74HC244  |
|
36161 |
SOP |
N otes: 1. D Q -to-I/O wiring is shown as recom |
HD74HC244AFP HD74HC244AFP  |
HIT |
|
93 |
The device is available with an access time of 1 |
HD74HC244FP HD74HC244FP  |
|
|
98 |
- 4 external and 8 internal interrupt request so |
HD74HC244FPEL HD74HC244FPEL  |
HITACHI |
SMD |
98+ |
n −40˚C to +85˚C operation n Co |
HD74HC244FPTR HD74HC244FPTR  |
|
|
|
The SM/SMJ320VC33 can perform parallel multiply |
HD74HC244FPVEL HD74HC244FPVEL  |
HIT |
|
97 |
Note 4: Maximum ambient temperature (TA-MAX) is d |
HD74HC244P HD74HC244P  |
HIT |
DIP |
97+ |
The 128Mb SDRAM includes an AUTO REFRESH MODE, |
HD74HC244PV HD74HC244PV  |
HITACHI |
DIP |
1998 |
Automatic Step-Up and Step-Down Conversion Uses |
HD74HC244RPEL HD74HC244RPEL  |
|
|
00 |
Even Parity. Parity is even parity across AD31-0 |
HD74HC244RP-EL HD74HC244RP-EL  |
HITACHI |
|
93 |
Synchronous Output Enable. When HIGH, it stops c |
HD74HC244RPVEL HD74HC244RPVEL  |
HITACHI |
SOP |
|
The non-overlap time is the time between turning |
HD74HC244RPX HD74HC244RPX  |
HIT |
SOP7.2mm-20L |
2006 |
Additional tests under harsh chemical cond |
HD74HC244TEL HD74HC244TEL  |
HIT |
TSSOP |
94+ |
The wide supply range combined with distortion a |
HD74HC244TELL HD74HC244TELL  |
HIT |
05+/06+ |
|
Architectural Flexibility - Enhanced architectur |
HD74HC244TVEL HD74HC244TVEL  |
曰立 |
TSSOP |
978 |
The CY29946 is capable of generating 1 and 1/2 si |
HD74HC245 HD74HC245  |
HIT |
SOIC20 |
|
Programmable options include the length of pipeli |
HD74HC245AP HD74HC245AP  |
|
|
93 |
• Low saturation voltage. • Low curr |
HD74HC245D HD74HC245D  |
|
|
|
Supersedes the Zoran ZR36057. Glueless interfac |
HD74HC245FP HD74HC245FP  |
HIT |
SOP |
00+ |
The Am29LV017D is a 16 Mbit, 3.0 Volt-only Flash |
HD74HC245FPEL HD74HC245FPEL  |
HITACHI |
SMD |
00+ |
FEATURES • Compliant with Fast Ethernet, |
HD74HC245FPVEL HD74HC245FPVEL  |
HIT |
5.2MM |
02+ |
Schottky barrier rectifier thermal run-awa |
HD74HC245P HD74HC245P  |
|
|
03+ |
The Media Access Control function, provided by t |
HD74HC245RP HD74HC245RP  |
Hitachi |
|
|
General Precautions on Handling of Product Conf |
HD74HC245RPEL HD74HC245RPEL  |
HIT |
SMD |
|
The VP1058 is a low power analog-to-digita |
HD74HC245RP-EL HD74HC245RP-EL  |
|
95 |
SOP |
High-speed consumer electronic ports ESD protec |
HD74HC245RPVEL HD74HC245RPVEL  |
HITACHI |
SOP20 |
97+ |
1) Worst case package. 2) Max number of output |
HD74HC245TEL HD74HC245TEL  |
HIT |
TSSOP |
92+ |
3. Processing before Initialization Note: When p |
HD74HC245TELL HD74HC245TELL  |
HIT |
|
|
Acquisition Time (tacq). The delay between the t |
HD74HC245TVELL HD74HC245TVELL  |
HIT |
00+ |
2500
|
ESD2 testing is performed in accordance with the |
HD74HC245TWELL HD74HC245TWELL  |
HIT |
2000 |
SSOP |
The converter can be disabled to minimize batter |
HD74HC251FP HD74HC251FP  |
Hitachi |
|
|
Like all of the UltraLogic™ FLASH370i devic |
HD74HC251FPEL HD74HC251FPEL  |
N/A |
SOP |
07+ |
The LTC®4210 is a 6-pin SOT-23 Hot SwapTM con |
HD74HC251P HD74HC251P  |
HIT |
|
|
TOGGLE BIT: In addition to DATA Polling the AT28C |
HD74HC253P HD74HC253P  |
Hitachi |
|
|
The EEPROM has a capacity of 256 bits and is org |
HD74HC257 HD74HC257  |
Hitachi |
|
|
The DSP56300 core is composed of the Data |
HD74HC257FP HD74HC257FP  |
Hitachi |
|
|
The Infineon multimode transceiver is a single u |
HD74HC257FPEL HD74HC257FPEL  |
HIT |
SOP |
|
Multifunction Instructions Pipelined Architectur |
HD74HC257FPTR HD74HC257FPTR  |
HIT |
|
92 |
The UCC1800/1/2/3/4/5 family of high-speed, low- |
HD74HC257P HD74HC257P  |
HIT |
|
|
Low Reverse Current Low Stored Charge, Majority |
HD74HC257RPEL HD74HC257RPEL  |
|
|
|
The CSPU877A is a PLL based clock driver |
HD74HC258P HD74HC258P  |
Hitachi |
|
|
The AMI signal first enters a fixed equalizer, wh |
HD74HC259FP HD74HC259FP  |
Hitachi |
|
|
† Stresses beyond those listed under absol |
HD74HC259FPEL HD74HC259FPEL  |
HIT |
07+ |
|
The ADC channel is a chain of programmable amplif |
HD74HC259FPER HD74HC259FPER  |
HIT |
06+ |
2000 |
|
HD74HC259FPTL HD74HC259FPTL  |
HIT |
SOP |
96+ |
Hynix HYMD264646A(L)8-M/K/H/L series is unbuffere |
HD74HC259P HD74HC259P  |
Hitachi |
|
|
Software selectable baud rate generator Four se |
HD74HC27 HD74HC27  |
Hitachi |
|
|
The LT®1943 quad output adjustable switching |
HD74HC273 HD74HC273  |
HITACHI |
SOP-7.2-20P |
6+ |
Correcting package pin numbers in Table 2-2, Phas |
HD74HC273A HD74HC273A  |
|
|
|
Unique, factoryClasered and tested 64-bit regist |
HD74HC273D HD74HC273D  |
|
|
|
CPUS_STOP# is an asychronous input to the clock s |
HD74HC273DPVEL HD74HC273DPVEL  |
HIT |
SMD |
SMD |
3) Down convert to an I.F. of 1MHz then digitize |
HD74HC273FP HD74HC273FP  |
Hitachi |
|
|
(4) The products described in this material are |
HD74HC273FPEL HD74HC273FPEL  |
RENESAS |
SOP |
04/P2 |
The bus controller is responsible for generating |
HD74HC273FPELPB HD74HC273FPELPB  |
|
|
|
Operating Range In the operating range the func |
HD74HC273FPER HD74HC273FPER  |
|
|
|
Product Description/Features: • Low skew, |
HD74HC273FPV HD74HC273FPV  |
|
|
02 |
The TPS211x family of power multiplexers enables |
HD74HC273FPVEL HD74HC273FPVEL  |
HIT |
SOP5.2 |
98 |
The ADC124S021 operates with a single supply tha |
HD74HC273P HD74HC273P  |
|
|
03+ |
BRIDGE input. This input is used to set the Brid |
HD74HC273RP HD74HC273RP  |
HIT |
SOP7.2mm-20L |
2006 |
DESCRIPTION The M54/74HC51 is a high speed CMOS |
HD74HC273RPEL HD74HC273RPEL  |
HIT |
5.2mm |
99+ |
An internal OP-Amp controls the Drain-Source-Volt |
HD74HC273RP-EL HD74HC273RP-EL  |
HIT |
|
03+ |
With this power stage a compact 2 15 W self osc |
HD74HC273RPVEL HD74HC273RPVEL  |
HIT |
|
98 |
The PIC12C67X series fits perfectly in applicati |
HD74HC273TELL HD74HC273TELL  |
HIT |
TSSOP |
01/P4 |
Mini Small Outline Package (MSOP) Mini Small Out |
HD74HC273TELL/74HC273TVELL-E HD74HC273TELL/74HC273TVELL-E  |
HITACHI |
TSSOP20 |
02+ |
|
HD74HC273TVEL HD74HC273TVEL  |
HITACHI |
SOP |
02+ |
The XC2164 series are high frequency, low current |
HD74HC273TVELL HD74HC273TVELL  |
HIT |
03+ |
|
The HD74HC273TVELLB is a highly integrated laser |
HD74HC279 HD74HC279  |
Hitachi |
|
|
Margin Down: When this input is asserted to GND, |
HD74HC279FPEL HD74HC279FPEL  |
HIT |
SOP |
00/P2 |
Input to the PWM comparator. The current flowing |
HD74HC279P HD74HC279P  |
HITACHI |
04+ |
DIP |
|
HD74HC27FB HD74HC27FB  |
N/A |
SOP |
07+ |
Note 1: Limits are 100% production tested at TA = |
HD74HC27FP HD74HC27FP  |
HIT |
SOP |
03+ |
Current Settling Time, Clocked Mode Current Set |
HD74HC27FPEL HD74HC27FPEL  |
HIT |
SOP-14 |
03+ |
Single channel 5 V, 3.3 V and 2.5 V operation |
HD74HC27FPER HD74HC27FPER  |
日立 |
SMD |
224 |
The Master begins a transmission by sending a ST |
HD74HC27FP-ER HD74HC27FP-ER  |
|
|
00 |
Features Serial Input Bus 2.0 MHz |
HD74HC27FPLH HD74HC27FPLH  |
HIT |
|
95 |
Single-power-supply flash memory (F-ZTAT™* |
HD74HC27FPTR HD74HC27FPTR  |
HIT |
|
96 |
Input to the PWM comparator. The current flowing |
HD74HC27P HD74HC27P  |
HIT |
DIP |
DIP |
Note 1: Absolute maximum ratings are limiting val |
HD74HC27RP-EL HD74HC27RP-EL  |
|
|
|
Inisialisasi Control Word digunakan untuk mengatu |
HD74HC280 HD74HC280  |
Hitachi |
|
|
As seen in Figure 2, bias current cancellation i |
HD74HC280FP HD74HC280FP  |
Hitachi |
|
|
Note 2: This IC contains a zener clamp structure |
HD74HC280FPEL HD74HC280FPEL  |
HIT |
SOP |
01/P |
Note 2: Operating Ratings indicate conditions for |
HD74HC280FPTL HD74HC280FPTL  |
HITACHI |
|
|
|
HD74HC280P HD74HC280P  |
HIT |
|
|
Multiple devices can be concatenated by using th |
HD74HC283 HD74HC283  |
HITACHI |
08+ |
|
SSCG uses a patented technology of modulating th |
HD74HC283FP HD74HC283FP  |
HIT |
SOP16 |
07+ |
The 80C51BHP is identical to the 80C51BH When or |
HD74HC283FPEL HD74HC283FPEL  |
HIT |
SOP |
01/P2 |
Microcontrollers are often used in harsh environm |
HD74HC283P HD74HC283P  |
|
|
93 |
The positive charging current is determined by R |
HD74HC28OP HD74HC28OP  |
|
|
|
The clock itself can be either one of the Global |
HD74HC292P HD74HC292P  |
Hitachi |
|
|
The UB Series logic gates are constructed |
HD74HC294 HD74HC294  |
Hitachi |
|
|
An export permit needs to be obtained from the c |
HD74HC294FP-TR HD74HC294FP-TR  |
HIT |
|
|
This pin must be tied to either VCC or GND and mu |
HD74HC298P HD74HC298P  |
Hitachi |
|
|
The flexibility and symmetry of the CLB architec |
HD74HC299 HD74HC299  |
Hitachi |
|
|
RJC Thermal Resistance (Output Switches)1.5C/W R |
HD74HC299FP HD74HC299FP  |
Hitachi |
|
|
All electrical characteristics are subject to th |
HD74HC299P HD74HC299P  |
|
|
91 |
Ergonomics Convenient front access to US |
HD74HC30 HD74HC30  |
Hitachi |
|
|
Notes: 1. Absolute maximum I/O pins is maximum p |
HD74HC309 HD74HC309  |
|
|
|
A variety of frequency ranges and packaging opti |
HD74HC30AFP HD74HC30AFP  |
|
|
|
Quad D-MOS switch driver Free configurable as br |
HD74HC30FP HD74HC30FP  |
Hitachi |
|
|
The RBI input pin is intended to be used with a s |
HD74HC30FP-EF HD74HC30FP-EF  |
HIT |
SOP14M |
2007+ |
Edition 02.97 This edition was realized using th |
HD74HC30FPEL HD74HC30FPEL  |
HIT |
SOP |
98/P2 |
Dual channel 16-bit resolution: HD74HC30FPEL 14 |
HD74HC30FPER HD74HC30FPER  |
HITACHI |
96 |
2500
|
The TS80C54/58X2 has 2 software-selectable modes |
HD74HC30FP-ER HD74HC30FP-ER  |
HIT |
SOP |
07+ |
To achieve fast and accurate switch performance, |
HD74HC30FPLH HD74HC30FPLH  |
HITACHI |
05+/06+ |
|
• Microchips Worldwide Web site; http://ww |
HD74HC30FPTL HD74HC30FPTL  |
HITACHI |
08+ |
|
PROPAGATION DELAY Propagation delay for all 54C |
HD74HC30FPTR HD74HC30FPTR  |
N/A |
SOP |
07+ |
The CPU provides fast instruction (up to 10 MHz |
HD74HC30FP-TR HD74HC30FP-TR  |
HIT |
|
91 |
The Loop Filter is a low-pass filter. This low-pa |
HD74HC30P HD74HC30P  |
HIT |
|
DIP-14P |
A linear voltage regulator can be broken down in |
HD74HC30P-E-Q HD74HC30P-E-Q  |
RENESAS |
|
05/06+ |
The on-chip status register allows the progress |
HD74HC30RPEL HD74HC30RPEL  |
|
|
|
The Receive analog power amplifier output, capa |
HD74HC30RP-EL HD74HC30RP-EL  |
HIT |
SOP14 |
04+ |
The FDC05 and FDC05-W series offer 5 watts of out |
HD74HC30TEL HD74HC30TEL  |
HITACHI |
|
|
or 18-bit output bus. The Bus Size Select pin (BS |
HD74HC30TELL HD74HC30TELL  |
|
|
|
Housed in a small 24-pin DDIP or SMT (gull-wing) |
HD74HC32 HD74HC32  |
HIT |
|
00 |
NOTES: 1. Minimums are guaranteed but not produc |
HD74HC32F HD74HC32F  |
HIT |
SOP14 |
|
|
HD74HC32FFEL HD74HC32FFEL  |
|
|
|
Thereareadditionalprovisionsfor demonstrating DD |
HD74HC32FP HD74HC32FP  |
|
|
02 |
The clock recovery function is performed using a |
HD74HC32FPEL HD74HC32FPEL  |
HIT |
SOP |
00+ |
• In-house programming of samples and prot |
HD74HC32FP-EL HD74HC32FP-EL  |
HITACHI |
SMD |
98 |
The HD74HC32FP-EL accepts single ended or differe |
HD74HC32FPER HD74HC32FPER  |
|
|
94 |
The QDR operation is possible by supporting DDR r |
HD74HC32FP-ER HD74HC32FP-ER  |
HIT |
SMD-14 |
93+ |
Motorola reserves the right to make changes with |
HD74HC32FPLH HD74HC32FPLH  |
N/A |
SOP |
07+ |
* Specifications will vary with foreign st |
HD74HC32FPTL HD74HC32FPTL  |
|
|
|
Spartan-IIE devices deliver more gates, I/Os, an |
HD74HC32FPTR HD74HC32FPTR  |
HIT |
SOP |
95+ |
Applications • Mobile telecommunication & |
HD74HC32N HD74HC32N  |
|
|
|
Hynix HYMD132G725A(L)8-K/H/L series incorporates |
HD74HC32P HD74HC32P  |
|
|
03+ |
The 64-bit ID identifies each bq2022. The 48-bit |
HD74HC32PLEADFREE HD74HC32PLEADFREE  |
|
|
|
© Cypress Semiconductor Corporation, 2003. T |
HD74HC32RF-EL HD74HC32RF-EL  |
|
|
|
These miniature surface mount MOSFETs util |
HD74HC32RP HD74HC32RP  |
HIT |
SOP |
|
Feedback pin Chip Enable: H: Enable &nb |
HD74HC32RPEL HD74HC32RPEL  |
HIT |
SOP |
97+ |
New high voltage technology designed for ZVS-swit |
HD74HC32RP-EL HD74HC32RP-EL  |
HITACHI |
|
95 |
All part numbers end with a place code, designat |
HD74HC32T HD74HC32T  |
Hitachi |
|
|
There are dishonest and possibly illegal methods |
HD74HC32TEL HD74HC32TEL  |
HIT |
1997 |
TSSOP |
In order to compensate for the loss of the high-f |
HD74HC32TELL HD74HC32TELL  |
HIT |
TSSOP/14 |
98+ |
The AV34063 is a monolithic control circu |
HD74HC32TELL-E HD74HC32TELL-E  |
|
|
|
Package drawings, standard packing quantities, t |
HD74HC333RP HD74HC333RP  |
HIT |
SOP3.9mm |
2006 |
Features • High sensitivity (+5dB compared |
HD74HC351FPTL HD74HC351FPTL  |
HIT |
|
95 |
NOTES: 1. For a loaded output the measure |
HD74HC352P HD74HC352P  |
Hitachi |
|
|
A single pulse is defined as being greater than |
HD74HC354FPTR HD74HC354FPTR  |
HIT |
96 |
5018
|
Digital Audio Interface Select Pin (in Parallel |
HD74HC356FP HD74HC356FP  |
Hitachi |
|
|
The Hynix HYM71V16M655AT8 Series are Dual |
HD74HC356P HD74HC356P  |
Hitachi |
|
|
3-analog input terminals. Only the input from one |
HD74HC365 HD74HC365  |
Hitachi |
|
|
Care must also be taken to minimize the capacita |
HD74HC365FP HD74HC365FP  |
Hitachi |
|
|
(1) Lead Forming When forming leads, the |
HD74HC365FPEL HD74HC365FPEL  |
HIT |
03+;91+ |
|
OPERATION OF STEP-UP CONVERTER A step-up convert |
HD74HC365P HD74HC365P  |
HIT |
|
|
Stability The IRU1261 requires the use of an out |
HD74HC366P HD74HC366P  |
02+ |
917 |
DIP |
• Single supply with operation down to 1.8 |
HD74HC367 HD74HC367  |
HITACHI |
SOP5.2 |
01+ |
The 7.6 mm (0.3 inch) and 10.9 mm (0.43 inch) |
HD74HC367FP HD74HC367FP  |
HIT |
SOP16 |
97+ |
By tying one input to GND or VCC, the SN74LVC1G3 |
HD74HC367FPEL HD74HC367FPEL  |
HIT |
99+ |
SOP- |
The COP820CJ is a member of the COP8TM 8-bit Micr |
HD74HC367FPLH HD74HC367FPLH  |
N/A |
SOP |
07+ |
VIN = 3.4V VIN = 3.4V or VIN = GND, OE = GND, |
HD74HC367FPTR HD74HC367FPTR  |
HIT |
SOP |
|
Note: It is natural to assume that with the addi |
HD74HC367P HD74HC367P  |
HIT |
DIP |
0521+ |
The protection circuitry receives current |
HD74HC368FPEL HD74HC368FPEL  |
TOSHIBA |
SOP |
2002 |
Notes a. Surface Mounted on 1 x 1 FR4 Board. b |
HD74HC368P HD74HC368P  |
HD |
93+ |
DIP |
Always use controlled impedance lines (microstrip |
HD74HC373 HD74HC373  |
HITACHI |
SOP7.2 |
02+ |
ON Semiconductor has designed a new devic |
HD74HC373A HD74HC373A  |
HIT |
SMD |
98+ |
Hynix HYMD264726A(L)8J-J series is unbuffered 184 |
HD74HC373D HD74HC373D  |
TI |
DIP-20 |
|
(5) Others Check mounting conditions before usi |
HD74HC373E HD74HC373E  |
|
|
|
† For packages with exposed thermal pads, |
HD74HC373FP HD74HC373FP  |
HIT |
SOP |
0M2T |
External I/O for Timer/Counter 2 Timer/Counter |
HD74HC373FPEL HD74HC373FPEL  |
HIT |
|
00 |
|
HD74HC373FP-EL HD74HC373FP-EL  |
|
|
|
To maximize I/O throughput and improve ho |
HD74HC373FPVEL HD74HC373FPVEL  |
HIT |
SOP |
97+ |
The baseband signal can be digitized using Fairc |
HD74HC373P HD74HC373P  |
|
|
03+ |
1. A transient suppressor is normally selected a |
HD74HC373PV HD74HC373PV  |
HIT |
DIP |
07+ |
RON is 4Ω typical Low bit-to-bit skew: |
HD74HC373R HD74HC373R  |
|
|
|
The repeatability of switching with a magnetic fi |
HD74HC373RFEL HD74HC373RFEL  |
|
|
|
The MAX4364/MAX4365 are bridged audio power ampl |
HD74HC373RP HD74HC373RP  |
Hitachi |
|
|
The device is optimized for balanced bus transmi |
HD74HC373RPEL HD74HC373RPEL  |
HITACHI |
SOIC20 |
04+ |
Note 1: RL is connected to VEE for AVOL sourcing |
HD74HC373RPVEL HD74HC373RPVEL  |
HIT |
SOP7.2mm-20L |
2006 |
Fully Compliant to IrDA 1.1 Physi |
HD74HC373RTVEL HD74HC373RTVEL  |
HIT |
01+ |
SOP |
For M74HC4020 twelve kind of divided output are |
HD74HC373TELL HD74HC373TELL  |
HITACHI |
TSOP |
2001 |
Features q Few external components q Frequency |
HD74HC374 HD74HC374  |
HITACHI |
07+ |
|
Double Buffering of Data Programma |
HD74HC374D HD74HC374D  |
|
|
|
The MC623 is a 3.0 V solid-state, programm |
HD74HC374FP HD74HC374FP  |
Hitachi |
|
|
Command Line Editing - A backspace can be used to |
HD74HC374FPEL HD74HC374FPEL  |
HIT |
SOP |
00/P |
1,048,576-word 16-bit/2,097,152-word 8-bit el |
HD74HC374FPER HD74HC374FPER  |
|
|
|
The MAX1821 buck switching-regulator output is se |
HD74HC374FPLH HD74HC374FPLH  |
N/A |
SOP |
07+ |
Momentary action pushbuttons are used as |
HD74HC374FPVEL HD74HC374FPVEL  |
|
|
98 |
This low failure rate represents data col |
HD74HC374FPVEL-E-Q HD74HC374FPVEL-E-Q  |
|
|
|
When VCC is greater than 1V and less than the UV |
HD74HC374P HD74HC374P  |
|
|
03+ |
The HYM72V16M636H(L)T6 Series are Dual In-line Me |
HD74HC374PV HD74HC374PV  |
|
|
|
Thermocouple: 0.5% of indicated value or 1_C, w |
HD74HC374RP HD74HC374RP  |
HITACHI |
SOP20 |
95+ |
Receive synchronizing signal input. Eight requir |
HD74HC374RPEL HD74HC374RPEL  |
HIT |
SOP Big |
98+ |
See the functional block diagram and Figure 1 fo |
HD74HC374RP-EL HD74HC374RP-EL  |
HIT |
|
03+ |
An overrun character is placed in the HT82K628A b |
HD74HC374RPVEL HD74HC374RPVEL  |
HIT |
|
99 |
age, supplies of several hundred volts can be re |
HD74HC374TELL HD74HC374TELL  |
HIT |
TSSOP/20 |
98+ |
The COP912C COP912CH are members of the COP8TM |
HD74HC375FP HD74HC375FP  |
Hitachi |
|
|
• VDD : 2.5V 0.2V, VDDQ : 2.5V 0.2V for D |
HD74HC375FPEL HD74HC375FPEL  |
|
|
|
Inputs to VID D to A Converter Inputs to VID D |
HD74HC375FPTL HD74HC375FPTL  |
|
|
|
Early RS-232 ICs for portable systems provided a |
HD74HC375P HD74HC375P  |
Hitachi |
|
|
5. The dominant wavelength, ëd, is derived |
HD74HC377FPDEL HD74HC377FPDEL  |
HIT |
|
|
The MX803A is a full-duplex device for use with |
HD74HC377FPEL HD74HC377FPEL  |
HITACHI |
SOP |
00+ |
This family is a 16M bit dynamic RAM organized 4, |
HD74HC377FPER HD74HC377FPER  |
HIT |
SOP |
97 |
The HD74HC377FPERA/M extracts the closed caption |
HD74HC377P HD74HC377P  |
Hitachi |
|
|
4. Dropout voltage is defined as the input-to-out |
HD74HC386FPEL HD74HC386FPEL  |
|
4 |
SOP |
Note 1: VOUT+1V< VIN & 2.5V< VIN < |
HD74HC386P HD74HC386P  |
Hitachi |
|
|
The Master Reset (MR) is an asynchronous active |
HD74HC390F HD74HC390F  |
|
|
|
The serializer outputs (DO) can drive point-to-p |
HD74HC390FPEL HD74HC390FPEL  |
HIT |
SOP |
02/P2 |
*Stresses above those listed under Absolute Maxi |
HD74HC390FPTL HD74HC390FPTL  |
|
|
|
Users expect several obvious system benefits fro |
HD74HC390FPZEL HD74HC390FPZEL  |
HIT |
SOP |
00/P2 |
A read cycle begins whenever WE (Write Enable bar |
HD74HC390P HD74HC390P  |
Hitachi |
|
|
Chrontels CH7008 digital PC to TV encoder is a s |
HD74HC393 HD74HC393  |
HIT |
00+ |
SOP-14 |
These N-Channel power MOSFETs ar |
HD74HC393FP HD74HC393FP  |
Hitachi |
|
|
Differential termination for Stratix devices is |
HD74HC393FPEL HD74HC393FPEL  |
HIT |
|
97 |
the performance for a wide range of applications |
HD74HC393FPER HD74HC393FPER  |
HIT |
|
98 |
Absolute Maximum Ratings iTc=25 unless othe |
HD74HC393FPTL HD74HC393FPTL  |
TOSHIBA |
SOP |
96+ |
The actual performance of the circuit shown in F |
HD74HC393FPTR HD74HC393FPTR  |
HIT |
96+ |
SOP14 |
The K4S640432H / K4S640832H / K4S641632H |
HD74HC393P HD74HC393P  |
HIT |
|
00+ |
The ISSI 4400 Series is a 4,194,304 x 4-bit high |
HD74HC393RPEL HD74HC393RPEL  |
HIT |
SOP3.9mm-14L |
2006 |
(5) The products and product specifications desc |
HD74HC4017FP HD74HC4017FP  |
Hitachi |
|
|
Package designed for optimal automated board ass |
HD74HC4017FPEL HD74HC4017FPEL  |
HITACHI |
01+ |
SOP16 |
There are a total of 18 architecture bits in the |
HD74HC4017P HD74HC4017P  |
HIT |
DIP |
92 |
(3) The products described in this book are inte |
HD74HC4020AP HD74HC4020AP  |
HIT |
|
|
Due to their tiny size and low power consumption |
HD74HC4020FP HD74HC4020FP  |
HITACHI |
|
|
NOTES: Use a 0.1 µF capacitor on VD |
HD74HC4020FPEL HD74HC4020FPEL  |
HIT |
05+/06+ |
|
Information furnished is believed to be accurate |
HD74HC4020FPER HD74HC4020FPER  |
HIT |
|
|
Independent Overtemperature Protection Output Se |
HD74HC4020FPTR HD74HC4020FPTR  |
HIT |
SOP |
96/P2 |
Note 1: All units are 100% production tested at T |
HD74HC4020P HD74HC4020P  |
N/A |
N/A |
N/A |
See SOA curves or consult factory for appropriat |
HD74HC4022P HD74HC4022P  |
Hitachi |
|
|
90% of Vcc MIN.; 10% of Vcc MAX. 15 pF is standa |
HD74HC4024FP HD74HC4024FP  |
Hitachi |
|
|
The Harris CD74HC259 and CD74HCT299 are 8-bit s |
HD74HC4024P HD74HC4024P  |
Hitachi |
|
|
Device programming occurs by executing the progr |
HD74HC4040 HD74HC4040  |
HIT |
SOP16 |
04+ |
When 16/68# pin is at logic 1, the Intel bus int |
HD74HC4040FL HD74HC4040FL  |
HIT |
|
95 |
The 74AUP1G79 provides the single positive-edge |
HD74HC4040FP HD74HC4040FP  |
HIT |
SOP |
96 |
These circuits are completely compatible with mo |
HD74HC4040FPEL HD74HC4040FPEL  |
HIT |
SOP |
|
Filter Isolation: Rated voltage Resistance Ca |
HD74HC4040FPER HD74HC4040FPER  |
|
|
|
Note: 1. H=VIH, L=VIL, X=don't care(VIH or VIL) |
HD74HC4040FPTL HD74HC4040FPTL  |
|
|
|
• NPT IGBT technology - high switc |
HD74HC4040FPTR HD74HC4040FPTR  |
HIT |
SMD |
96 |
Result Codes - The modem issues a result code af |
HD74HC4040P HD74HC4040P  |
HITACHI |
DIP |
07+ |
CURRENT COMMAND (+,-) - are differential inputs f |
HD74HC4040PFEL5.2MM HD74HC4040PFEL5.2MM  |
|
|
|
The CYV15G0401DXB is verified by testing to be co |
HD74HC4051 HD74HC4051  |
Hitachi |
|
|
16-entry on-chip cache for low latency co |
HD74HC4051FDTL HD74HC4051FDTL  |
HITACHI |
06+ |
|
Please be aware that an important notice |
HD74HC4051FP HD74HC4051FP  |
HIT |
SOP |
00+ |
For the device-specific interrupt priority confi |
HD74HC4051FPEL HD74HC4051FPEL  |
HIT |
SOP |
02+ |
CAUTION ESD (electrostatic discharge) sensitive |
HD74HC4051FPTR HD74HC4051FPTR  |
HITACHI |
05+ |
|
This block provides the RTC reference values to |
HD74HC4051P HD74HC4051P  |
RENESAS |
05+ |
DIP(p/b) |
Offset Correct pin. A low-to-high transition on |
HD74HC4052 HD74HC4052  |
Hitachi |
|
|
LINEAR GCI MODE In GCI linear mode, one G |
HD74HC4052FDEL HD74HC4052FDEL  |
HITACHI |
SOP-16 |
2001 |
Data Bits DB11 to DB0, Port 2 Control inputs for |
HD74HC4052FP HD74HC4052FP  |
HIT |
SOP16 |
96+ |
Series 32000 TapePak and TRI-STATE are registere |
HD74HC4052FPEL HD74HC4052FPEL  |
VISHAY |
|
|
An on-chip oscillator eliminates the need for an |
HD74HC4052FPTR HD74HC4052FPTR  |
HITACHI |
08+ |
|
The DS1804 NV trimmer potentiometer is a nonvolat |
HD74HC4052P HD74HC4052P  |
|
|
90 |
The LM129 is packaged in a 2-lead TO-46 package |
HD74HC4053 HD74HC4053  |
Hitachi |
|
|
The PMOS transistors prevent backdriving current |
HD74HC4053FP HD74HC4053FP  |
HITACHI |
|
|
The COP87L88EK/RK Family OTP (One Time Program- |
HD74HC4053FPEL HD74HC4053FPEL  |
HITACHI |
SOP-16 |
02+ |
• Plastic package has Underwriters Laborat |
HD74HC4053FPTR HD74HC4053FPTR  |
HITACHI |
649 |
|
The MAX186/MAX188 provide a hard-wired SHDN pin |
HD74HC4053P HD74HC4053P  |
HIT |
08+ |
|
Some confusion exists in the area of defining an |
HD74HC4054FPEL HD74HC4054FPEL  |
|
|
|
n CAN 2.0B (passive) bus interface, with Softwar |
HD74HC4060FP HD74HC4060FP  |
HITACHI |
SOP |
07+ |
The 5V, 12V, and 15V regulator options are avail |
HD74HC4060FPEL HD74HC4060FPEL  |
|
1 |
SOP |
An 80ns wide start convert pulse is used |
HD74HC4060FPER HD74HC4060FPER  |
HIT |
|
96 |
Serial Interface. The AHD74HC4060FPERSED is cont |
HD74HC4060P HD74HC4060P  |
|
3 |
DIP |
its possible to put in stand by a part of the bo |
HD74HC4066 HD74HC4066  |
Hitachi |
|
|
2. Samsung products are not intended for use in l |
HD74HC4066FP HD74HC4066FP  |
Hitachi |
|
|
Complete System Solution for interfacing SmartMe |
HD74HC4066FPEL HD74HC4066FPEL  |
|
|
96 |
∗2 VL setting is the VVL voltage of the ve |
HD74HC4066FPEL-1 HD74HC4066FPEL-1  |
HIT |
|
98 |
While first-generation deep- memory scopes updat |
HD74HC4066FPTR HD74HC4066FPTR  |
HIT/NEC |
96 |
1678
|
where frequency is in Hz, resistance in Ohms, an |
HD74HC4066P HD74HC4066P  |
HITACHI |
DIP |
05+ |
This is the timing reference frequency which is |
HD74HC4066RPEL HD74HC4066RPEL  |
|
|
|
The Hynix HYM76V4M635HGT6 Series are 4Mx64bits Sy |
HD74HC4066RPEL-Q HD74HC4066RPEL-Q  |
|
|
|
Thermal Data - Thermal Resistances Some thermal |
HD74HC4066TELL HD74HC4066TELL  |
|
|
|
The ZR78L Series show performance characteristic |
HD74HC42 HD74HC42  |
Hitachi |
|
|
The DS1642 is a 2K x 8 nonvolatile static RAM and |
HD74HC423AFP HD74HC423AFP  |
Hitachi |
|
|
The transmitter sections utilize 1310nm Surface |
HD74HC423AFPEL HD74HC423AFPEL  |
|
|
|
Power-Off DisableVCC=0V, VOUT=4.5V1µ |
HD74HC423AP HD74HC423AP  |
Hitachi |
|
|
Enhanced N channel FET with no inherent diode to |
HD74HC42FP HD74HC42FP  |
RENESAS |
SOP |
3 |
2. TVS devices are normally selected according t |
HD74HC42FPEL HD74HC42FPEL  |
|
04+05 |
SOP |
BVDSSDrain-to-Source Breakdown Voltage-100 W |
HD74HC42P HD74HC42P  |
HITACHI |
DIP |
2000 |
AS serves to demultiplex the address/data bus. T |
HD74HC4511FPEL HD74HC4511FPEL  |
HIT |
97 |
SOP |
The write disable (WDS) instruction disables all |
HD74HC4511P HD74HC4511P  |
N/A |
DIP |
07+ |
When evaluating with evaluation chips and other |
HD74HC4514P HD74HC4514P  |
|
94 |
DIP |
Most low-end keyless entry transmitters are give |
HD74HC4515P HD74HC4515P  |
HIT |
|
|
• Low forward voltage • Very high |
HD74HC4520 HD74HC4520  |
Hitachi |
|
|
CONVERTING THE DIGITAL OUTPUT TO AN ANALOG OUTPU |
HD74HC4520FPEL HD74HC4520FPEL  |
HIT |
SOP |
06/07+ |
Notes: 1. Operation of this device above any one |
HD74HC4520P HD74HC4520P  |
Hitachi |
|
|
The Texas Instruments MSP430 family of ultralow- |
HD74HC4538 HD74HC4538  |
Hitachi |
|
|
For other applications where the input voltage c |
HD74HC4538FP HD74HC4538FP  |
HITACHI |
|
|
To provide long life and to insure soft-s |
HD74HC4538FPEL HD74HC4538FPEL  |
HIT |
|
98 |
|
HD74HC4538FPER HD74HC4538FPER  |
|
|
97 |
systems where system integrity must be ensured o |
HD74HC4538FP-ER HD74HC4538FP-ER  |
HIT |
SOP |
94+ |
The MAX6672/MAX6673 operate from 2.4V to 5.5V wit |
HD74HC4538P HD74HC4538P  |
HIT |
DIP |
DIP |
The Chip Erase operation is initiated by executi |
HD74HC4543FPEL HD74HC4543FPEL  |
HITACHI |
SOP-16 |
97+ |
The circuit is centered around the IR51H4 |
HD74HC4543P HD74HC4543P  |
N/A |
DIP |
07+ |
Built-in Schmitt trigger circuit High level ou |
HD74HC490P HD74HC490P  |
Hitachi |
|
|
For the write lock command, a successful write p |
HD74HC51 HD74HC51  |
HITACHI |
SOP5.2 |
98+ |
Users replacing EEPROMs with MRAM can eliminate t |
HD74HC51FP HD74HC51FP  |
HIT |
SOP14 |
95+ |
Transient Response and PSRR The input and output |
HD74HC51FPEL HD74HC51FPEL  |
HIT |
SOP |
99+ |
11CPDPower Dissipation Capacitance (Note |
HD74HC51FPTR HD74HC51FPTR  |
|
|
|
Dome Packages The HLMP-6xxx Series dome lamps f |
HD74HC51P HD74HC51P  |
N/A |
DIP |
07+ |
Data and Control Inputs Provide Undershoot Clamp |
HD74HC533 HD74HC533  |
Hitachi |
|
|
Left/Right Clock Word Clock Clock Input Data |
HD74HC533FP HD74HC533FP  |
Hitachi |
|
|
DELAY: Delay programming pin for restart after ov |
HD74HC533FPTL HD74HC533FPTL  |
|
|
|
There are a number of features that are used to |
HD74HC533P HD74HC533P  |
HIT |
|
|
Continuous Drain Current, VGS @ 4.5V Continuous |
HD74HC534 HD74HC534  |
Hitachi |
|
|
The HD74HC534 also has ESD tolerance that exceed |
HD74HC534FP HD74HC534FP  |
Hitachi |
|
|
Maximum switching frequency for control input (V |
HD74HC534FRTR HD74HC534FRTR  |
HITACHI |
05PB |
|
DESCRIPTION The LD1085 is a LOW DROP Voltage Re |
HD74HC534P HD74HC534P  |
|
|
99 |
2. The ADS-944 achieves its specified accuracies |
HD74HC540FP HD74HC540FP  |
HITACHI |
SOP20 |
04+ |
Note: 1. A write cycle occurs during the overlap |
HD74HC540FPEL HD74HC540FPEL  |
RENESAS |
SOP |
03/P2 |
Note: (1) X=0 for 25010, 25020. X=A8 for 25040 |
HD74HC540FPTR HD74HC540FPTR  |
|
95 |
SOP |
After the output signal has been recorded, the f |
HD74HC540FPV HD74HC540FPV  |
HIT |
SOP |
99+ |
D Auto Selection of S/E or LVD SCSI Termination |
HD74HC540P HD74HC540P  |
|
|
97 |
4. Setting possible during non-induction |
HD74HC540TELL-E HD74HC540TELL-E  |
RENESAS |
03无铅 |
TSSOP |
The HD74HC540TELL-E, HD74HC540TELL-E serie |
HD74HC541 HD74HC541  |
Hitachi |
|
|
Offset Drift is a measure of the actual change i |
HD74HC541BI HD74HC541BI  |
|
|
|
INPUT LEVELS: While operating with a 2.7V to 3.6V |
HD74HC541FP HD74HC541FP  |
HITACHI |
|
03+ |
Information at the data (D) inputs meeting the |
HD74HC541FPEL HD74HC541FPEL  |
HIT |
|
99 |
The DS1809 will also support a command-initiated |
HD74HC541FPTL HD74HC541FPTL  |
HITACHI |
93 |
1678
|
All DATEL sampling A/D converters are fully char |
HD74HC541FPV HD74HC541FPV  |
|
|
|
Raw PCB, PowerInfo™ 2 Firmware Specificat |
HD74HC541P HD74HC541P  |
|
|
00+ |
† All typical values are at VCC = 5 V, TA |
HD74HC541PV HD74HC541PV  |
|
|
|
Receiver Loss of Signal, logic high, open collec |
HD74HC541RPEL HD74HC541RPEL  |
HIT |
SOP7.2mm-20L |
2006 |
|
HD74HC541TELL HD74HC541TELL  |
HIT |
635 |
SOP |
The SY100EP57V is a high-speed, low-skew, |
HD74HC541TELL-E HD74HC541TELL-E  |
RENESAS |
04+无铅 |
TSSOP |
Input Termination Center-Tap. Each side of the tr |
HD74HC563F HD74HC563F  |
HD |
SOP |
07+ |
DESCRIPTION The 74VHCT03A is an advanced high-s |
HD74HC563FP HD74HC563FP  |
Hitachi |
|
|
Package drawings, standard packing quantities, t |
HD74HC563FPEL HD74HC563FPEL  |
HITACHI |
98+ |
SOP-16 |
The HD74HC563FPEL is a single chip IC for |
HD74HC563FP-ER HD74HC563FP-ER  |
HIT |
SOP |
95+ |
The LSTTL / MSI SN54 / 74LS257B and the S |
HD74HC563P HD74HC563P  |
HIT |
|
|
TC rating do not apply to surface mount devices |
HD74HC564FP HD74HC564FP  |
Hitachi |
|
|
The disk drive adapter functions of W83877TF incl |
HD74HC564FPEL HD74HC564FPEL  |
HIT |
SOP/20 |
01/P |
The M68AF127B is a 1Mbit (1,048,576 bit) CMOS S |
HD74HC564P HD74HC564P  |
|
|
99 |
The TigerSHARC DSP uses a Static Superscalar* ar |
HD74HC573 HD74HC573  |
Hitachi |
|
|
Low profile package (half pitch) AC Isolation |
HD74HC573D HD74HC573D  |
hit |
sop |
00+ |
These products are not designed for use in life |
HD74HC573DWS HD74HC573DWS  |
|
|
|
USB Interface USB 1.1 compatible. Open HCI 1.0 |
HD74HC573F HD74HC573F  |
|
|
|
The CMX866 shares internal register addresses and |
HD74HC573FP HD74HC573FP  |
HITACHI |
|
|
Teccor's line of sensitive gate triacs includes d |
HD74HC573FPEL HD74HC573FPEL  |
|
|
|
When the charge on the external capacitor reache |
HD74HC573FP-EL HD74HC573FP-EL  |
HIT |
SOP20 |
|
Digital signal power supply : +5 V Selection of |
HD74HC573FPEPL HD74HC573FPEPL  |
HITACHI |
SMD |
97 |
The ISSI IS62LV5128LL is a low voltage, 524,288 w |
HD74HC573P HD74HC573P  |
|
|
96 |
NOTES 1Stresses above those listed under Absolut |
HD74HC573RP HD74HC573RP  |
Hitachi |
|
|
A 1% resistor must be connected directly between |
HD74HC573RPEL HD74HC573RPEL  |
HIT |
|
93+ |
4.4.3 Group C inspection. Group C inspecti |
HD74HC574 HD74HC574  |
Hitachi |
|
|
Output Mode: This pin determines the clock output |
HD74HC574FP HD74HC574FP  |
|
|
95 |
1.700 (43.18mm) PCB Height 168-Pin Registered DI |
HD74HC574FPEL HD74HC574FPEL  |
HIT |
SOP/20 |
00/P |
These Schottky diodes are specifically designed |
HD74HC574FPEL-E HD74HC574FPEL-E  |
|
|
|
Data terminal ready A/B (active low). To indicat |
HD74HC574FP-TE2 HD74HC574FP-TE2  |
|
97+98 |
SOP |
• High-speed access time: 10, 12, and 15 n |
HD74HC574FPTR HD74HC574FPTR  |
HITACHI |
SOP5.2 |
03+ |
The maximum LED current is determined by feedback |
HD74HC574P HD74HC574P  |
|
|
98 |
The ISD5008 device is designed for use in a micr |
HD74HC574RPEL HD74HC574RPEL  |
HITACHI |
|
|
CAUTION: These devices are sensitive to e |
HD74HC589FP HD74HC589FP  |
Hitachi |
|
|
The Timing and Watchdog Module (TWM) contains a |
HD74HC589FPEL HD74HC589FPEL  |
|
|
|
The ISP1181 is a Universal Serial Bus (USB) inte |
HD74HC590FP HD74HC590FP  |
Hitachi |
|
|
VDD: Chip power supply pin. VDD should be bypasse |
HD74HC590FPEL HD74HC590FPEL  |
HIT |
SOP16L |
98+ |
The power switch is an N-channel MOSFET with a m |
HD74HC590P HD74HC590P  |
Hitachi |
|
|
Chip Select: Enables or disables all inputs excep |
HD74HC592P HD74HC592P  |
HIT |
99+ |
DIP-16 |
5 ns pin-to-pin logic delays System frequency |
HD74HC595 HD74HC595  |
HITACHI |
00+ |
SMD |
The JTAG emulation port of this device also incl |
HD74HC595FP-E HD74HC595FP-E  |
|
|
|
This is a tri-state input/output pin, used for di |
HD74HC595FPEL HD74HC595FPEL  |
HITACHI |
98+ |
SOP-16 |
125 kHz RFID Chip for Cards and Tags 256 Read/Wr |
HD74HC595FPTL HD74HC595FPTL  |
HIT |
SMD |
2003 |
PWM Current Limit for Short Circuit Protection |
HD74HC595FPTR HD74HC595FPTR  |
HIT |
08+ |
|
A static memory controller is included that supp |
HD74HC595P HD74HC595P  |
HIT |
DIP |
|
Bild/Fig. 5 Grenzstrom je Zweig IF(OV)M bei Luft |
HD74HC597FP HD74HC597FP  |
Hitachi |
|
|
The Fairchild Switch FSTU32160A is a 16-bit to 3 |
HD74HC597FPEL HD74HC597FPEL  |
HIT |
SOP |
05+ |
The Hitachi HN29V102414 Series is a CMOS Flash M |
HD74HC597FPEL-Q HD74HC597FPEL-Q  |
|
|
|
The HYST pin is a CMOS-compatible input that sele |
HD74HC597FPTL HD74HC597FPTL  |
|
|
|
DESCRIPTION This MOSFET is the latest developme |
HD74HC597FPTR HD74HC597FPTR  |
HIT |
|
00+ |
A stereo 24-bit multi-bit sigma delta ADC is used |
HD74HC597P HD74HC597P  |
N/A |
N/A |
N/A |
1. No purposefully added lead. 2. Part mounted |
HD74HC612P HD74HC612P  |
|
|
2 |
Frequency response also depends on the phase as |
HD74HC616FPEL HD74HC616FPEL  |
HIT |
98 |
SOP |
Control input for gain dynamics (25 or 50dB), mut |
HD74HC623FP HD74HC623FP  |
Hitachi |
|
|
With the sense leads connected, the difference b |
HD74HC623FPEL HD74HC623FPEL  |
HIT |
SOP |
99/P2 |
Capacitor mounted close to the power modu |
HD74HC623N HD74HC623N  |
HIT |
|
97 |
The GS 702 transmitter controller has been desig |
HD74HC623P HD74HC623P  |
HITACHI |
DIP |
1997 |
CAUTION: These devices are sensitive to electros |
HD74HC640 HD74HC640  |
Hitachi |
|
|
|
HD74HC640FPEL HD74HC640FPEL  |
RENESAS |
|
03+ |
The HD74HC640FPEL is a fast SRAM with a nonvolat |
HD74HC640FPTL HD74HC640FPTL  |
HIT |
SMD |
90 |
The configuration registers support mode selectio |
HD74HC640P HD74HC640P  |
HIT |
DIP |
0304+ |
The EB-2100x accommodates either a coaxial or an |
HD74HC643 HD74HC643  |
|
98+ |
SOP |
Microcontroller support; only for control |
HD74HC651P HD74HC651P  |
Hitachi |
|
|
Configuration of a single-ended input has been |
HD74HC652P HD74HC652P  |
Hitachi |
|
|
Stresses beyond those listed under absolute maxi |
HD74HC668P HD74HC668P  |
Hitachi |
|
|
Features Include: Ideal for 1U High / Low Profi |
HD74HC669FPER HD74HC669FPER  |
|
|
|
The control signals for the configuration memory |
HD74HC669P HD74HC669P  |
HIT |
DIP |
07+ |
shifting the character 4 data over one character |
HD74HC670 HD74HC670  |
Hitachi |
|
|
Note: Human Body Model ESD test performance for t |
HD74HC670FPEL HD74HC670FPEL  |
HIT |
SOP |
98+ |
Military temperature range Output skew 2.0 ns |
HD74HC670FP-TL HD74HC670FP-TL  |
HITACHI |
|
|
The AHC126 devices are quadruple bus buffer gat |
HD74HC670P HD74HC670P  |
Hitachi |
|
|
Hewlett-Packards HSMS-285A family of zero bias S |
HD74HC673P HD74HC673P  |
|
|
00 |
The LAN91C100FD is designed to facilitate the imp |
HD74HC674P HD74HC674P  |
Hitachi |
|
|
The AHC240 devices are organized as two 4-bit b |
HD74HC677P HD74HC677P  |
Hitachi |
|
|
Hynix HYMD132725B(L)8-M/K/H/L series is unbuffere |
HD74HC682P HD74HC682P  |
HIT |
|
|
POWER GROUND. Terminals 7 through 17 and |
HD74HC684P HD74HC684P  |
|
|
00 |
CE1 is active LOW and CE2 is active HIGH. Both ch |
HD74HC688 HD74HC688  |
HIT |
SOP20 |
04+ |
Metallic environment and interferences Distance |
HD74HC688C HD74HC688C  |
N/A |
NEC |
04+ |
The Design Browser allows users to select and im |
HD74HC688FP HD74HC688FP  |
|
|
96 |
Crystal Frequency(Note TCLK Frequency TCLK Duty |
HD74HC688FPEL HD74HC688FPEL  |
HIT |
|
02 |
• 1.6KB TX FIFO to support maximum network |
HD74HC688FPTR HD74HC688FPTR  |
|
92 |
SOP |
These Schottky diodes are specifi- cally designe |
HD74HC688P HD74HC688P  |
HIT |
|
01 |
Where: CL is the load capacitance as specified b |
HD74HC699P HD74HC699P  |
|
|
|
interoperability and reliability risks. Integrat |
HD74HC7266 HD74HC7266  |
|
|
|
The MAX6806/MAX6807/MAX6808 feature internal hys- |
HD74HC7266FP HD74HC7266FP  |
HITACHI |
|
97 |
|
HD74HC7266FPEL HD74HC7266FPEL  |
HITACHI |
SOP |
97+ |
Read (READ) The READ instruction is the only ins |
HD74HC7266P HD74HC7266P  |
Hitachi |
|
|
It is recommended that CE be decoded and used as |
HD74HC73 HD74HC73  |
HIT |
DIP14 |
|
This method of determining odd / even field infor |
HD74HC73FP HD74HC73FP  |
HIT |
|
|
will vary with supply voltage, switching frequenc |
HD74HC73FPEL HD74HC73FPEL  |
HIT |
02+ |
TSSOP |
The UPA831TC contains one NE856 and one NE681 NP |
HD74HC73P HD74HC73P  |
Hitachi |
|
|
64K x 16 advanced high-speed CMOS Static RAM Equ |
HD74HC74 HD74HC74  |
HIT |
TSOP |
TSOP |
Enhanced performance, new generation, high-volta |
HD74HC74A HD74HC74A  |
HIT |
SMD |
94 |
AØ, BØ & CØ- are the con |
HD74HC74F HD74HC74F  |
|
95 |
SOP |
The K6F8016U6C families are fabricated by |
HD74HC74FP HD74HC74FP  |
HITACHI |
SMD |
1991 |
These chip-type LEDs utilize aluminum indium g |
HD74HC74FPEC HD74HC74FPEC  |
|
4 |
SOP |
This is a dual function pin. In the IDT Standard |
HD74HC74FPEL HD74HC74FPEL  |
HITACHI |
SOP |
2000 |
Single 5 V 10% Power Supply Fully |
HD74HC74FPER HD74HC74FPER  |
HITACHI |
SOP5.2 |
96 |
Absolute Maximum Ratings indicate limits beyond |
HD74HC74FP-ER HD74HC74FP-ER  |
HIT |
SOP5.2mm-14L |
1995 |
The Hynix HYM7V65801B Q-Series are 8Mx64bits Sync |
HD74HC74FPLH HD74HC74FPLH  |
HD |
SOP |
07+ |
The choice of a specific 3B module depends upon |
HD74HC74FPTL HD74HC74FPTL  |
HIT |
SOP |
96/P |
This is a positive edge-triggered phase and freq |
HD74HC74FP-TL HD74HC74FP-TL  |
HIT |
SOP5.2mm-14L |
1988 |
Programming is performed exactly as it is in conv |
HD74HC74FPTR HD74HC74FPTR  |
HIT |
SOP14 |
94+ |
Figure 2 shows the basic transmission specificati |
HD74HC74FPZEL HD74HC74FPZEL  |
HIT |
05+ |
|
If one of the battery voltages becomes higher tha |
HD74HC74P HD74HC74P  |
HIT |
DIP14 |
01+ |
♦ Low Power: 511mW (fCLK = 100MHz) ♦ |
HD74HC74RFP HD74HC74RFP  |
|
|
|
A digitally adjustable voltage reference is usefu |
HD74HC74RP HD74HC74RP  |
HIT |
02+ |
SOP/14 |
Also available under the following Standard Micr |
HD74HC74RPEL HD74HC74RPEL  |
|
|
99 |
A simple sleep mode was incorporated in the modu |
HD74HC74RP-EL HD74HC74RP-EL  |
HIT |
SOP |
93/P3 |
The purpose of this 54C/74C Family Characteristi |
HD74HC74RP-RL HD74HC74RP-RL  |
HIT |
92P3 |
975
|
The LED and RXD outputs are controlled by the |
HD74HC74TEL HD74HC74TEL  |
HITACHI |
|
|
The LIS2L02AL has a full scale of 2g and it is |
HD74HC74TELL HD74HC74TELL  |
HIT |
TSSOP/14 |
98+ |
Note: Stresses greater than those listed under |
HD74HC74TEPL HD74HC74TEPL  |
HITACHI |
|
SSOP |
Lead temperature 1,6 mm (1/16 inch) from c |
HD74HC75FP HD74HC75FP  |
Hitachi |
|
|
† Stresses beyond those listed under absol |
HD74HC75FPEL HD74HC75FPEL  |
HITACHI |
|
|
The programmable AND Array consists of 36 inputs |
HD74HC75FPTL HD74HC75FPTL  |
|
|
|
(3) LUMINANCE SENSOR CONTROL The luminanc |
HD74HC75P HD74HC75P  |
HITACHI |
DIP |
2000 |
The LIS2L02AL belongs to a family of products s |
HD74HC75P-E HD74HC75P-E  |
|
|
|
The XRT75VL00D includes a Jitter Attenuator that |
HD74HC76FP HD74HC76FP  |
Hitachi |
|
|
Input gain control for FL, FR, C, SL, SR, and SW |
HD74HC76FPEL HD74HC76FPEL  |
HIT |
04+ |
|
The TLV246x is a family of low-power rail-to-rai |
HD74HC76P HD74HC76P  |
Hitachi |
|
|
Synchronizable or Constant Frequency Low Noise O |
HD74HC77 HD74HC77  |
|
96 |
SOP |
ARM7TDMI™ ARM® Thumb® Proces |
HD74HC77FP HD74HC77FP  |
Hitachi |
|
|
a watchdog timer (except for STM704/795/806) as |
HD74HC77FPEL HD74HC77FPEL  |
HD |
SOP-14 |
97+ |
Bit Clock (For MPI)/Data Clock (For GCI). In MP |
HD74HC77FPTR HD74HC77FPTR  |
|
|
|
2not subject to production test, specified by des |
HD74HC83P HD74HC83P  |
N/A |
DIP |
07+ |
At the end of the rows containing the sysMEM Blo |
HD74HC85 HD74HC85  |
Hitachi |
|
|
The HDB3 Decoder is responsible for decod |
HD74HC85FP HD74HC85FP  |
RENESAS |
SOP |
|
4.3 Screening (JANS, JANTX, and JANTXV le |
HD74HC85FPEL HD74HC85FPEL  |
HITACHI |
|
98+ |
The digitally controlled potentiometer is implem |
HD74HC85FP-ER HD74HC85FP-ER  |
HD |
|
|
• High-speed access time: 70, 100, and 120 |
HD74HC85P HD74HC85P  |
HIT |
DIP |
98 |
The HD74HC85P is a very high frequency video ampl |
HD74HC86 HD74HC86  |
HD |
93+ |
SMD |
The EP7311 is designed for ultra-low-power opera |
HD74HC86E HD74HC86E  |
N/A |
DIP |
07+ |
SDRAM device attributes: Minimum clock delay bac |
HD74HC86FP HD74HC86FP  |
|
97 |
SOP |
The 153CMQ isolated, center tap Schottky rectifi |
HD74HC86FPEL HD74HC86FPEL  |
HITACHI |
SOP5.2 |
01+ |
(a) For a dual device surface mounted on 8 sq cm |
HD74HC86FPLH HD74HC86FPLH  |
N/A |
SOP |
07+ |
A careful design optimizes the device for accura |
HD74HC86FPTL HD74HC86FPTL  |
|
|
|
Load Current Regulation. Because the device opera |
HD74HC86FPTR HD74HC86FPTR  |
HIT |
95+ |
SOP14 |
The SC-1420 Series of quartz crystal oscillators |
HD74HC86P HD74HC86P  |
HIT |
DIP |
98+ |
The AHCT367 devices are designed specifically t |
HD74HC86RP HD74HC86RP  |
HIT |
SOP3.9mm-14L |
2000 |
The HD74HC86RP is a Memory StickTM host interface |
HD74HC86RPEL HD74HC86RPEL  |
HITACHI |
|
00+ |
CL includes probe and jig capacitance. In the e |
HD74HC86RP-EL HD74HC86RP-EL  |
HIT |
原装 |
00+ |
EPSEN is used in conjunction with Port 5 and Por |
HD74HC86TEL HD74HC86TEL  |
HIT |
TSSOP/14 |
98+ |
The LVT162245 and LVTH162245 contains sixteen no |
HD74HC86TELL HD74HC86TELL  |
|
|
|
Well matched to the LM1236/46 CMOS preampl |
HD74HC93FP HD74HC93FP  |
HIT |
SOP14 |
95+ |
Note) 1. Measuring methods are based on JAPANESE |
HD74HC93FPEL HD74HC93FPEL  |
RENESAS |
03+ |
SOP-14 |
The LTC®1981/LTC1982 are low-power, self-cont |
HD74HC93FPTL HD74HC93FPTL  |
HIT |
|
95 |
FUNCTIONAL DESCRIPTION STAND-BY STATE The exter |
HD74HC93P HD74HC93P  |
HITACHI |
DIP-14 |
|
The standby function is provided by the STBY* c |
HD74HC95P HD74HC95P  |
HIT |
|
05+ |
Eight Independent Channel 12-Bit DACs wit |
HD74HCO4P HD74HCO4P  |
|
|
|
Places the 1-bit bypass register between the TDI |
HD74HCOOP HD74HCOOP  |
|
|
|
Setting the transceiver to SIR/MIR Mode (9.6 kb/ |
HD74HCT00C HD74HCT00C  |
|
|
|
Frame Pulse ST-BUS/GCI 8.192 Mb/s (CMOS tristate |
HD74HCT04AFP HD74HCT04AFP  |
|
|
|
Lead Temperature 1.6mm (1/16 inch) from ca |
HD74HCT04AFPEL HD74HCT04AFPEL  |
HITACHI |
SOP-14 |
07+ |
. . . employing the Schottky Barrier princ |
HD74HCT125 HD74HCT125  |
Hitachi |
|
|
s Sector Protection A hardware method to |
HD74HCT125FP HD74HCT125FP  |
Hitachi |
|
|
current level to keep the output in regulation. I |
HD74HCT125FPEL HD74HCT125FPEL  |
HIT |
01+03 |
SOP |
Lamp Type: 1X 32W T8 Lamp Line Input: 90-140VA |
HD74HCT125FPTR HD74HCT125FPTR  |
HIT |
07+ |
|
See Power Dissipation in the Applications section |
HD74HCT125P HD74HCT125P  |
HITACHI |
|
99 |
Controller (MAC) for Supporting Standard Rates up |
HD74HCT125R HD74HCT125R  |
HITACHI |
93+ |
2896
|
Current Output, Sourcing Current Output, Sinki |
HD74HCT125R-EL HD74HCT125R-EL  |
HIT |
|
93 |
POWER-UP When power is first applied, power-on |
HD74HCT125RP HD74HCT125RP  |
HIT |
|
92P3 |
In the EDO page mode, read (data out) and |
HD74HCT125RPEL HD74HCT125RPEL  |
HIT |
SOP-14 |
94 (4C46) |
NOTES: 1. All typical values are at VCC = 5 V, |
HD74HCT125RP-EL HD74HCT125RP-EL  |
HITACHI |
06+ |
|
Notes 1. Derate linearly from 25C at a rate of |
HD74HCT125TEL HD74HCT125TEL  |
HITACHI |
2007 |
|
more than 40 dB rejection of the transmit-genera |
HD74HCT125TELL HD74HCT125TELL  |
|
|
02 |
|
HD74HCT126 HD74HCT126  |
Hitachi |
|
|
This integrated circuit can be damaged by ESD. T |
HD74HCT126FPEL HD74HCT126FPEL  |
HIT |
SOP |
99+ |
Note:1. Please refer to crystal manufacturer spec |
HD74HCT126RP HD74HCT126RP  |
|
|
|
When FECSEL2 = 0, VCOCLK = REFCLK * M. The user |
HD74HCT138 HD74HCT138  |
Hitachi |
|
|
detection, and an FSK voltage comparator which |
HD74HCT138FP HD74HCT138FP  |
Hitachi |
|
|
Hitac his ser ia l EEP RO M ar e author iz ed fo |
HD74HCT138FPEL HD74HCT138FPEL  |
HIT |
SOP |
98+ |
functional operation of the device at these or a |
HD74HCT138FPTR HD74HCT138FPTR  |
HIT |
|
96 |
To integrate so many transistors on a piece of s |
HD74HCT138P HD74HCT138P  |
Hitachi |
|
|
The ispLSI 3320 is a High-Density Programmable L |
HD74HCT138RFEL HD74HCT138RFEL  |
日立 |
SOP |
9828 |
Connecting the inhibit input (Pin 2) to input co |
HD74HCT138RPEL HD74HCT138RPEL  |
HIT |
SOP3.9mm-16L |
1994 |
The LTC®1821 is a parallel input 16-bit multi |
HD74HCT138RP-EL HD74HCT138RP-EL  |
HITACHI |
SO16/3.9 |
94+ |
The voltage offset of the PA03 may be ext |
HD74HCT138TELL HD74HCT138TELL  |
|
|
|
q NEW DMOS TOPOLOGY: Ultra Low Dropout Vo |
HD74HCT1G02CME HD74HCT1G02CME  |
RENESAS |
SOT-353 |
05+ |
Chip ground. Current return for both the low-sid |
HD74HCT1G04CM HD74HCT1G04CM  |
Hitachi |
|
|
The ATF1502ASV macrocell output can be selected |
HD74HCT1G04CME HD74HCT1G04CME  |
HITACHI |
|
|
Note 11: Output resistance (ROUT) models all vol |
HD74HCT1G08CME HD74HCT1G08CME  |
|
|
|
• High performance 1:10 clock driver for g |
HD74HCT1G14CME HD74HCT1G14CME  |
|
|
|
Positive CML Output with Operating Range: |
HD74HCT1G32CM HD74HCT1G32CM  |
renesas/Hitachi |
SOT-353 |
06+ |
Keep safety first in your circuit designs! 1. R |
HD74HCT1G32CME HD74HCT1G32CME  |
. |
. |
03+ |
The Delta39K/Ultra37000 ISR Programming Kit enabl |
HD74HCT1G94CM HD74HCT1G94CM  |
renesas/Hitachi |
SOT-353 |
06+ |
Watchdog Timer The Watchdog Timer circuit monit |
HD74HCT23AP HD74HCT23AP  |
|
|
|
By means of an external distance resistor on the |
HD74HCT240 HD74HCT240  |
Hitachi |
|
|
Min. Typ. Max. UnitsConditions 30CCC CCCVV |
HD74HCT240FP HD74HCT240FP  |
HIT |
SOP20 |
03+ |
Protection circuitry is provided onboard for ove |
HD74HCT240FPEL HD74HCT240FPEL  |
|
|
|
Notes: 1. For codes not listed in the figure abo |
HD74HCT240FP-TR HD74HCT240FP-TR  |
HIT |
SOP |
07+ |
The information contined here concerns products i |
HD74HCT240P HD74HCT240P  |
HIT |
|
05+ |
The OPA860 is a versatile monolithic component |
HD74HCT241FPEL HD74HCT241FPEL  |
|
|
|
Nonlinearity Alignment Error2   |
HD74HCT241P HD74HCT241P  |
Hitachi |
|
|
The PS-R11 photo switches are composed of a modul |
HD74HCT243P HD74HCT243P  |
Hitachi |
|
|
The Micro6 package with its customized leadframe |
HD74HCT244 HD74HCT244  |
HITACHI |
08+ |
|
Upon applying a reverse-polarity voltage to the D |
HD74HCT244FP HD74HCT244FP  |
Hitachi |
|
|
Added Package Pins to GPIO Table in Section 8. Re |
HD74HCT244FPEL HD74HCT244FPEL  |
HIT |
|
98 |
An example of this situation is a power op amp c |
HD74HCT244FPVEL HD74HCT244FPVEL  |
HIT |
SOP |
|
For driving the N-Channel gates, it is im |
HD74HCT244P HD74HCT244P  |
HIT |
DIP |
99 |
The instruction and data caches operate independ |
HD74HCT244PF HD74HCT244PF  |
HIT |
SMD |
2000 |
The AC258 is a quad 2-input multiplexer with 3-s |
HD74HCT244RP HD74HCT244RP  |
HIT |
SOP |
06+ |
Leads are Readily Solderable Lead |
HD74HCT244RPEL HD74HCT244RPEL  |
|
|
|
Applying a LOW to the INIT input causes an immedi |
HD74HCT244RP-EL HD74HCT244RP-EL  |
N/A |
N/A |
N/A |
• Guaranteed AC performance over temperatu |
HD74HCT244-RPVEL HD74HCT244-RPVEL  |
HIT |
SOP |
02+ |
Inhibit: The Inhibit pin is an open-collector/dra |
HD74HCT244TELL HD74HCT244TELL  |
RENESAS |
SSOP |
2004 |
The LMS1585A and LMS1587 are low dropout positiv |
HD74HCT244TVEL HD74HCT244TVEL  |
|
|
|
The COP820CJ is a member of the COP8TM 8-bit Micr |
HD74HCT244TVELL HD74HCT244TVELL  |
|
|
02 |
Note 1: Limits are 100% production tested at TA = |
HD74HCT244TVELL-E HD74HCT244TVELL-E  |
RENESAS |
SSOP |
2003 |
Photodiode, Operational Amplifier, and Feedback |
HD74HCT245 HD74HCT245  |
HITACHI |
|
|
signal processing, and are commonly used in digi |
HD74HCT245FP HD74HCT245FP  |
HIT |
SOP |
N/A |
Reset will terminate any operation, e.g., Read, E |
HD74HCT245FPEL HD74HCT245FPEL  |
|
|
00 |
In addition to determining the off time during a |
HD74HCT245P HD74HCT245P  |
HIT |
|
2001 |
For the purposes of simplification, the following |
HD74HCT245RP HD74HCT245RP  |
HIT |
2002+ |
SOP-20 |
Minimum time between read command (i.e., a write |
HD74HCT245RPEL HD74HCT245RPEL  |
HIT |
SOP-20 7.2mm |
92 (2L26) |
|
HD74HCT245RPVEL HD74HCT245RPVEL  |
HITACHI |
|
|
For conditions shown as Max. or Min., use approp |
HD74HCT245TELL HD74HCT245TELL  |
HIT |
TSSOP |
02+ |
Reference clock. GTx_CLK is a continuous externa |
HD74HCT245TVEL HD74HCT245TVEL  |
|
|
|
To set the new VTRIP voltage, apply the desired |
HD74HCT245TVELL HD74HCT245TVELL  |
|
|
99 |
A recommended PCB pad layout for the miniature S |
HD74HCT245TVELL-E HD74HCT245TVELL-E  |
HIT |
TSSOP |
|
|
HD74HCT24AP HD74HCT24AP  |
|
HIT |
90 |
This IC contains a zener clamp structure between |
HD74HCT373 HD74HCT373  |
Hitachi |
|
|
Notes: (1) See SOA curves or consult factory for |
HD74HCT373FP HD74HCT373FP  |
Hitachi |
|
|
Four of the nine instructions end with the trans |
HD74HCT373FPEL HD74HCT373FPEL  |
HIT |
SMD |
03+ |
(1) MTTF calculator available at http://www.moto |
HD74HCT373FP-TL HD74HCT373FP-TL  |
HITACHI |
SMD |
1991 |
The LM4040 utilizes fuse and zener-zap reverse b |
HD74HCT373P HD74HCT373P  |
|
|
97 |
The ISL6440 monitors all the output voltages. A |
HD74HCT373RP HD74HCT373RP  |
HIT |
SOP |
92P1 |
A buffered output-enable (OE) input can be used |
HD74HCT373RPEL HD74HCT373RPEL  |
HITACHI |
|
|
− Conforms to USB specification Rev. 1.1 |
HD74HCT373RP-Q HD74HCT373RP-Q  |
HIT |
SOP |
07+/08+ |
|
HD74HCT373RPVEL HD74HCT373RPVEL  |
HIT |
SMD |
99 |
Devices with a date code prior to 0425 (manufactu |
HD74HCT373TELL HD74HCT373TELL  |
HTT |
N/A |
98+ |
AMDs unique I/O macrocell offers major benefits |
HD74HCT373TVELL HD74HCT373TVELL  |
HITACHI |
2000 |
975
|
The dMAX controller includes features such as th |
HD74HCT374 HD74HCT374  |
Hitachi |
|
|
The PI90SD1636A is a single chip, Gigabit Ethern |
HD74HCT374FPEL HD74HCT374FPEL  |
RENESAS |
|
|
B ild / Fig. 9 G renzstrom je Zweig (OV)M . Bel |
HD74HCT374FP-TE2 HD74HCT374FP-TE2  |
HIT |
SOP20 |
04+ |
NOTES: 1. All typical values are at VCC = 5 V, |
HD74HCT374FPVEL HD74HCT374FPVEL  |
|
|
|
Data Registers (DR3 to DR0) The potentiometer h |
HD74HCT374P HD74HCT374P  |
HIT |
|
2001 |
The KESRX05 is a single chip ASK (Amplitude Shif |
HD74HCT374RP HD74HCT374RP  |
HIT |
SOP |
92P1 |
This series of Schottky diode chips are specific |
HD74HCT374RPEL HD74HCT374RPEL  |
HITACHI |
|
9746 |
The HD74HCT374RPEL is a high-bandwidth FET bus s |
HD74HCT374RP-EL HD74HCT374RP-EL  |
HIT |
SOP |
|
2.7V to 3.6V on A-port and 4.5V to 5.5V o |
HD74HCT374RPU HD74HCT374RPU  |
HIT |
SOP |
|
The PTN78020A operates over an input voltage ran |
HD74HCT374RPUEL HD74HCT374RPUEL  |
HIT |
SOP |
|
At the end of the phase 1, the voltage across th |
HD74HCT374RPVEL HD74HCT374RPVEL  |
HIT |
SOP7.2 |
98+ |
Notes: 1. Test conditions assume signal transit |
HD74HCT533P HD74HCT533P  |
N/A |
DIP |
07+ |
Parallel to Serial Conversion In OC3 mod |
HD74HCT534FP HD74HCT534FP  |
N/A |
SOP |
07+ |
The Preliminary Information presented herein rep |
HD74HCT534P HD74HCT534P  |
Hitachi |
|
|
Integrated Single-Chip 10/100 Ethernet Switch |
HD74HCT536P HD74HCT536P  |
N/A |
DIP |
07+ |
Almost full/almost empty flag. Depth-offset valu |
HD74HCT540FPEL HD74HCT540FPEL  |
HITACHI |
01+ |
SOP |
Places the 1-bit bypass register between the TDI |
HD74HCT540P HD74HCT540P  |
Hitachi |
|
|
The total power consumption is then simplified t |
HD74HCT541 HD74HCT541  |
Hitachi |
|
|
Radiation Hardness: - Total Dose 1MRad(Si) - Si |
HD74HCT541FP HD74HCT541FP  |
|
|
|
The HD74HCT541FP is a 10-bit monolithic sampling |
HD74HCT541FPEL HD74HCT541FPEL  |
RENESAS |
04+ |
SOP-20(p/b) |
IEC 1000-4-2, -4 & -5 Industry Requirements |
HD74HCT541FPV HD74HCT541FPV  |
HIT |
|
97 |
These numbers are measured with the load |
HD74HCT541FPVEL HD74HCT541FPVEL  |
HIT |
SOP5.2 |
99 |
|
HD74HCT541P HD74HCT541P  |
Hitachi |
|
|
• Rated isolation voltage (RMS includes DC |
HD74HCT541RPEL HD74HCT541RPEL  |
HI |
|
04 |
The 7640 group, an enhanced family of CMOS 8-bit |
HD74HCT541TELL HD74HCT541TELL  |
HITACHI |
TSSOP |
04+ |
Integrated Adaptive Receive Equalization |
HD74HCT563P HD74HCT563P  |
HIT |
|
|
Most high-speed ADCs that sample more than sever |
HD74HCT564FP HD74HCT564FP  |
Hitachi |
|
|
This series of hermetic packaged MOSFETs are ide |
HD74HCT564P HD74HCT564P  |
HIT |
|
|
This document is a general product description an |
HD74HCT573P HD74HCT573P  |
N/A |
DIP |
07+ |
Clock 155.52MHz (LVDS output). Differential outpu |
HD74HCT574FP HD74HCT574FP  |
N/A |
SOP |
07+ |
7. The input bias currents are junction leakage |
HD74HCT574FPEL HD74HCT574FPEL  |
HITACHI |
SOP20 |
04+ |
ISINK = 3.2mA, VCC = 4.25V ISOURCE = 0.1mA Outp |
HD74HCT574P HD74HCT574P  |
N/A |
DIP |
07+ |
s 16/32-bit ARM7TDMI-S microcontroller in a LQFP |
HD74HCT620P HD74HCT620P  |
Hitachi |
|
|
Wide supply voltage range from 1.65 V to 5.5 V |
HD74HCT640P HD74HCT640P  |
HIT |
|
|
For years, Fox has been ranked as Americas prefer |
HD74HCT643P HD74HCT643P  |
Hitachi |
|
|
• Excellent Appearance • Slim Font |
HD74HCT688FPEL HD74HCT688FPEL  |
HIT |
SOP |
98+ |
The capacitor type used for C1 and C2 is not crit |
HD74HCT688FP-EL HD74HCT688FP-EL  |
HITACHI |
SOP |
98+ |
The format for all instructions sent to the devi |
HD74HCT688P HD74HCT688P  |
Hitachi |
|
|
Low Cost Complete H-Bridge 8 Amp Capability, 75 |
HD74HLS125AFPEL HD74HLS125AFPEL  |
HITACHI |
SOP-14P |
00+ |
Note 1: Absolute Maximum Ratings indicate limits |
HD74HLS367AFPEL HD74HLS367AFPEL  |
|
|
|
and low Vcc,131,072-word by 8-bit CMOS static RAM |
HD74HS27 HD74HS27  |
|
|
|
The CPU clock offers the unique feature of smooth |
HD74HS973FPEL HD74HS973FPEL  |
|
|
|
An external inhibit port is provided to control |
HD74JC02FP HD74JC02FP  |
HITACHI |
2007 |
|
The HD74JC02FP is a COMMON EMITTER transistor ca |
HD74L157 HD74L157  |
HIT |
DIP |
|
|
HD74L586P HD74L586P  |
|
|
|
The serializer transmits serialized data and app |
HD74L8195AP HD74L8195AP  |
|
|
|
Special handling is required for Flash Memory pro |
HD74LC244AFPEL HD74LC244AFPEL  |
HITACHI |
704 |
|
Case: JEDEC DO-214AA molded plastic body Termina |
HD74LC244FPEL HD74LC244FPEL  |
|
|
|
• Single power supply. • Crystal/Rin |
HD74LCV08TELL HD74LCV08TELL  |
HIT |
SMD |
97+ |
3.3 Electrical performance characteristics |
HD74LD245P HD74LD245P  |
N/A |
DIP |
98 |
Features: Operates from 2.4V to 26V supp |
HD74LHX244A HD74LHX244A  |
HITACHI |
|
|
The product term array in the FLASH370i logic bl |
HD74LS00 HD74LS00  |
|
|
92 |
The FM local oscillator consists of a transistor |
HD74LS00-A HD74LS00-A  |
|
|
|
• 2 0.7 amp. full bridge outputs • |
HD74LS00FP HD74LS00FP  |
HITACHI |
SMD |
1993 |
The IS25Cxx is enabled through the Chip Select p |
HD74LS00FPEL HD74LS00FPEL  |
HIT |
SOP |
97/P2 |
A 75 Ω termination resistor with short trac |
HD74LS00FPER HD74LS00FPER  |
HIT |
SOP-14 |
96+ |
The matte tin finish on Sirenzas lead-free packag |
HD74LS00FPT HD74LS00FPT  |
HIT |
08+ |
|
RESET: This active low input causes a chip reset |
HD74LS00FPTL HD74LS00FPTL  |
HITACHI |
SOP |
07+ |
The 5002C is an audio/video switching device. The |
HD74LS00FP-TL HD74LS00FP-TL  |
HIT |
SOP5.2mm-14L |
1991 |
The terminator's internal power is dissipated pr |
HD74LS00FPTR HD74LS00FPTR  |
HITACHI |
744 |
|
These SiGe HBT amplifiers exhibit a soft breakdow |
HD74LS00FREL HD74LS00FREL  |
HITACHI |
SOT |
93+ |
out-of-lock with the input reference. The LOL con |
HD74LS00P HD74LS00P  |
HIT |
DIP |
DIP |
Primary-Secondary Isolation Electrical isolation |
HD74LS00PLEADFREE HD74LS00PLEADFREE  |
|
|
|
SENSE (Pin 4): This pin performs two functions. I |
HD74LS00RP HD74LS00RP  |
Hitachi |
|
|
A proprietary process is used to create a surfac |
HD74LS00RPEL HD74LS00RPEL  |
HIT |
3.9MM |
04+ |
The HD74LS00RPEL offers the advantages of lower p |
HD74LS00RP-EL HD74LS00RP-EL  |
HITACHI |
92 |
1678
|
FXL translators offer an advantage in that eithe |
HD74LS01 HD74LS01  |
Hitachi |
|
|
FEATURES 256 Positions 10 k , 100 k , 1 M Low |
HD74LS01FPEL HD74LS01FPEL  |
|
|
|
Protection is guaranteed in terms of short-circu |
HD74LS01N HD74LS01N  |
|
|
|
Copyright © 2002 Lattice Semiconductor Corp |
HD74LS01P HD74LS01P  |
|
|
03+ |
• Communications Equipment Routers, |
HD74LS02 HD74LS02  |
TI |
DIP |
08+ |
Chip Select : Enables or disables all inputs exce |
HD74LS02AR HD74LS02AR  |
HIT |
|
|
Hynix HYMD232726A(L)8-M/K/H/L series incorporates |
HD74LS02FP HD74LS02FP  |
HIT |
|
98/P2 |
The K3P7V(U)1000B-YC is a fully static mask progr |
HD74LS02FPEL HD74LS02FPEL  |
HIT |
SOP |
02/P2 |
Note 1) The specified condition Tj = 25C means t |
HD74LS02FPER HD74LS02FPER  |
HIT |
SOP |
93 |
2. The minimum load current is the minimum curre |
HD74LS02FPFL HD74LS02FPFL  |
HIT |
SOP |
97/P2 |
Surface-mount technology can be applied to the C |
HD74LS02FPQ HD74LS02FPQ  |
HIT |
SOP |
07+/08+ |
|
HD74LS02P HD74LS02P  |
HIT |
DIP |
DIP |
NOTE: 1. Stresses greater than those listed und |
HD74LS02PBEL HD74LS02PBEL  |
HITACHI |
SOP-14 |
00+ |
Note 2: Absolute maximum ratings are those values |
HD74LS02RP HD74LS02RP  |
HIT |
SOP |
1994 |
The ADSP-TS202S TigerSHARC processor is an ultra |
HD74LS02RPEL HD74LS02RPEL  |
HIT |
3.9MM |
98+ |
The graphs on the following pages illustrate the |
HD74LS02RP-EL HD74LS02RP-EL  |
N/A |
SOP |
07+ |
L1 MIWU or CKX L2 MIWU or TDX &nb |
HD74LS02SPFEL HD74LS02SPFEL  |
HIT |
|
98 |
2. Instruction X just changes its data field (in |
HD74LS03 HD74LS03  |
HIT |
SMD |
SMD |
Guaranteed by design. Regulation is measured at |
HD74LS03FP HD74LS03FP  |
HIT |
SOP14 |
|
The LM78LXX is available in the plastic TO-92 (Z |
HD74LS03FPEL HD74LS03FPEL  |
HITACHI |
SOP-14 |
9710+ |
Information present at any register is tr |
HD74LS03P HD74LS03P  |
|
|
03+ |
Selectable 150 Ω and 100 Ω ter |
HD74LS03P-E-Q HD74LS03P-E-Q  |
RENESAS |
|
05/06+ |
Address, data inputs, and write controls are regi |
HD74LS03P-Q HD74LS03P-Q  |
|
|
|
|
HD74LS04 HD74LS04  |
|
|
94 |
AutoShutdown is a trademark of Maxim Integrated P |
HD74LS048 HD74LS048  |
|
DIP |
96 |
HY57V281620B(L)T is offering fully synchronous op |
HD74LS04D HD74LS04D  |
HITACHI |
|
|
The LX1744 is a compact high efficiency |
HD74LS04FL HD74LS04FL  |
HITACHI |
08+ |
|
TOSHIBA is continually working to improve |
HD74LS04FP HD74LS04FP  |
HIT |
SOP-14 |
00+ |
The 56800 core is based on a Harvard-style archi |
HD74LS04FPEL HD74LS04FPEL  |
HIT |
SOP |
02/P2 |
The command sequences are written by applying a |
HD74LS04FPER HD74LS04FPER  |
|
|
94 |
|
HD74LS04FP-T1 HD74LS04FP-T1  |
HIT |
08+ |
|
NOTES: 1. 'X' in part numbers indicates power ra |
HD74LS04FPTL HD74LS04FPTL  |
HIT |
94+ |
SOP14 |
The DS1330 256k NV SRAMs are 262,144-bit, fully s |
HD74LS04FPTR HD74LS04FPTR  |
HIT |
91+ |
|
When a product has been in production for a peri |
HD74LS04FP-TR HD74LS04FP-TR  |
HIT |
SOP5.2mm-14L |
1998 |
Please be aware that an important notice |
HD74LS04G HD74LS04G  |
Hitachi |
|
|
The DDX-2100 Power Device is a dual channel H-Br |
HD74LS04P HD74LS04P  |
HIT |
DIP |
DIP |
But, problems arise if you must connect two comp |
HD74LS04P-E-Q HD74LS04P-E-Q  |
REN |
DIP |
8 |
Approximately 10ns after the rising edge of the |
HD74LS04R-EL HD74LS04R-EL  |
HIT |
|
92 |
The SPT1018 has 10 KH and 100K ECL logic level c |
HD74LS04RFEL HD74LS04RFEL  |
HIT |
|
00+ |
Notes: 1. The nominal thermal resistance of a d |
HD74LS04RP HD74LS04RP  |
N/A |
N/A |
N/A |
The HD74LS04RP series are highly precise, low po |
HD74LS04RPEL HD74LS04RPEL  |
HITACHI |
SOP |
2002 |
• Plastic package has Underwriters Laborat |
HD74LS04RP-EL HD74LS04RP-EL  |
HIT |
. |
|
Absolute Maximum Ratings indicate sustained limi |
HD74LS04RP-Q HD74LS04RP-Q  |
|
|
|
Single chip teletext IC Analog CVB |
HD74LS05 HD74LS05  |
HIT |
|
90 |
The HY638100 is a high-speed 131,072 x 8-bits CMO |
HD74LS05FPDEL HD74LS05FPDEL  |
HIT |
SOP |
00P2 |
Winbonds I1800 ChipCorder® provides high-qual |
HD74LS05FPEL HD74LS05FPEL  |
HIT |
SOP |
02/P2 |
Layout 50 ps Channel-to-Channel Skew (Typ) 200 |
HD74LS05FPTL HD74LS05FPTL  |
HIT |
07+ |
|
protection, and an input under- voltage lockout |
HD74LS05FPTR HD74LS05FPTR  |
HIT |
|
96 |
Initial Release Updated Minimum Voltage Conditio |
|