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Crystal input, has internal load cap (36pF) and feedback resistor from X2. Crystal output, nominally 14.318MHz. Has internal load cap (36pF). Frequency select pin, latched input Free running PCI clock not affected by PCI_STOP# for power management. Frequency select pin, latched input PCI clock output Ground PCI clock outputs Stops all SDRAMs besides the SDRAM_F clocks at logic 0 level, when input low. Stops all PCICLKs besides the PCICLK_F clocks at logic 0 level, when input low. Input to Fanout Buffers for SDRAM outputs. Supply for core, & CPU 3.3V Analog ground Frequency select pin, latched input 48MHz output clock Logic input to select 24 or 48MHz 24MHz/48MHz clock output Data pin for I2C circuitry 5V tolerant Clock pin of I2C circuitry 5V tolerant Free running SDRAM clock not affected by SDRAM_STOP# for power management. SDRAM clock outputs, Fanout Buffer outputs from BUFFER IN pin (controlled by chipset). Powers down chip, active low except XTAL and CPUCLK_T0 & CPUCLKC0. Asynchronous active low input pin used to power down the device into a low power state. The internal clocks are disabled and the VCO and the crystal are stopped. The latency of the power down will not be greater than 3ms.
The SO-8 has been modified through a customized leadframe for enhanced thermal characteristics and multiple-die capability making it ideal in a variety of power applications. With these improvements, multiple devices can be used in an application with dramatically reduced board space. The package is designed for vapor phase, infra red, or wave soldering techniques.
ELECTRICAL CHARACTERISTICS Test conditions T amb = C40C to + 85C, VCC = 3.0V to 6.0V. These characteristics are guaranteed by either device characterisation, production test and or design. They apply within the specified ambient temperature and supply voltage ranges unless otherwise stated using test circuit Figure 12.
Parr number/PDF Mfg Pack D/C Descrpion
K800   K800 K800 PDF Download TO-3P 06+ Notes:  1. For bestCpractices recommendati
K8000014   K8000014 K8000014 PDF Download ones and six zeros switching at the input clock
K800014   K800014 K800014 PDF Download Vcc = 2.7V~3.3V, TA = 0C to 70C/ -40C to 85C unle
K8013P   K8013P K8013P PDF Download 3. AGC (AGC, pixel mixing, mirror reversal, and
K801616UBM   K801616UBM K801616UBM PDF Download The basic unit of logic on these devices is the
K801616UTA   K801616UTA K801616UTA PDF Download SMG BGA 03+ Transmit Frame Sync input. Normally a pulse or
K803216UTC   K803216UTC K803216UTC PDF Download BGA   This represents a 21.6C temperature rise
K804   K804 K804 PDF Download SAMSUNG TO-3P 2004+ The K804 is a Password Access Security Supervi-
K8050S   K8050S K8050S PDF Download SK SIP N/A The TL431 is a programmable shunt voltage refer
K806   K806 K806 PDF Download The ispGAL22LV10 is manufactured using Lattice S
K8060   K8060 K8060 PDF Download An Intel 8254 timer-counter (or functionally equi
K806109471   K806109471 K806109471 PDF Download 16 99+ Following either the application of a valid inpu
K808   K808 K808 PDF Download The driver controls the gate voltage of the powe
K8086040   K8086040 K8086040 PDF Download A simple method of calculating the values of actu
K809   K809 K809 PDF Download SWITCHING PERFORMANCE  Maximum Conversion R
K80C31H   K80C31H K80C31H PDF Download Command Line Format Command lines issued to the
K80D3216UBM-YI09   K80D3216UBM-YI09 K80D3216UBM-YI09 PDF Download SAM LQFP er clock, the master must have an open drain out
K.328-EYW   K.328-EYW K.328-EYW PDF Download Capacitor Table Table 1 identifies the character
K000810160   K000810160 K000810160 PDF Download Notes: 1. For Max. or Min. conditions, use appr
K001   K001 K001 PDF Download SGS-THOMSON MSOP-8 03+ "Advance" product information describe
K001237   K001237 K001237 PDF Download NOTE: EP circuits are designed to meet the DC sp
K001422   K001422 K001422 PDF Download   Contact resistance measured with 4 termin
K002992523832   K002992523832 K002992523832 PDF Download • Stub-series terminated logic for 2.5 V VD
K002992524641   K002992524641 K002992524641 PDF Download   Widebus  Family D A-Port Outputs
K003   K003 K003 PDF Download The K003 is a low dropout three terminal regulat
K0030   K0030 K0030 PDF Download The SPT1175 operates from a single +5 V power su
K004   K004 K004 PDF Download 15 MICREL 05+ If an output channel is set to three-state condit
K006   K006 K006 PDF Download MIC SOT23-3 05+ Notes: 1. RJA is determined with the device mou
K006-07   K006-07 K006-07 PDF Download 420 The Fairchild Switch FST3125 provides four high-
K006-07B   K006-07B K006-07B PDF Download IMI SSOP20P 95+ (e) For a dual device surface mounted on 85 sq c
K007   K007 K007 PDF Download MIC SOT23-3 05+ The second amplifier, RFA2, provides 51 dB of gai
K009   K009 K009 PDF Download There are two alternatives to set the boot block.
K009-FP(RF5A25)   K009-FP(RF5A25) K009-FP(RF5A25) PDF Download KAWAI QFP 07+ or x is approximately 59.83. This requires an ad
K010   K010 K010 PDF Download For more information refer to Xilinx XC4000E and
K0101   K0101 K0101 PDF Download FSA2467 features very low quiescent current even
K0103111220   K0103111220 K0103111220 PDF Download This basic current-mirror configuration is sensi
K0104   K0104 K0104 PDF Download   2.1 General. The documents listed in this
K011   K011 K011 PDF Download Standard Mode IBM PC/XT®, PC/AT®, and PS/
K0110RS2B   K0110RS2B K0110RS2B PDF Download Note 6: The input bias currents are junction leak
K013   K013 K013 PDF Download The DS1258W executes a write cycle whenever WE an
K014-06C   K014-06C K014-06C PDF Download N/A SSOP This document is a general product description an
K014-FP(RF5A37)   K014-FP(RF5A37) K014-FP(RF5A37) PDF Download KAWAI QFP 07+ Small signal analog and digital ground Gate driv
K015   K015 K015 PDF Download MIC This signal is asserted to indicate either 0 or
K016   K016 K016 PDF Download MIC   Keep the output leads as short as possibl
K01-6002A(K545-012-01)   K01-6002A(K545-012-01) K01-6002A(K545-012-01) PDF Download KODENSHI SOT 05+ DESCRIPTION Input reference frequency, 5V toler
K016SPS6526   K016SPS6526 K016SPS6526 PDF Download N/A module 2005+ When the CMI/ECL pin is low the chip is in ECL m
K0174-0034   K0174-0034 K0174-0034 PDF Download SOC 04+ SMD The inductor and varactor elements of the tank ci
K018   K018 K018 PDF Download MIC SOT23-3 05+ 128K x 36, 256K x 18 memory configurations Suppo
K020X12B1E3   K020X12B1E3 K020X12B1E3 PDF Download SOP The digital serial interface can be configured f
K026   K026 K026 PDF Download MIC   This series employs the Schottky Barrier
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