For K = 1 the transfer function is H(z) = 1, that means no filtering is performed and the input data remains unchanged. For K < 1 noise reduction filtering is activated. The input data and the delayed data from the memory are combined according H(z).
This new generation of trench MOSFETs from Zetex utilizes a unique structure that combines the benefits of low on-resistance with fast switching speed. This makes them ideal for high efficiency, low voltage, power management applications.
The XP162A01B5PR is a P-Channel Power MOS FET with low on-state resistance and ultra high-speed switching characteristics. Because high-speed switching is possible, the IC can be efficiently set thereby saving energy. The small SOT-89 package makes high density mounting possible.
This new generation of trench MOSFETs from Zetex utilizes a unique structure that combines the benefits of low on-resistance with fast switching speed. This makes them ideal for high efficiency, low voltage, power management applications.
The XP162A01B5PR is a P-Channel Power MOS FET with low on-state resistance and ultra high-speed switching characteristics. Because high-speed switching is possible, the IC can be efficiently set thereby saving energy. The small SOT-89 package makes high density mounting possible.
| Parr number/PDF | Mfg | Pack | D/C | Descrpion |
LWQ130-5222 LWQ130-5222  |
LAMBDA | Module | N/A | The CS61318 is an E1 primary rate line interface |
| LWQ130-5224 LWQ130-5224 |
LAMBDA | Module | N/A | These bits are for programming the PLLs internal |
| LWQ130-5225 LWQ130-5225 |
LAMBDA | Module | N/A | 1. Serial control by I2C bus. 2. 5-inputs, 2-out |
| LWQ130-5FF2 LWQ130-5FF2 |
The IC can be controlled by a microcontroller or | |||
| LWQ130-5FF4 LWQ130-5FF4 |
LAMBDA | Module | N/A | The TS80C54/58X2 retains all features of the Atm |
| LWQ130-5FF5 LWQ130-5FF5 |
The TSOP344..SB1F - series are miniaturized rece | |||
| LWQ183-P2Q2-34 LWQ183-P2Q2-34 |
OSR | 07+ | 10000 | Two Line Output Control BecauseEPROMs are usual |
| LWQ18A LWQ18A |
The TOSHIBA TLP227G series consist of a gallium | |||
| LWQ18S(BINL-B2-0WX20019976) LWQ18S(BINL-B2-0WX20019976) |
2008 | † Stresses beyond those listed under absol | ||
| LWQ200-5222 LWQ200-5222 |
LAMBDA | Module | N/A | The HSP3824 has on-board ADCs for analog I and Q |
| LWQ200-5224 LWQ200-5224 |
LAMBDA | Module | N/A | The ULx2803A, ULx2803LW, ULx2823A, and UL |
| LWQ200-5225 LWQ200-5225 |
Connecting the inhibit input (Pin 2) to input co | |||
| LWQ200-5FF2 LWQ200-5FF2 |
slave devices in the I 2C protocol with all memo | |||
| LWQ200-5FF4 LWQ200-5FF4 |
Note 5: Timing specifications are sample tested a | |||
| LWQ200-5FF5 LWQ200-5FF5 |
LAMBDA | Module | N/A | • The information in this document is curre |
| LWQ80-5222 LWQ80-5222 |
LAMBDA | Module | N/A | (1) MTTF calculator available at http://www.moto |
| LWQ80-5224 LWQ80-5224 |
LAMBDA | Module | N/A | This pin is the positive supply voltage input. Du |
| LWQ80-5225 LWQ80-5225 |
LAMBDA | Module | N/A | The TOSHIBA products listed in this document are |
| LWQ80-5FF2 LWQ80-5FF2 |
LAMBDA | Module | N/A | OmniVision Technologies, Inc. reserves the right |
| LWQ80-5FF4 LWQ80-5FF4 |
LAMBDA | Module | N/A | Program memory can store both instructions and d |
| LWQ80-5FF5 LWQ80-5FF5 |
100 | 天龙伟业 | 靳先生 | The SLIC performs 2 wire to 4 wire conversion by |
| LWQ983 LWQ983 |
In no event shall ELAN Microelectronics be made | |||
| L.PI-1R2D13 L.PI-1R2D13 |
N/A | • Industry Standard Size • Industr | ||
| L.PI-2R2D10 L.PI-2R2D10 |
N/A | VDD to GNDC0.3 V to 7 V Analog Input Voltage to | ||
| L/03/07/T1.5 L/03/07/T1.5 |
Junction-to-case thermal resistance is sp | |||
| L/03/07/T5.5 L/03/07/T5.5 |
256 x 16-bit organization array (L/03/07/T5.5) 5 | |||
| L/03/07/T6.5 L/03/07/T6.5 |
International Rectifier's L/03/07/T6.5 is a state | |||
| L/08/17/T2 L/08/17/T2 |
A Command User Interface (CUI) serves as the in | |||
| L/08/17/T3 L/08/17/T3 |
In a slow mode, the conversion is completed befo | |||
| L/3.3/08/T8 L/3.3/08/T8 |
Round Control. When this control is HIGH, a one | |||
| L0.381R5.A10 L0.381R5.A10 |
In addition to parallel termination, SSTL-3 and | |||
| L0.CB020.B21 L0.CB020.B21 |
A. These materials are intended as a reference t | |||
| L00005B L00005B |
NSC | Figure 2 shows another typical circuit. T | ||
| L00006B L00006B |
NSC | QFN-16 | The U6209B is controlled via a 2-wire I2C bus fo | |
| L00008B L00008B |
NS | LLP | 02+ | • These diodes are also available in other |
| L00014B L00014B |
NSC | Electrical characteristics are guaranteed over f | ||
| L00017B L00017B |
NSC | Both circuits have three binary select inputs (A | ||
| L00018B L00018B |
NSC | These N-Channel power MOSFETs ar | ||
| L00019B L00019B |
NSC | RTS = 0 V, VDD1 = 5.5 V 2 Mbps, VDD1 = 5.5 V, se | ||
| L00041B L00041B |
NS | QFN | 04+ | The oscillator determines the frequency of the o |
| L00053B L00053B |
NS | QFN-16 | 05+ | The ISSI IS41C4100 and IS41LV4100 are 1,048,576 |
| L0005B L0005B |
NATIONAL | BGA | 03+ | Hynix HYMD264G726A(L)8-M/K/H/L series is designed |
| L0006B L0006B |
NATIONAL | BGA | 03+ | 1 Prior to the onset of overvoltage clamping. For |
| L000S3B L000S3B |
NS | TSOP | 05+ | The TINIm400 must be seated correctly into the DS |
| L001A235 L001A235 |
INTEL | BGA | 98 | 1. Ground / thermal vias are critical for the pr |
| L0021 L0021 |
Self-synchronization to main channel output Fre | |||
| L0028 L0028 |
Leading edge blanking is also applied to the cur | |||
| L0042817C L0042817C |
PHILIPS | DIP-4 | By using the control signal CS, SK and data input | |
| L004A L004A |
NSC | Operation above maximum ratings may cause perman | ||
| L004B L004B |
NS | LLP8 | 03+ | Bias Supply (Input): This input pin supplies pow |
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