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The IALUs have hardware support for circular buffers, bit reverse, and zero-overhead looping. Circular buffers facilitate efficient programming of delay lines and other data structures required in digital signal processing, and they are commonly used in digital filters and Fourier transforms. Each IALU pro- vides registers for four circular buffers, so applications can set up a total of eight circular buffers. The IALUs handle address pointer wraparound automatically, reducing overhead, increas- ing performance, and simplifying implementation. Circular buffers can start and end at any memory location.
The Discrete Products Operation of Intersil Corporation has developed a series of Radiation Hardened MOSFETs specif- ically designed for commercial and military space applica- tions. Enhanced Power MOSFET immunity to Single Event Effects (SEE), Single Event Gate Rupture (SEGR) in particu- lar, is combined with 100K RADS of total dose hardness to provide devices which are ideally suited to harsh space envi- ronments. The dose rate and neutron tolerance necessary for military applications have not been sacrificed.
  The S9306C devices combine 10-bit CMOS shift registers, accom- panying data latches and control circuitry with bipolar sourcing outputs and pnp active pull downs. Designed primarily to drive vacuum- fluorescent displays, the 60 V and -40 mA output ratings also allow these devices to be used in many other peripheral power driver applica- tions. The S9306C feature an increased data input rate (compared with the older UCN/UCQ5810-F) and a controlled output slew rate.   The CMOS shift register and latches allow direct interfacing with microprocessor-based systems. With a 3.3 V or 5 V logic supply, serial-data input rates of at least 10 MHz .   A CMOS serial data output permits cascade connections in applica- tions requiring additional drive lines. Similar devices are available as the A6812C (20 bits) and A6818C (32 bits).   The S9306C output source drivers are npn Darlingtons, capable of sourcing up to 40 mA. The controlled output slew rate reduces electro- magnetic noise, which is an important consideration in systems that include telecommunications and/or microprocessors and to meet government emissions regulations. For inter-digit blanking, all output drivers can be disabled and all sink drivers turned on with a BLANK- ING input high. The pnp active pull-downs will sink at least 2.5 mA.   The S9306C are available in two temperature ranges for optimum performance in commercial (suffix S-) or industrial (suffix E-) applica- tions. They are provided in two package styles for through-hole DIP (suffix -A) or minimum-area surface-mount SOIC (suffix -LW). Copper lead frames, low logic-power dissipation, and low output- saturation voltages allow all devices to source 25 mA from all outputs continuously over the maximum operating temperature range.
Parr number/PDF Mfg Pack D/C Descrpion
S9304243A   S9304243A S9304243A PDF Download FEATURES lOptions :-   10mm lead spread -
S9306   S9306 S9306 PDF Download NSC PLCC20 03/+04+ See thermal derating curves for safe operating a
S9306AB   S9306AB S9306AB PDF Download SNIC 1450 At light loads, when the filter inductor c
S9306AB(NM27C2I0V)   S9306AB(NM27C2I0V) S9306AB(NM27C2I0V) PDF Download The write enable (WEN) instruction must be execu
S9306ABF   S9306ABF S9306ABF PDF Download NS PLCC52 06+ After initialization and synchronization, the se
S9306AF   S9306AF S9306AF PDF Download Note 1 These AC characteristics are guaranteed wi
S9306AG   S9306AG S9306AG PDF Download Note 4 The M1 and M2 threshold specifications ar
S930PA930MHZ   S930PA930MHZ S930PA930MHZ PDF Download SAMSUNG/00+ * 0 The C-channel provides a means for the system to
S930PC   S930PC S930PC PDF Download 1998 This document contains ADVANCE INFORMATION. ISSI
S9312   S9312 S9312 PDF Download Force Voltage/Measure Current (FVMI) Force Curre
S9316AB   S9316AB S9316AB PDF Download The following are trademarks of Skyworks Solution
S9316XS   S9316XS S9316XS PDF Download where R CS = parallel combination of R14 and R15,
S9318AB   S9318AB S9318AB PDF Download SEIK0 PLCC 03 04 The ATF1502ASV is a high-performance, high-densi
S9318AN   S9318AN S9318AN PDF Download PLCC 02+ Sirenza Microdevices S9318AN is a high efficiency
S9318AN/DP83932BVF(PATENTED)   S9318AN/DP83932BVF(PATENTED) S9318AN/DP83932BVF(PATENTED) PDF Download The frequency characteristic for the phase locked
S9318S   S9318S S9318S PDF Download CHARGE (Pin 4): Charge Pin. A low (<0.3V) to h
S9318ST   S9318ST S9318ST PDF Download Analog signals should be inputted through AIL an
S9324AB   S9324AB S9324AB PDF Download Ns QFP 91+ Each LIU is composed of transmit and receive in
S9327AD   S9327AD S9327AD PDF Download National Semiconductor PLCC-68 07+/08+ Through the careful manipulation of the diameter
S9330   S9330 S9330 PDF Download GENESIS QFP 0228+ Stresses above those listed under Absolute Maxim
S9330-135   S9330-135 S9330-135 PDF Download SAGE QFP208 Note:  2. When FIFO is operated at the alm
S9330-135-A1   S9330-135-A1 S9330-135-A1 PDF Download Additional design entry and simulation support p
S9330AB   S9330AB S9330AB PDF Download Ns QFP 91+ • 2 programmable tone generators per chann
S93363S   S93363S S93363S PDF Download The accelerated program (ACC) feature allows the
S9336AB   S9336AB S9336AB PDF Download Members of the Texas Instruments Widebus ™
S9336AFMM5451V   S9336AFMM5451V S9336AFMM5451V PDF Download NOTES: 1. Stresses beyond those listed under ab
S9342AB   S9342AB S9342AB PDF Download The TOSGAGE-S9342AB is a single-beam thickness
S93462SB   S93462SB S93462SB PDF Download summit summit dc03 The V104 10 Bit LVDS Receiver for Video is design
S93463P   S93463P S93463P PDF Download SUMMIT DIP/8 99+ Pulse loading: The capacitors charged which unsi
S93463S   S93463S S93463S PDF Download 60 SUMMIT 99+ • Benchmark Efficiency Above 20KHz •
S9348AB   S9348AB S9348AB PDF Download Ns QFP 91+   PNPN devices designed for high volume, li
S9348BJ   S9348BJ S9348BJ PDF Download The P8xC557E8 is a control-oriented CPU with on-
S9352AH   S9352AH S9352AH PDF Download Pb−Free Packages are Available Small Compa
S9352BG   S9352BG S9352BG PDF Download NS QFP 06+ Notes: 1. IDD depends on output load condition wh
S93663P   S93663P S93663P PDF Download OUTPUT VOLTAGE PROGRAMMING   Resistors R1 a
S93663S   S93663S S93663S PDF Download SUMMIT SOP8S 98+
S93663S-2.7   S93663S-2.7 S93663S-2.7 PDF Download 98 Specified for 79 - and 112 - Channel Loading Ex
S93663SB   S93663SB S93663SB PDF Download output voltage for longer talk time. The DC/DC
S93A46AD   S93A46AD S93A46AD PDF Download SEIKO 03+ Intersil CA3089 is a monolithic integrated circu
S93A86AD   S93A86AD S93A86AD PDF Download SEIKO 2006-2-3 via an RF or an infrared transmission medium upo
S93C4   S93C4 S93C4 PDF Download PSSOP8 INTERFACE COMMUNICATION: The IC pin determines wh
S93C46   S93C46 S93C46 PDF Download SEIKO SOP 03+ The information provided herein is believed to b
S93C46ADFJ   S93C46ADFJ S93C46ADFJ PDF Download SEIKO SOP-8 96+ PWM With Tri-State Enable 12-V Low-Side Gate D
S93C46ADFJTB   S93C46ADFJTB S93C46ADFJTB PDF Download Power Good output. This is an open drain output
S93C46ADFJ-TB   S93C46ADFJ-TB S93C46ADFJ-TB PDF Download N/A SEIKO 05+ The variance in output pulse width from device t
S93C46ADP   S93C46ADP S93C46ADP PDF Download 1. In Figure 1, test circuit electrolytic capaci
S93C46AFJ-TB   S93C46AFJ-TB S93C46AFJ-TB PDF Download EPSON 2002 The LTC ®3406B-2 is a high efficiency monolit
S93C46AMFN-TB   S93C46AMFN-TB S93C46AMFN-TB PDF Download EPSON SOP 02+  TAOperating free-air temperatureC4085C NOT
S93C46B   S93C46B S93C46B PDF Download SEIKO TSSOP N/A   Pb−Free Package is Available  
S93C46BD   S93C46BD S93C46BD PDF Download SEIKO 2006-2-3   This product has a MOS structure and is s
S93C46D   S93C46D S93C46D PDF Download SEIKO 00+   1/ Separate samples may be used for each
S93C46D47   S93C46D47 S93C46D47 PDF Download SEIKO SOP8 Supply Voltage Input. From it a stable internal r
S93C46D4X   S93C46D4X S93C46D4X PDF Download 03+   GENERAL DESCRIPTION  NJM2567 is a l
S93C46D9Y   S93C46D9Y S93C46D9Y PDF Download SOP-8 06+ S The SOT-227 package is universally preferred for
S93C46DB   S93C46DB S93C46DB PDF Download 01 The device contains an 8-bit instruction registe
S93C46DD   S93C46DD S93C46DD PDF Download There are 4 'Y' gate drives (Y1..Y4) which are a
S93C46DD0Z   S93C46DD0Z S93C46DD0Z PDF Download 3520 TOUT C This pin is the buffered output of the tem
S93C46DD11   S93C46DD11 S93C46DD11 PDF Download SOP-8 0452 PWM control function Motor speed can be controll
S93C46DD12   S93C46DD12 S93C46DD12 PDF Download 3520 "Preliminary" product information desc
S93C46DD26   S93C46DD26 S93C46DD26 PDF Download SEIKO SOP8 06+ The bq2050H determines battery capacity by moni-
S93C46DD34   S93C46DD34 S93C46DD34 PDF Download In-band interference rejection for an unmodulate
S93C46DD7Y   S93C46DD7Y S93C46DD7Y PDF Download Application circuits shown are typical examples
S93C46DDFJ   S93C46DDFJ S93C46DDFJ PDF Download Hynix HYMD116M645A(L)6-K/H/L series incorporates
S93C46DUOZ   S93C46DUOZ S93C46DUOZ PDF Download 00+ SOP-8 Used as external reference input when internal r
S93C46DV   S93C46DV S93C46DV PDF Download SOP-8 The MD1810 has four inputs which individually con
S93C46DV09   S93C46DV09 S93C46DV09 PDF Download 400 x 300 pixels resolution 8um x 8um square pix
S93C46V   S93C46V S93C46V PDF Download 10000 N/A N/A The reverse current will not exceed 10 µA a
S93C46V25   S93C46V25 S93C46V25 PDF Download DESCRIPTION The CENTRAL SEMICONDUCTOR CCLH080 Se
S93C48   S93C48 S93C48 PDF Download QFP44 Address (24) and data (32) pins can be used for
S93C5   S93C5 S93C5 PDF Download N/A SMD 2000 Thick metal clad ground planes restrict the ther
S93C56   S93C56 S93C56 PDF Download SEIKO SOP8 06+ Left/right simultaneous volume or channel 1 volum
S93C56ADFJ-TB   S93C56ADFJ-TB S93C56ADFJ-TB PDF Download SEIKO STK 2004+ Stresses above those listed under Absolute Maximu
S93C56AFJ-TB   S93C56AFJ-TB S93C56AFJ-TB PDF Download 2) Limiting the external clock frequency to 12 MH
S93C56AFT-TB   S93C56AFT-TB S93C56AFT-TB PDF Download 00+ via an RF or an infrared transmission medium up
S93C56BD   S93C56BD S93C56BD PDF Download SII SMD-8 The architecture of RDRAM devices allows the hig
S93C56D   S93C56D S93C56D PDF Download 2008 Collector-Emitter Voltage Collector-Base Volta
S93C56D4V   S93C56D4V S93C56D4V PDF Download SEIKO 3.9mm 5V TOLERANT INPUTS AND OUTPUTS HIGH SPEED: tPD
S93C56D91   S93C56D91 S93C56D91 PDF Download SEIKO SOP-8 06+ Up to 18-A Output Current 5-V Input Bus Wide-Ou
S93C56D92   S93C56D92 S93C56D92 PDF Download SEIKO SOP-8 06+ ISENSE: This is the input to the X10 wide bandwid
S93C56DVZ1   S93C56DVZ1 S93C56DVZ1 PDF Download SEIKO SOP8 0408+ Widebus  Family Output Ports Have Equiva
S93C6   S93C6 S93C6 PDF Download 8 *Consult your local sales representative for SO&
S93C64   S93C64 S93C64 PDF Download DIP8 07+ The following power-up supply voltage application
S93C66   S93C66 S93C66 PDF Download SEIKO SOP8 04+ Notes: (1) The VS1 and VS2 ports may remain ope
S93C66AFT   S93C66AFT S93C66AFT PDF Download Ÿ Miniature, cost-effective switching solut
S93C66AFTTB   S93C66AFTTB S93C66AFTTB PDF Download Caution: This component is susceptible to damage
S93C66BD   S93C66BD S93C66BD PDF Download SEIKO 2006-2-3 reset (pin 4)   An active low input that f
S93C66BR   S93C66BR S93C66BR PDF Download 1 A critical component is a component used in a l
S93C66D   S93C66D S93C66D PDF Download ST Electrostatic discharge can cause damage ranging
S93C66DF   S93C66DF S93C66DF PDF Download SOP-8 02+ The 56800 core is based on a Harvard-style archi
S93C66DV24   S93C66DV24 S93C66DV24 PDF Download SEIKO SOP 05+ The UCC28510 family also features leading-edge m
S93C66V   S93C66V S93C66V PDF Download WDO# The watchdog timer output is an active-low
S93C76   S93C76 S93C76 PDF Download SI SMD SMD The MSC forms part of a digital television syste
S93C76AD   S93C76AD S93C76AD PDF Download SEIKO 2006-2-3 • Multi-carrier, Multi-standard cellular i
S93CS6V9V   S93CS6V9V S93CS6V9V PDF Download 97
S93CS6V9Y   S93CS6V9Y S93CS6V9Y PDF Download 96 Notes: 4. CX1 must be placed within 0.7 cm of t
S93WD662P   S93WD662P S93WD662P PDF Download SUMMIT DIP/8 98+ The 4083C makes use of an Elantec fully complime
S93WD663P-2.7   S93WD663P-2.7 S93WD663P-2.7 PDF Download SUMMIT DIP/8 00+ Note 5: In applications where high power dissipat
S93X6X3   S93X6X3 S93X6X3 PDF Download devastating effect is that, in the smaller cryst
S93X6X5   S93X6X5 S93X6X5 PDF Download SOP-8 01+ The CPU clock offers the unique feature of smooth
S93X6XP   S93X6XP S93X6XP PDF Download SUMMIT DIP-8 Signal Processor (DSP): - SM/SMJ320VC33-150 &nb
S93X6XS   S93X6XS S93X6XS PDF Download SOP-3.9-8P 6+ DC input, controls CDMA amplifier gain and bias
S93X6XS02   S93X6XS02 S93X6XS02 PDF Download SUMMIT SOP-8 02+ Small Size Surface Mount DPAK Package Passivate
S93X6XS03   S93X6XS03 S93X6XS03 PDF Download 2008 An internal OP-Amp controls the Drain-Source-Volt
S93XP   S93XP S93XP PDF Download NOTES: 1. A17 is a NC for IDT70V3399. 2. VDD, O
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