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Note: 1. Load and line regulation are specified at constant junction temperature. Changes in Vo due to heating effects must be taken   into account separately. Pulse testing with low duty is used. 2. These parameters, although guaranteed, are not 100% tested in production.
Note 1: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum rating. The Recommended Operating Conditions table will define the conditions for actual device operation.
The TDSL2000 is a dual, 3 V, 14-bit, 20/40/65 MSPS analog-to- digital converter. It features dual high performance sample-and hold amplifiers and an integrated voltage reference. The TDSL2000 uses a multistage differential pipelined architecture with output error correction logic to provide 14-bit accuracy and guarantee no missing codes over the full operating temperature range at up to 65 MSPS data rates. The wide bandwidth, differential SHA allows for a variety of user selectable input ranges and offsets including single-ended applications. It is suitable for various applications including multiplexed systems that switch full-scale voltage levels in successive channels and for sampling inputs at frequencies well beyond the Nyquist rate.
Parr number/PDF Mfg Pack D/C Descrpion
TDS05150   TDS05150 TDS05150 PDF Download Active high RBYP input disables clock recovery.
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TDS-1202L   TDS-1202L TDS-1202L PDF Download 01+ To achieve proper device operation, an initial p
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TDS504/50MA   TDS504/50MA TDS504/50MA PDF Download No part of this publication may be reproduced, st
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TDS50480MA   TDS50480MA TDS50480MA PDF Download Floating bootstrap supply pin for the upper gate
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TDS504T200MA250VAC   TDS504T200MA250VAC TDS504T200MA250VAC PDF Download   NOTES:  1. Dimensions are in inches.
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TDS5811   TDS5811 TDS5811 PDF Download TRW CDIP24 Terminal nos. 3 and 8 are soft start terminals.
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