This link option selects the source of the CONVST input. When this link is in position "A" the CONVST input is provided by the EVAL-CONTROL BOARD. When this link is in position "B" the CONVST input is provided via the external socket, SK2.
Oscillator Synchronization and Mode Selection Input. SYNC = GND (Automatic PWM/PFM mode) The converter operates at 600 kHz fixed−frequency PWM mode primarily, and automatically switches to variable−frequency PFM mode at small output loads for power saving. SYNC = VIN (Constant−Frequency PWM mode) The converter operates at 600 kHz fixed−frequency PWM mode always. SYNC = External clock signal between 600 to 1200 kHz. The converter will be synchronized with the external clock signal. The SYNC pin is internally pulled to GND.
TEESVA0G107M8R-MCG TEESVA0G107M8R-QCG TEESVA0G107M8R-ECG TEESVA0G107M8R-MNG TEESVA0G107M8R-QNG TEESVA0G107M8R-ENG TEESVA0G107M8R-MCL TEESVA0G107M8R-QCL TEESVA0G107M8R-ECL TEESVA0G107M8R-MNL TEESVA0G107M8R-QNL TEESVA0G107M8R-ENL TEESVA0G107M8R TEESVA0G107M8R TEESVA0G107M8R TEESVA0G107M8R TEESVA0G107M8R TEESVA0G107M8R
Oscillator Synchronization and Mode Selection Input. SYNC = GND (Automatic PWM/PFM mode) The converter operates at 600 kHz fixed−frequency PWM mode primarily, and automatically switches to variable−frequency PFM mode at small output loads for power saving. SYNC = VIN (Constant−Frequency PWM mode) The converter operates at 600 kHz fixed−frequency PWM mode always. SYNC = External clock signal between 600 to 1200 kHz. The converter will be synchronized with the external clock signal. The SYNC pin is internally pulled to GND.
TEESVA0G107M8R-MCG TEESVA0G107M8R-QCG TEESVA0G107M8R-ECG TEESVA0G107M8R-MNG TEESVA0G107M8R-QNG TEESVA0G107M8R-ENG TEESVA0G107M8R-MCL TEESVA0G107M8R-QCL TEESVA0G107M8R-ECL TEESVA0G107M8R-MNL TEESVA0G107M8R-QNL TEESVA0G107M8R-ENL TEESVA0G107M8R TEESVA0G107M8R TEESVA0G107M8R TEESVA0G107M8R TEESVA0G107M8R TEESVA0G107M8R
| Parr number/PDF | Mfg | Pack | D/C | Descrpion |
TEE4729G TEE4729G  |
INFINEON | SOP24 | 03+ | • 1.15(29.21mm) PCB Height • 168-Pin |
| TEE5VA1A106MR TEE5VA1A106MR |
In order to support multiple tags within the fie | |||
| TEEF1-008A TEEF1-008A |
This latched Schmitt input signal is inverted an | |||
| TEESV1A106MLV8R TEESV1A106MLV8R |
1.1 Display mode setting commands These commands | |||
| TEESV1A225M8R TEESV1A225M8R |
N/A | 0603TAN | <0.8 V at VCC = 3.3 V, TA = 25C Typical VOHV | |
| TEESVA0E157M8R TEESVA0E157M8R |
NEC | 06+ | The HSDL-3603 can be shut down completely to a | |
| TEESVA0E476M8R TEESVA0E476M8R |
NEC | 06+ | up to 20-mA Output Current From a 0.9-V to 1.8-V | |
| TEESVA0E686M8R TEESVA0E686M8R |
NEC | 06+ | DESCRIPTION The M27C256B is a 256 Kbit EPROM of | |
| TEESVA0G107M8R TEESVA0G107M8R |
NEC | SMD | 07+ | − Provide software confirmation of complet |
| TEESVA0G226M8R TEESVA0G226M8R |
NEC | 06+ | Widebus Family Output Voltage Translatio | |
| TEESVA0G336M8R TEESVA0G336M8R |
NEC | 06+ | When the PAR/SER pin is low the chip is in serial | |
| TEESVA0G476M8R TEESVA0G476M8R |
NEC | 4V47UF-A PB-FREE | 04+ | The Bright Red source color devices are made with |
| TEESVA0G686M8R TEESVA0G686M8R |
AVX | SMD | 08+ | device ranging from 4 to 12 wide, with an averag |
| TEESVA0J106M8R TEESVA0J106M8R |
NEC | 2K/REEL | 07+PB | The 78P7200 incorporates a selectable Line Build |
| TEESVA0J156M8R TEESVA0J156M8R |
NEC | 06+ | 5. Examples of use described herein are merely to | |
| TEESVA0J226M8R TEESVA0J226M8R |
NEC-TOKIN | 20070112 | • Low power CMOS technology - Maxi | |
| TEESVA0J335M8R TEESVA0J335M8R |
AVX | SMD | 08+ | Information furnished by Analog Devices is belie |
| TEESVA0J336M8R TEESVA0J336M8R |
AVX | SMD | 08+ | The functionality of each circuit block is custo |
| TEESVA0J475M8R TEESVA0J475M8R |
NEC | 06+ | The Octal UART provides a power down mode in whi | |
| TEESVA0J476M8R TEESVA0J476M8R |
NEC | 2K/REEL | 07+PB | Therefore it should be no problem to achieve the |
| TEESVA1A106KSG8R TEESVA1A106KSG8R |
NEC | FEATURES 64 Positions OTP (One-Time-Programmabl | ||
| TEESVA1A106M8R TEESVA1A106M8R |
NEC | 2K/REEL | 07+PB | |
| TEESVA1A225M8R TEESVA1A225M8R |
NEC | 10V2.2UF-A PB-FREE | 04+ | Timer counter 7 : 16-bit 1 (square-wave/1 |
| TEESVA1A226M8R TEESVA1A226M8R |
NEC | 06+ | Reduced parts count and high efficiency add to t | |
| TEESVA1A475M8R TEESVA1A475M8R |
NEC-TOKIN | 20070112 | ∗2 VL setting is the VVL voltage of the ve | |
| TEESVA1A685M8R TEESVA1A685M8R |
NEC-TOKIN | 20070112 | Guaranteed by design and characterization. Image | |
| TEESVA1C105M8R TEESVA1C105M8R |
NEC | Current sensing is accomplished by reading the v | ||
| TEESVA1C106M8R TEESVA1C106M8R |
NEC | 2K/REEL | 07+PB | Atmel's 28C010 has additional features to ensure |
| TEESVA1C155M8R TEESVA1C155M8R |
NEC | 06+ | 3. Flexible Power/Serial Clock Speed Management | |
| TEESVA1C225K8R TEESVA1C225K8R |
NEC | AMDs Flash technology combines years of Flash m | ||
| TEESVA1C225M8R TEESVA1C225M8R |
NEC | 06+ | HY57V28820A is offering fully synchronous operati | |
| TEESVA1C335M8R TEESVA1C335M8R |
NEC | 06+ | The Hyundai HYM76V16C755HGT4 Series are Du | |
| TEESVA1C475M8R TEESVA1C475M8R |
AVX | SMD | 08+ | HIGH SPEED: tPD = 3.8ns (TYP.) at VCC = 5V LOW |
| TEESVA1C685M8R TEESVA1C685M8R |
AVX | SMD | 08+ | Read the contents of the Data Register po |
| TEESVA1D225M8R TEESVA1D225M8R |
NEC | 06+ | The THELMA process is utilized to create a surfa | |
| TEESVA1D335M8R TEESVA1D335M8R |
AVX | SMD | 08+ | Forward-Current Transfer Ratio IC = 5.0 A |
| TEESVA1D475M8R TEESVA1D475M8R |
NEC | 2K/REEL | 07+PB | The SiP41109 and SiP41110 are high-speed half-br |
| TEESVA1E105M8R TEESVA1E105M8R |
NEC | 06+ | The Edge646 supports an on-board window comparato | |
| TEESVA1E225M8R TEESVA1E225M8R |
NEC | 06+ | Spansion LLC issues data sheets with Advance Inf | |
| TEESVA1E335M8R TEESVA1E335M8R |
NEC | 06+ | Differential and Single-Ended Analog Input/Outpu | |
| TEESVA1E474M8R TEESVA1E474M8R |
NEC | 06+ | Program memory : 1,024 bytes Data memory : 32 | |
| TEESVA1E684M8R TEESVA1E684M8R |
NEC | 06+ | The 17531A is a monolithic dual H-Bridge | |
| TEESVA1V104M8R TEESVA1V104M8R |
NEC | 2. Using a CAS-before-RAS refresh cycle. CAS-be | ||
| TEESVA1V105M8R TEESVA1V105M8R |
NEC | Controls Four Independent C 48V Powered Ethernet | ||
| TEESVA1V155M8R TEESVA1V155M8R |
NEC | 06+ | The host system can detect whether a program or | |
| TEESVA1V224M8R TEESVA1V224M8R |
NEC | |||
| TEESVA1V225M8R TEESVA1V225M8R |
NEC | 06+ | Notes: 1. For Max. or Min. conditions, use appr | |
| TEESVA1V474M8R TEESVA1V474M8R |
AVX | SMD | 08+ | - PMOS open drain output for control of t |
| TEESVA1V684M8R TEESVA1V684M8R |
NEC | 06+ | The SC16C654B/654DB is a Quad Universal Asynchro | |
| TEESVA20E226M8R TEESVA20E226M8R |
NEC | 06+ | The output voltage of an adjustable voltage refer | |
| TEESVA20E336M8R TEESVA20E336M8R |
NEC | 06+ | The Am186ED/EDLV microcontrollers integrate a co | |
| TEESVA20E476M8R TEESVA20E476M8R |
NEC | 2.5V47UF-A PB-FREE | 04+ | Standard transmitter A transmitter whose outpu |
| TEESVA20G226M8R TEESVA20G226M8R |
NEC | 06+ | 10 years minimum data retention in the absence o | |
| TEESVA20G336M8R TEESVA20G336M8R |
NEC | 06+ | rial Data (SDA) to VCC. (Figure 4. indicates ho | |
| TEESVA20G475M8RSY TEESVA20G475M8RSY |
NEC | SMD | 2004 | The L Family is a Low Power version of the CH1817 |
| TEESVA20G476M8R TEESVA20G476M8R |
NEC | 06+ | The device operation is controlled by instructio | |
| TEESVA20J106M8R TEESVA20J106M8R |
NEC | 6.3V10UF-A B | 1) CPD is defined as the value of the ICs intern | |
| TEESVA20J156M8R TEESVA20J156M8R |
NEC | SMD | 06+ | Stresses beyond those listed under Absolute |
| TEESVA20J226M8R TEESVA20J226M8R |
NEC | 06+ | Unlike masked or programmable gate arrays, which | |
| TEESVA20J685M8R TEESVA20J685M8R |
NEC | 06+ | SS/TRACK (Pin 9) - Soft-start and tracking pin. T | |
| TEESVA21A106M8R TEESVA21A106M8R |
NEC | 06+ | Notes: 1. PD indicates an internal pull-d | |
| TEESVA21A335M8R TEESVA21A335M8R |
NEC | 06+ | The UCC3952 monolithic BiCMOS lithiumCion batte | |
| TEESVA21A475M8R TEESVA21A475M8R |
NEC | 06+ | Soft-Start Control Pin. Connect a soft-start capa | |
| TEESVA21A475M8RROHS TEESVA21A475M8RROHS |
Every byte put on the SDATA line must be 8-bits l | |||
| TEESVA21C225M8R TEESVA21C225M8R |
NEC | 06+ | Each of the 8-bit planes has separate serial writ | |
| TEESVA21C335M8R TEESVA21C335M8R |
NEC | 06+ | ||
| TEESVA21C475M8R TEESVA21C475M8R |
NEC | 06+ | High Speed Communication Line Protection USB 1. | |
| TEESVA21D105M8R TEESVA21D105M8R |
NEC | 06+ | Wide Power Supply Voltage Range Short-circuit Pr | |
| TEESVA21D155M8R TEESVA21D155M8R |
NEC | 06+ | configuration, the top surface of the slug or th | |
| TEESVA21D225M8R TEESVA21D225M8R |
NEC | 06+ | 32-position digital potentiometer 10 kΩ, 5 | |
| TEESVA21D474M8R TEESVA21D474M8R |
NEC | 06+ | • 100,000 erase/write cycle Enhanced FLASH | |
| TEESVA21D684M8R TEESVA21D684M8R |
NEC | 06+ | The ADSP-21365/6 SHARC processors are members of | |
| TEESVA21E105M8R TEESVA21E105M8R |
NEC | 06+ | ||
| TEESVA21V105M8R TEESVA21V105M8R |
NEC | 06+ | TI is not confident of the operation of the DLL | |
| TEESVB20E107M8R TEESVB20E107M8R |
ＮＥＣ | 06+ | con competitors, but deliver superior performanc | |
| TEESVB20E227M8R TEESVB20E227M8R |
ＮＥＣ | 06+ | It includes a control logic with VCO which gener | |
| TEESVB20E337M8R TEESVB20E337M8R |
NEC | 06+ | RF Output and Power supply for final stage. This | |
| TEESVB20G107M8R TEESVB20G107M8R |
ＮＥＣ | 06+ | Load strobe input for a 12-bit address/data: A h | |
| TEESVB20G157M8R TEESVB20G157M8R |
NEC | N/A | • N channel FET switches with no parasitic | |
| TEESVB20G226M8R TEESVB20G226M8R |
• Bidirectional data strobe(DQS) • D | |||
| TEESVB20G227M8R TEESVB20G227M8R |
NEC | 06+ | MultiMediaCard (MMC) Form Factor S | |
| TEESVB20J107M8R TEESVB20J107M8R |
NEC | 6.3V100 B型 | Hynix HYMP512S64MP8 series is designed for high s | |
| TEESVB20J226M8R TEESVB20J226M8R |
NEC | 06+ | NOTES: 1. Measured from the differential input | |
| TEESVB20J336M8R TEESVB20J336M8R |
ＮＥＣ | 06+ | The second amplifier, RFA2, provides 51 dB of gai | |
| TEESVB20J476M8R TEESVB20J476M8R |
NEC | 2K/REEL | 07+PB | The DS1554 has a lithium power source that is de |
| TEESVB20J686M8R TEESVB20J686M8R |
NEC | TANCHIPC68U20%6.3VCASEB2 | Notes: 1: VC1 2.4 ,VC2 2.4, VM 2.4, VC1 5.0, VC2 | |
| TEESVB21A106M8R TEESVB21A106M8R |
NEC | 06+ | ||
| TEESVB21A226M8R TEESVB21A226M8R |
NEC | 06+ | Integrated Downconverter Integrated Dual Synthes | |
| TEESVB21A336M8R TEESVB21A336M8R |
NEC | 06+ | The 82596 C-Step incorporates several new fea- | |
| TEESVB21A475M8R TEESVB21A475M8R |
Pin Function PWM block control power su | |||
| TEESVB21A476M8R TEESVB21A476M8R |
AVX | SMD | 08+ | The HC688 and HCT688 are 8-bit magnitude compara |
| TEESVB21A686M8R TEESVB21A686M8R |
NEC | 06+ | The CY7C9689 HOTLink Transceiver is a point-to-p | |
| TEESVB21C106M8R TEESVB21C106M8R |
N/A | N/A | N/A | ♦ Four ADC Channels with Serial LVDS/SLVS |
| TEESVB21C156M8R TEESVB21C156M8R |
AVX | SMD | 08+ | The dc levels of the differential outputs can be |
| TEESVB21C226K8R TEESVB21C226K8R |
ＮＥＣ | 06+ | Case: SOD-123, Plastic Plastic Material: UL Fl | |
| TEESVB21C226M8R TEESVB21C226M8R |
NEC | 2K/REEL | 07+PB | The MAX 7000 family of high-density, high-perfor |
| TEESVB21D106M8R TEESVB21D106M8R |
NEC | 06+ | • Lower operating voltage : VCC = 5V • | |
| TEESVB21D475M8R TEESVB21D475M8R |
NEC | 06+ | The TEESVB21D475M8R can run in either 12-hour or | |
| TEESVB21D685M8R TEESVB21D685M8R |
NEC | 06+ | Because the overcurrent protection voltage is pr | |
| TEESVB21E225M8R TEESVB21E225M8R |
The CM3002 family of regulators is fully protect | |||
| TEESVB21E475M8R TEESVB21E475M8R |
AVX | SMD | 08+ | The 64-bit wide memory array provides the syste |
| TEESVB21V225M8R TEESVB21V225M8R |
NEC | 06+ | 1 A critical component is a component used in a l | |
| TEESVB21V335M8R TEESVB21V335M8R |
NEC | 06+ | Data length select bit 0 (DLS0) Data length sele | |
| TEESVB30E107M8R TEESVB30E107M8R |
NEC | 06+ | The ICS557-03 is a spread spectrum clock generat | |
| TEESVB30G107M8R TEESVB30G107M8R |
LINGSHAN | N/A | Available in standoff voltage range of 6. | |
| TEESVB30G227M8R TEESVB30G227M8R |
PARTSNIC | 06+ | The GLT41116 is a 65,536 x 16 bit high-performanc | |
| TEESVB30G476M8R TEESVB30G476M8R |
NEC | 4V47UF-B B | ||
| TEESVB30G686M8R TEESVB30G686M8R |
NEC | 06+ | Eight GLBs, 16 I/O cells, two dedicated inputs a | |
| TEESVB30J107M8R TEESVB30J107M8R |
NEC-TOKIN | The LPC47M14x implements the LPC interface, a pin | ||
| TEESVB30J226M8R TEESVB30J226M8R |
NEC | 06+ | 5V CMOS and TTL Compatible Fast Sw | |
| TEESVB30J336M8R TEESVB30J336M8R |
NEC | 06+ | We constantly strive to improve the quality of a | |
| TEESVB30J476M8R TEESVB30J476M8R |
NEC | 06+ | ultra low quiescent current make them suitable f | |
| TEESVB31A156M8R TEESVB31A156M8R |
NEC | 06+ | 1. Device mounted on FR-4 PCB, 1 inch x 0.85 inch | |
| TEESVB31A226M8R TEESVB31A226M8R |
NEC | 06+ | © Cypress Semiconductor Corporation, 2001. | |
| TEESVB31A336M8R TEESVB31A336M8R |
NEC | 06+ | Eight GLBs, 16 I/O cells, dedicated inputs (if a | |
| TEESVB31C106M8R TEESVB31C106M8R |
NEC | 06+ | Note 1: The data-input transition time is control | |
| TEESVB31C685M8R TEESVB31C685M8R |
NEC | 06+ | The MAX6950 and MAX6951 are five-digit and eight- | |
| TEESVB31D335M8R TEESVB31D335M8R |
NEC | 06+ | STM1403 SUPPORTS FIPS-140 SECURITY LEVEL 3+ C | |
| TEESVB31D475M8R TEESVB31D475M8R |
NEC | 06+ | ||
| TEESVB3OG107M8R TEESVB3OG107M8R |
The ZL5011x incorporates a range of powerful cloc | |||
| TEESVC0E337M12R TEESVC0E337M12R |
NEC | 06+ | The LM34910 Step Down Switching Regulator featur | |
| TEESVC0E477M12R TEESVC0E477M12R |
NEC | 06+ | Input of current sense comparator, it is enabled | |
| TEESVC0G227M12R TEESVC0G227M12R |
NEC | 06+ | Maximum gain setpoint for all phase setpoints V | |
| TEESVC0G337M12R TEESVC0G337M12R |
AVX | SMD | 08+ | Chip Enable (E). The Chip Enable, E, activates t |
| TEESVC0J107M12R TEESVC0J107M12R |
NEC | 06+ | being turned on when the local power supply volt | |
| TEESVC0J157M12R TEESVC0J157M12R |
NEC | 06+ | Description The 3.3 V HCMS-39xx family is simi | |
| TEESVC0J227M12R TEESVC0J227M12R |
NEC | 06+ | (ang) -176.77 -176.95 -176.88 -176.62 | |
| TEESVC0J476M12R TEESVC0J476M12R |
ＮＥＣ | 06+ | After obtaining the configuration settings, it c | |
| TEESVC1A107M12R TEESVC1A107M12R |
NEC | 06+ | The latest data sheet corrects the photograph Fi | |
| TEESVC1A476M12R TEESVC1A476M12R |
NEC | 500/REEL | 07+PB | Gain Shaper. The output of the integrator is fed |
| TEESVC1A686M12R TEESVC1A686M12R |
NEC | 06+ | All Agilent data sheets report the creepage and | |
| TEESVC1C226M12R TEESVC1C226M12R |
N/A | N/A | N/A | accompanying wiring and circuits must be kept in |
| TEESVC1C336M12R TEESVC1C336M12R |
AVX | SMD | 08+ | 505µA supply current 75MHz bandwidth Powe |
| TEESVC1C476M12R TEESVC1C476M12R |
NEC | 500/REEL | 07+PB | The power switch is an N-channel MOSFET with a m |
| TEESVC1C686M12R TEESVC1C686M12R |
AVX | SMD | 08+ | The sector erase architecture allows memory sect |
| TEESVC1D156M12R TEESVC1D156M12R |
NEC | 06+ | The 74HC245; 74HCT245 is an octal transceiver fe | |
| TEESVC1D226M12R TEESVC1D226M12R |
NEC | 06+ | NOTES: 1. See Test Conditions under TEST CIRCUI | |
| TEESVC1E106M12R TEESVC1E106M12R |
NEC | 06+ | In single pushbutton mode or when using the digi | |
| TEESVC1E156M12R TEESVC1E156M12R |
NEC | 06+ | Extended frequencies are only available via SMBU | |
| TEESVC1V106M12R TEESVC1V106M12R |
NEC | 06+ | Chip select. A low on this pin during the falling | |
| TEESVC1V475M12R TEESVC1V475M12R |
NEC | 06+ | Maximum ratings are those values beyond which de | |
| TEESVC1V685M12R TEESVC1V685M12R |
NEC | 06+ | Stresses beyond those listed under "Absolut | |
| TEESVC20E157M12R TEESVC20E157M12R |
NEC | 06+ | 3.3-V Supply Operation 10-Bit-Resolution A/D Con | |
| TEESVC20E227M12R TEESVC20E227M12R |
NEC | 06+ | Lead temperature 1,6 mm (1/16 inch) from case fo | |
| TEESVC20J107M12R TEESVC20J107M12R |
NEC | 06+ | RECEIVE CLOCK RECOVERY In 100BASE-TX mode, the 1 | |
| TEESVC20J686M12R TEESVC20J686M12R |
NEC | 06+ | Complete USB Hub Power Solution Meets USB Specif | |
| TEESVC21A476M12R TEESVC21A476M12R |
NEC | 06+ | Switch Short-Circuit and Thermal Protection Ove | |
| TEESVC21C336M12R TEESVC21C336M12R |
NEC | 06+ | 12 port pins with interrupt capability The MPC | |
| TEESVC21D226M12R TEESVC21D226M12R |
NEC | 06+ | Series W. Series W are rugged, ceramic, cylindr | |
| TEESVD0E477M12R TEESVD0E477M12R |
NEC | 06+ | Gate-to-Source Forward Leakage Gate-to-Source | |
| TEESVD0G477M12R TEESVD0G477M12R |
NEC | SMD | 06+ | The TEESVD0G477M12R high current Schottky rectif |
| TEESVD0G687M12R TEESVD0G687M12R |
NEC | 06+ | The high-side driver is designed to drive low rD | |
| TEESVD0J227M12R TEESVD0J227M12R |
Operates from a single +5V supply Maintains ne | |||
| TEESVD0J337K12R TEESVD0J337K12R |
N/A | Four- ('390), Eight- ('388A), or Sixteen- ('386) | ||
| TEESVD0J337M12R TEESVD0J337M12R |
NEC | 06+ | between the two supply inputs is + 8.0 volts whi | |
| TEESVD0J477M12R TEESVD0J477M12R |
AVX | SMD | 08+ | The HYM72V16M656B(L)T6 -Series are gold plated so |
| TEESVD1A107M12R TEESVD1A107M12R |
NEC | 06+ | The MSK 610 employs a circuit topology kn | |
| TEESVD1A157K12R TEESVD1A157K12R |
ＮＥＣ | 06+ | I ARM720T Processor ARM7TDMI CPU | |
| TEESVD1A157M12R TEESVD1A157M12R |
NEC | 06+ | 1200 V or greater low-to-high side isolation. | |
| TEESVD1A227K12R TEESVD1A227K12R |
A failure at the watchdog sets the internal fwd | |||
| TEESVD1A227M12R TEESVD1A227M12R |
NEC | 06+ | • Direct bus connection when switches are | |
| TEESVD1C107M12R TEESVD1C107M12R |
NEC | 500/REEL | 07+PB | HIGH SPEED: tPD = 11ns (TYP.) at VCC = 6V LOW |
| TEESVD1C476M12R TEESVD1C476M12R |
NEC | 06+ | The IIN pin replicates the voltage present on the | |
| TEESVD1C686M12R TEESVD1C686M12R |
AVX | SMD | 08+ | Note: Stresses greater than those listed under & |
| TEESVD1D226M12R TEESVD1D226M12R |
NEC | 06+ | The device is organized as a 12-bit or 24-bit bu | |
| TEESVD1D336M12R TEESVD1D336M12R |
AVX | SMD | 08+ | Input bus select / I2C clock input. The operatio |
| TEESVD1D476M12R TEESVD1D476M12R |
NEC | 06+ | A linear voltage regulator can be broken down in | |
| TEESVD1E226M12R TEESVD1E226M12R |
NEC | 06+ | Features International standard packages | |
| TEESVD1E336M12R TEESVD1E336M12R |
NEC | 06+ | Reduced Power Consumption C 1.8 V Core Operation | |
| TEESVD1E476MLV12RSY TEESVD1E476MLV12RSY |
N/A | As an alternative to a full chip erase or a plan | ||
| TEESVD1V106M12R TEESVD1V106M12R |
NEC | 06+ | • High current transition frequency | |
| TEESVD1V156M12R TEESVD1V156M12R |
NEC | 06+ | This document is a general product description an | |
| TEESVJ0E106M8R TEESVJ0E106M8R |
NEC | 06+ | The Intel 87C54 is a single-chip control-oriented | |
| TEESVJ0G106M8R TEESVJ0G106M8R |
ＮＥＣ | 06+ | 768 Bytes of internal SRAM for general purpose & | |
| TEESVJ0G685M8R TEESVJ0G685M8R |
NEC | 06+ | Supply voltagePin 1 Input voltagePin 2, 3, 4, 7, | |
| TEESVJ0J106M8R TEESVJ0J106M8R |
N/A | 0603TAN | VSENSE (Output Voltage Sensing Input): This pin i | |
| TEESVJ0J106MLE8R TEESVJ0J106MLE8R |
NEC | Serial I O (MICROWIRE compatible) 1 2 4 or 8-cha | ||
| TEESVJ0J225M8R TEESVJ0J225M8R |
NEC | SMD | 03+无铅 | 144 macrocells with 3,200 usable gates Up to 13 |
| TEESVJ0J225MLE8R TEESVJ0J225MLE8R |
NEC | 6.3V2.2UF-0603 PB-FREE | 04+ | EPIC™ (Enhanced-Performance Implanted CMOS |
| TEESVJ0J335M8R TEESVJ0J335M8R |
N/A | 0603TAN | High-drive GTLP backplane interface devices feat | |
| TEESVJ0J475M8R TEESVJ0J475M8R |
NEC | 04+ | SMD | Near-Zero propagation delay 5-ohm |
| TEESVJ0J475MLE8R TEESVJ0J475MLE8R |
0603TAN | Notes: (i) Io1(min) current of 0.1A can be divi | ||
| TEESVJ0J685M8R TEESVJ0J685M8R |
NEC | 06+ | Select Word 0 (D18 = 0) BitFunction D0Bridge 1 | |
| TEESVJ1A155M8R TEESVJ1A155M8R |
NEC | 06+ | Automatic burst mode for very low consumption i | |
| TEESVJ1A225M8R TEESVJ1A225M8R |
NEC | SMD | 03+无铅 | The AUP family is TI's premier solution to the i |
| TEESVJ1A475M8R TEESVJ1A475M8R |
NEC | 04+ | SMD | Provides Direct Input/Output (DIO) Interface for |
| TEESVJ1A475MLV8R TEESVJ1A475MLV8R |
NEC | 05+ | SMD | |
| TEESVJ1C105M8R TEESVJ1C105M8R |
NEC | 03+ | SMD | 4. Values for two Turn-On loss conditions are sh |
| TEESVJ1C225MLV8R TEESVJ1C225MLV8R |
No Glitch on Power Up Supports Hot Insertion Lo | |||
| TEESVJOJ475M8R TEESVJOJ475M8R |
NEC | 02+ | The EN29LV400A is a 4-Megabit, electrically erasa | |
| TEESVP0E226M8R TEESVP0E226M8R |
NEC | 06+ | Operating voltage: 2.2V~3.6V Ten bidirectional I | |
| TEESVP0E336M8R TEESVP0E336M8R |
NEC | 06+ | If this interrupt is enabled, and the Endpoint 0 | |
| TEESVP0E476M8R TEESVP0E476M8R |
NEC | 03+ | SMD | An internal PMOS pass transistor allows the low 1 |
| TEESVP0G106M8R TEESVP0G106M8R |
NEC | N/A | Copyright © 2002 Integrated Silicon Solutio | |
| TEESVP0G156M8R TEESVP0G156M8R |
NEC | 06+ | Display RAM, Character Generator, OLED Driver as | |
| TEESVP0G226M8R TEESVP0G226M8R |
NEC | 06+ | The battery's initial capacity is equal to the Pr | |
| TEESVP0G335M8R TEESVP0G335M8R |
NEC | 06+ | The TEESVP0G335M8R is a member of the Atmel AT91 | |
| TEESVP0G336M8R TEESVP0G336M8R |
NEC | 06+ | A powerful program sequencer controls the flow o | |
| TEESVP0G476M8R TEESVP0G476M8R |
NEC | 06+ | In the 10-bit mode the 8b/10b Codec is disabled, | |
| TEESVP0J106M8R TEESVP0J106M8R |
N/A | The MAX2205 has high-input impedance for use with | ||
| TEESVP0J106M8RTJF TEESVP0J106M8RTJF |
The ADS7866/67/68 are low power, miniature, 12/ | |||
| TEESVP0J106MLE8R TEESVP0J106MLE8R |
NEC | 2006 | NOTES 1Stresses above those listed under Absolut | |
| TEESVP0J155M8R TEESVP0J155M8R |
NEC | 06+ | ADC CHANNEL No Missing Codes1 Res | |
| TEESVP0J156M8R TEESVP0J156M8R |
NEC | 06+ | Output frequency range: 1050 MHz to 1250 MHz Di | |
| TEESVP0J226M8R TEESVP0J226M8R |
AVX | SMD | 08+ | The attached data sheets are prepared and |
| TEESVP0J475M8R TEESVP0J475M8R |
NEC | 06+ | Voltage on PIO Pin, Relative to VSS Voltage on A | |
| TEESVP0J685M8R TEESVP0J685M8R |
AVX | SMD | 08+ | This SPI EEPROM family is designed to work with |
| TEESVP1A105M8R TEESVP1A105M8R |
NEC | 06+ | These N-Channel power MOSFETs ar | |
| TEESVP1A106M8R TEESVP1A106M8R |
NEC | 05+ | SMD | • 10-bit, up to 8 channel Analog-to-Digita |
| TEESVP1A155M8R TEESVP1A155M8R |
NEC | 06+ | Figure 3. Input/Output Block. Each IOB includes | |
| TEESVP1A225M8R TEESVP1A225M8R |
N/A | See Command Codes for Boot Block Lockout Enable f | ||
| TEESVP1A335M8R TEESVP1A335M8R |
NEC | 06+ | NOTES: 1. The ICC current listed includes both | |
| TEESVP1A475M8R TEESVP1A475M8R |
N/A | Circuit diagrams and other information relating t | ||
| TEESVP1C105M8R TEESVP1C105M8R |
N/A | The 556C/W for the SOTC23 package assumes | ||
| TEESVP1C105M8RTJF TEESVP1C105M8RTJF |
NEC | Similar to its analog input structure, the MAX10 | ||
| TEESVP1C225M8R TEESVP1C225M8R |
NEC | 06+ | NOTE: All input pulses are supplied by a generat | |
| TEESVP1C474M8R TEESVP1C474M8R |
NEC | 06+ | Applications for the parts include portable and | |
| TEESVP1C684M8R TEESVP1C684M8R |
NEC | 06+ | ||
| TEESVP1D225M8R TEESVP1D225M8R |
NEC | 06+ | To program a Leading Edge Blanking period, conne | |
| TEESVP1E105M8R TEESVP1E105M8R |
NEC | 06+ | The LTC1698 provides accurate secondary-side curr | |
| TEESVPOG476M8R TEESVPOG476M8R |
NECTOKIN | 2004(PF) | On-Chip Data RAM 1 Kbyte Critical Variable Stora | |
| TEESVPOJ106M8R TEESVPOJ106M8R |
NEC | 3 | Schottky barrier rectifier thermal run-awa | |
| TEESVPOJ226M8R TEESVPOJ226M8R |
NEC | The device has up to 64K bytes of reprogrammable | ||
| TEESVV0G337M12R TEESVV0G337M12R |
NEC | 06+ | The above calculation is conservative: with VCC = | |
| TEESVV0J227M12R TEESVV0J227M12R |
NEC | 06+ | The HWD2119 is a mono bridged power amplifier tha | |
| TEESVV1A107M12R TEESVV1A107M12R |
NEC | 06+ | Logic Ground Isolation-TTL/TTL, TTL/CMOS, CMOS/ | |
| TEESVV1A157M12R TEESVV1A157M12R |
NEC | 06+ | The Hynix HYM71V16635AT8 Series are 16Mx64bits Sy | |
| TEETD5320AGPC TEETD5320AGPC |
TI | PBGA | The oscillator frequency is inversely proportion |
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