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Guaranteed Low Skew < 25ps (max) Very low duty cycle distortion < 125ps (max) High speed propagation delay < 1.75ns (max) Up to 1GHz operation Selectable inputs Hot insertable and over-voltage tolerant inputs 3.3V / 2.5V LVTTL, HSTL, eHSTL, LVEPECL (2.5V), LVPECL (3.3V), CML, or LVDS input interface Selectable differential inputs to ten LVDS outputs Power-down mode 2.5V VDD Available in VFQFPN package
Parr number/PDF Mfg Pack D/C Descrpion
UCN033B331K-X2   UCN033B331K-X2 UCN033B331K-X2 PDF Download The change in output voltage due to a specified
UCN033CH100D-2   UCN033CH100D-2 UCN033CH100D-2 PDF Download Digital filters : For the purpose of A/D out-o
UCN033CH100D-X2   UCN033CH100D-X2 UCN033CH100D-X2 PDF Download The STK12C68-20 requires VCC = 5.0V 5% supply t
UCN033CH3R5CPX2   UCN033CH3R5CPX2 UCN033CH3R5CPX2 PDF Download  TAOperating free-air temperature−4012
UCN033CJ030C-X2   UCN033CJ030C-X2 UCN033CJ030C-X2 PDF Download 8.5 ns (100-MHz version) Provide high-performanc
UCN033CJ2R5L--2   UCN033CJ2R5L--2 UCN033CJ2R5L--2 PDF Download TAIYO 0603(圆柱) 05+ The 221 and LS221 devices are dual multivibrato
UCN033CK010B-T   UCN033CK010B-T UCN033CK010B-T PDF Download MURATA 0603-01 05+ ZS and ZL reflect the impedances that should be p
UCN033CK010B-X2   UCN033CK010B-X2 UCN033CK010B-X2 PDF Download Composite Video Output A 75 Ω termination
UCN033CK020CNX2   UCN033CK020CNX2 UCN033CK020CNX2 PDF Download If high inductance values and low capacitor valu
UCN033CK0R5B-2   UCN033CK0R5B-2 UCN033CK0R5B-2 PDF Download For proper operation of the MD1811, low inductanc
UCN033CK0R6B-2   UCN033CK0R6B-2 UCN033CK0R6B-2 PDF Download NOTES: • Use a 0.1 µF capacitor on VD
UCN033CK1R5C-X2   UCN033CK1R5C-X2 UCN033CK1R5C-X2 PDF Download The UCC381 provides unique short circuit protect
UCN033CKR75B-2   UCN033CKR75B-2 UCN033CKR75B-2 PDF Download A reactive load is a very demanding case, requir
UCN033RH100D-X2   UCN033RH100D-X2 UCN033RH100D-X2 PDF Download Several pins on this device serve as dual functio
UCN033RH110H-X2   UCN033RH110H-X2 UCN033RH110H-X2 PDF Download 16-bit edge-triggered flip-flop 3-s
UCN033RH120J-X2   UCN033RH120J-X2 UCN033RH120J-X2 PDF Download TI warrants performance of its semiconductor pro
UCN033RH140H-X2   UCN033RH140H-X2 UCN033RH140H-X2 PDF Download The signal conditioner demodulates the amplifier
UCN033RH5R6L--2   UCN033RH5R6L--2 UCN033RH5R6L--2 PDF Download TAIYO 0603(圆柱) 05+ The device offers access times of 90, 100, and 1
UCN033RJ030CNX2   UCN033RJ030CNX2 UCN033RJ030CNX2 PDF Download The received digital signal input. Internal 1 M
UCN033SH130H-X2   UCN033SH130H-X2 UCN033SH130H-X2 PDF Download Design and specifications are subject to c
UCN033SK0R5B-2   UCN033SK0R5B-2 UCN033SK0R5B-2 PDF Download BOOT: This pin provides the high side rail for th
UCN033SK1R5CPX2   UCN033SK1R5CPX2 UCN033SK1R5CPX2 PDF Download time exhibits drift characteristics of the best
UCN033SL010B-2   UCN033SL010B-2 UCN033SL010B-2 PDF Download The SN74CB3T3245 is a high-speed TTL-compatible
UCN033SL010CN-2   UCN033SL010CN-2 UCN033SL010CN-2 PDF Download To determine if an errata sheet exists for a par
UCN033SL020CNX2   UCN033SL020CNX2 UCN033SL020CNX2 PDF Download Specifications are production tested at TA = +25C
UCN033SL030C-X2   UCN033SL030C-X2 UCN033SL030C-X2 PDF Download The bq2014 recognizes a valid battery whenever VS
UCN033SL080CNX2   UCN033SL080CNX2 UCN033SL080CNX2 PDF Download Power-on Bi-directional Input/output. At power u
UCN033SL080D-X2   UCN033SL080D-X2 UCN033SL080D-X2 PDF Download † Measured on typical two-sided PWB with p
UCN033SL090CPX2   UCN033SL090CPX2 UCN033SL090CPX2 PDF Download Single supply: 1.8 V to 5.5 V Two-wire serial
UCN033SL090C-X2   UCN033SL090C-X2 UCN033SL090C-X2 PDF Download Case: JEDEC DO-219AB (SMF®) Plastic case Te
UCN033SL090D-X2   UCN033SL090D-X2 UCN033SL090D-X2 PDF Download Note 1. * : These pins are not used in this modul
UCN033SL0R6B-2   UCN033SL0R6B-2 UCN033SL0R6B-2 PDF Download Output Drive Capability: 10 LSTTL Loads Outputs
UCN033SL0R9B-2   UCN033SL0R9B-2 UCN033SL0R9B-2 PDF Download The CY7C374i is an In-System Reprogrammable Comp
UCN033SL110H-X2   UCN033SL110H-X2 UCN033SL110H-X2 PDF Download 4. Slide the HEDS-8905 or HEDS-   8906 cen
UCN033SL130J-X2   UCN033SL130J-X2 UCN033SL130J-X2 PDF Download Revision PrI: Edits for readability and clarity,
UCN033SL140H-X2   UCN033SL140H-X2 UCN033SL140H-X2 PDF Download Note 4: C PD is defined as the value of the inte
UCN033SL1R5CN-2   UCN033SL1R5CN-2 UCN033SL1R5CN-2 PDF Download Fujitsus Flash technology combines years of EPRO
UCN033SL1R5CP-2   UCN033SL1R5CP-2 UCN033SL1R5CP-2 PDF Download The W83877ATF is an enhanced version from Winbond
UCN033SL220J-X2   UCN033SL220J-X2 UCN033SL220J-X2 PDF Download Figure 1 shows one of the most common applicatio
UCN033SL240JP-T   UCN033SL240JP-T UCN033SL240JP-T PDF Download TAIYO 0603(圆柱) 05+ In the test mode, the normal operation of the SC
UCN033SL250H-X2   UCN033SL250H-X2 UCN033SL250H-X2 PDF Download Switching Frequency On/Off Standby (Pin 3) &nbs
UCN033SL270H-X2   UCN033SL270H-X2 UCN033SL270H-X2 PDF Download Note 3: Typical values are determined with TA = T
UCN033SL270J-X2   UCN033SL270J-X2 UCN033SL270J-X2 PDF Download  TAOperating free-air temperature−5512
UCN033SL280H-X2   UCN033SL280H-X2 UCN033SL280H-X2 PDF Download Partial page write allowed 8-byte page write mod
UCN033SL2R5CPX2   UCN033SL2R5CPX2 UCN033SL2R5CPX2 PDF Download The K5D5657ACM is a Multi Chip Package Memory whi
UCN033SL300H-X2   UCN033SL300H-X2 UCN033SL300H-X2 PDF Download Note: 1. For DIP package: Soldering temperature
UCN033SL300J-2   UCN033SL300J-2 UCN033SL300J-2 PDF Download The voltage on VFB also controls the LT3433 oscil
UCN033SL330J-X2   UCN033SL330J-X2 UCN033SL330J-X2 PDF Download Up to 12 TDM stream support, each with 128 chann
UCN033SL470J-X2   UCN033SL470J-X2 UCN033SL470J-X2 PDF Download This example program is a function written in ge
UCN033SL4R5C-X2   UCN033SL4R5C-X2 UCN033SL4R5C-X2 PDF Download The PSoC Designer Debugger subsystem provides ha
UCN033SL560J--2   UCN033SL560J--2 UCN033SL560J--2 PDF Download Synchronous detect. SYNC is asserted high upon d
UCN033SL680J-2   UCN033SL680J-2 UCN033SL680J-2 PDF Download We recommend that the worst case voltage, includ
UCN033SL680J--2   UCN033SL680J--2 UCN033SL680J--2 PDF Download 1. The MODE switch is set to LEAKAGE. 2. Connect
UCN033SL820J-X2   UCN033SL820J-X2 UCN033SL820J-X2 PDF Download Writing to the device is accomplished by taking C
UCN033SLR75B-2   UCN033SLR75B-2 UCN033SLR75B-2 PDF Download All input signals are specified with tr = tf = 5
UCN033TH120H-X2   UCN033TH120H-X2 UCN033TH120H-X2 PDF Download Overvoltage Sense. When VOUT is greater than 38V
UCN033UJ030C--2   UCN033UJ030C--2 UCN033UJ030C--2 PDF Download
UCN033UJ070D-X2   UCN033UJ070D-X2 UCN033UJ070D-X2 PDF Download The FETKYTM family of co-packaged HEXFETs and Sch
UCN033UJ080D-X2   UCN033UJ080D-X2 UCN033UJ080D-X2 PDF Download The 7640 group, an enhanced family of CMOS 8-bit
UCN033UJ090C-X2   UCN033UJ090C-X2 UCN033UJ090C-X2 PDF Download • Compact slim body saves space Thanks to
UCN033UJ100D-X2   UCN033UJ100D-X2 UCN033UJ100D-X2 PDF Download The ADXL278 is the fourth-generation surface mic
UCN033UJ120H-X2   UCN033UJ120H-X2 UCN033UJ120H-X2 PDF Download DESCRIPTION Module type FU-675PDF-V1MxxA is a wa
UCN033UJ150J-X2   UCN033UJ150J-X2 UCN033UJ150J-X2 PDF Download The MAX1282/MAX1283 12-bit analog-to-digital conv
UCN033UJ220J2   UCN033UJ220J2 UCN033UJ220J2 PDF Download For the multi-bit signal delta DAC, 64X oversampl
UCN033UJ240J-X2   UCN033UJ240J-X2 UCN033UJ240J-X2 PDF Download NOTES: (1) Test levels: (A) 100% tested at 25C.
UCN033UJ3R5C-X2   UCN033UJ3R5C-X2 UCN033UJ3R5C-X2 PDF Download It also provides the non-volatility of Flash wit
UCN033UK020C-X2   UCN033UK020C-X2 UCN033UK020C-X2 PDF Download To achieve a high selectivity, a quartz resonato
UCN033UK0R5B-2   UCN033UK0R5B-2 UCN033UK0R5B-2 PDF Download Block check character is transmitted/received as
UCN033UK0R6B-2   UCN033UK0R6B-2 UCN033UK0R6B-2 PDF Download   In GaP HBT microwave amplifiers, except G
UCN033UK1R5CN-2   UCN033UK1R5CN-2 UCN033UK1R5CN-2 PDF Download   DCK165.39314.743.18 mW/C318 mW175 mW127 m
UCN033UKR75B-2   UCN033UKR75B-2 UCN033UKR75B-2 PDF Download Hynix HYMD232M646A(L)6-J/M/K/H/L series incorpora
UCN033UKR75B--2   UCN033UKR75B--2 UCN033UKR75B--2 PDF Download After the software chip erase has been initiated
UCN053B221K--2   UCN053B221K--2 UCN053B221K--2 PDF Download TAIYO 0805-221 05+ to that code position, and there is no need to r
UCN053CH180J-2   UCN053CH180J-2 UCN053CH180J-2 PDF Download The ATF1502ASVs logic structure is designed to e
UCN053RH040L   UCN053RH040L UCN053RH040L PDF Download   The on-board RISC processor enables the I
UCN053RH5R5CP-2   UCN053RH5R5CP-2 UCN053RH5R5CP-2 PDF Download TAIYO 603 05+   The PT7700 is a new series of high- perf
UCN053SL010C   UCN053SL010C UCN053SL010C PDF Download The Flash program memory supports both parallel
UCN053SL330J-2   UCN053SL330J-2 UCN053SL330J-2 PDF Download TAIYO 04+ This series of Schottky diode chips are specific
UCN053SL560J--2S   UCN053SL560J--2S UCN053SL560J--2S PDF Download 10-W/Channel Into an 16-Ω Load From a 17-V
UCN2003   UCN2003 UCN2003 PDF Download ST SMD The enhanced configuration device has a 3.3-V co
UCN2003A   UCN2003A UCN2003A PDF Download ST DIP The CY7C1350G is a 3.3V, 128K x 36 synchronous-pi
UCN2003AN   UCN2003AN UCN2003AN PDF Download TI 01+ The leading-edge 0.15 µm / 0.12 µm C
UCN2004   UCN2004 UCN2004 PDF Download STM SOP-16 04+ A CommandUser Interface (CUI) serves as the inte
UCN2004A   UCN2004A UCN2004A PDF Download ALLEGRO 00+ DIP-16 • Execution time : down to 15.6 ns (64 MHz)
UCN2066B   UCN2066B UCN2066B PDF Download ALLEGRO DIP 03+ 500 MHz, 500 mV −3 dB bandwidth, AV=2 400
UCN2532A   UCN2532A UCN2532A PDF Download • Only 35 instructions to learn   - A
UCN2543B   UCN2543B UCN2543B PDF Download ALLEGRO DIP DIP The MSK 5115-00 is an adjustable version in the
UCN2559LB   UCN2559LB UCN2559LB PDF Download ALLEGRO SOP16 04+
UCN2580A   UCN2580A UCN2580A PDF Download ALLEGRO DIP-18 The IS41C4405x and IS41LV4405x are CMOS DRAMs o
UCN2585A   UCN2585A UCN2585A PDF Download DIP20 NOTES: A. CL includes probe and test-fixture cap
UCN2595A   UCN2595A UCN2595A PDF Download A DIP Figure 3 shows a comparison of capacitance betwe
UCN2802A   UCN2802A UCN2802A PDF Download   When only the S0 pin is at a logic one th
UCN2803A   UCN2803A UCN2803A PDF Download TI SOP-18 06+ Forward Voltage Reverse Voltage Peak Wavelength
UCN2803LW   UCN2803LW UCN2803LW PDF Download NS SOP18 07+ Port 0 (AD0C7), I/O. Port 0 is an open-drain, 8-b
UCN2840N   UCN2840N UCN2840N PDF Download ALLEGRO N/A 103   These N-Channel power MOSFETs   ar
UCN2916B   UCN2916B UCN2916B PDF Download A DIP Controller (host) will send start bit. Controle
UCN2916EB   UCN2916EB UCN2916EB PDF Download Pulse triggering occurs at a particular voltage
UCN2936W-120   UCN2936W-120 UCN2936W-120 PDF Download The MOC306X-M and MOC316X-M devices consist of a
UCN2981A   UCN2981A UCN2981A PDF Download Port 1: Is an 8-bit bi-directional I/O port wit
UCN2982   UCN2982 UCN2982 PDF Download ALLEGRO DIP Fifth Generation HEXFETs from International Recti
UCN2982LWTR   UCN2982LWTR UCN2982LWTR PDF Download ALLEGRO 03+ 168 Stresses beyond those listed under Absolute Maxi
UCN2985A   UCN2985A UCN2985A PDF Download A DIP   This device is intended specifically for,
UCN2993LB   UCN2993LB UCN2993LB PDF Download ALLEGRO The Fast pin always reflects the state of Fast, b
UCN3803   UCN3803 UCN3803 PDF Download E3DS3 or OC3 Selection (Input). In Hardware Contr
UCN3839A-2   UCN3839A-2 UCN3839A-2 PDF Download TOS DIP-16 99+ The flag bit is a volatile bit. It can be
UCN3854DWF   UCN3854DWF UCN3854DWF PDF Download VSS Circuit ground Port 0 Port 0 is an 8-bit ope
UCN4202   UCN4202 UCN4202 PDF Download UNIDEN/SOSHIN 3000 The ISP1109 is a Universal Serial Bus (USB) tran
UCN4202A   UCN4202A UCN4202A PDF Download ALLEGRO DIP Parallel Mode Operation For latched parallel int
UCN4202ABU   UCN4202ABU UCN4202ABU PDF Download ALL . The PSoC Designer Debugger subsystem provides ha
UCN4203A   UCN4203A UCN4203A PDF Download Sirenza Microdevices SBB-1089 is a high performan
UCN4204A   UCN4204A UCN4204A PDF Download The write cycle is the time from a valid stop co
UCN4204B   UCN4204B UCN4204B PDF Download FAIRCHILD DIP 99+ External I/O for Timer/Counter 2 Timer/Counter
UCN4205A   UCN4205A UCN4205A PDF Download Clocks in the ispLSI 1048C device are selected u
UCN4205B-2   UCN4205B-2 UCN4205B-2 PDF Download Notes:  1. For bestCpractices recommendati
UCN4401   UCN4401 UCN4401 PDF Download ALLEGRO 06+ 2000 Bild / Fig. 7 Transienter innerer Wärmewide
UCN4401A   UCN4401A UCN4401A PDF Download ALLEGRO The following describes a procedure for evaluati
UCN4401R   UCN4401R UCN4401R PDF Download N/A N/A N/A NOTES: 1. Stresses greater than those listed un
UCN4601A-2   UCN4601A-2 UCN4601A-2 PDF Download Four independent IEEE 802.3- compliant 10BASE-T
UCN4801   UCN4801 UCN4801 PDF Download ALLEGRO DIP 2. PATGEN   Generates test pattern signals.
UCN4801A   UCN4801A UCN4801A PDF Download FAIRCHILD DIP 99+ 2-channel 12-bit DAC Twos complement facilitates
UCN4801A-2   UCN4801A-2 UCN4801A-2 PDF Download ALLEGRO Cycle Time=Min,100% duty, II/O = 0mA, /CS = VIL,
UCN4801ADP   UCN4801ADP UCN4801ADP PDF Download The HT24LC02 is a 2K-bit serial read/write non-vo
UCN4801R   UCN4801R UCN4801R PDF Download 158 CDIP making use of a multiple Data Memory buffer techn
UCN4805   UCN4805 UCN4805 PDF Download ALLEGRO DIP Unless otherwise stated, VDD = 3.3V 10%, no loa
UCN4805A   UCN4805A UCN4805A PDF Download ALLEGRO DIP DIP Description This new device employs advanced HE
UCN4807   UCN4807 UCN4807 PDF Download ALLEGRO DIP - Logic controlled 1-CH DC motor driver - 4-CH B
UCN4807A   UCN4807A UCN4807A PDF Download ALLEGRO DIP DIP s Complies with the ACPI™, OnNow™ an
UCN4808   UCN4808 UCN4808 PDF Download ALLEGRO DIP   To achieve the specified performance, pay
UCN4808A   UCN4808A UCN4808A PDF Download ALL 04+ SECTOR LOCKDOWN DETECTION: A software method is a
UCN4808EP   UCN4808EP UCN4808EP PDF Download   The 556C/W for the SOTC23 package assumes
UCN4810   UCN4810 UCN4810 PDF Download ALLEGRO 06+ 39000   The MC100EP139 is a low skew 2/4, 4/5/6 cl
UCN4810A   UCN4810A UCN4810A PDF Download N/A N/A N/A 1) CPD is defined as the value of the ICs intern
UCN4810A-3   UCN4810A-3 UCN4810A-3 PDF Download The following power-up supply voltage application
UCN4810A-5   UCN4810A-5 UCN4810A-5 PDF Download ALLEGRO DIP 04+ Stresses beyond those listed under Absolute Maxi
UCN4810AN   UCN4810AN UCN4810AN PDF Download TI DIP 06+ The M59PW064 features an innovative command, Mu
UCN4815A   UCN4815A UCN4815A PDF Download FAIRCHILD DIP 03+ The HYM7V75AS1601B N-Series are Dual In-line Memo
UCN4815R   UCN4815R UCN4815R PDF Download The PI74FCT860T series bus transceivers provide
UCN4821A   UCN4821A UCN4821A PDF Download ALLEGRO Once set, SDP will remain active unless the disa
UCN4821ABU   UCN4821ABU UCN4821ABU PDF Download ALLEGRO DIP 04+ The HAL 805 features a temperature-compensated
UCN4823A   UCN4823A UCN4823A PDF Download all all dc83 Serial Control Interface Clock (For MPI)/Timeslo
UCN4901A   UCN4901A UCN4901A PDF Download   The values for the equation are found in
UCN5018A   UCN5018A UCN5018A PDF Download UC DIP-22 00+ FlexCAN (CAN Version 2.0 B-compliant) module wit
UCN51801EP   UCN51801EP UCN51801EP PDF Download 00 All voltages measured with respect to Pin 5. On
UCN5706A   UCN5706A UCN5706A PDF Download ALLEGRO . The CM3016-48 is fully protected, offering both
UCN5800   UCN5800 UCN5800 PDF Download ALLEJRO DIP 00+ Because the PMOS device behaves as a low-value r
UCN5800A   UCN5800A UCN5800A PDF Download A DIP-14 00+ Note 3: Operating Ratings indicate conditions for
UCN5800AL   UCN5800AL UCN5800AL PDF Download ALLEGRO DIP14 97+ Three-phase bipolar drive (30 V, 3.5 A) Direct
UCN5800N   UCN5800N UCN5800N PDF Download The FAN2500/01 allows the user to utilize a wide
UCN5800NL   UCN5800NL UCN5800NL PDF Download FUNCTION SWITCHING The device provides functions
UCN5800R   UCN5800R UCN5800R PDF Download ALLEGRO DIP 07+ Port 1 also provides special functions as descri
UCN5801   UCN5801 UCN5801 PDF Download ALLEGRO PLCC28 NOTES:   1. Dimensions are in inches. &nbs
UCN5801A   UCN5801A UCN5801A PDF Download The information provided herein is believed to b
UCN5801A-2   UCN5801A-2 UCN5801A-2 PDF Download ALLEGRO 散新 NOTES : 1. In case of 40MHz Frequency, CL1 can b
UCN5801ABU   UCN5801ABU UCN5801ABU PDF Download UC Note 5: Receiver Skew Margin is defined as the va
UCN5801CQ   UCN5801CQ UCN5801CQ PDF Download UMC PLCC28 Features • Reverse mountable • Undi
UCN5801EB   UCN5801EB UCN5801EB PDF Download ALLEGRO PLCC28 Blackfin processors support a modified Harvard a
UCN5801EP   UCN5801EP UCN5801EP PDF Download ALLEGRO PLCC 00+ Programmable up to 60 fps Programmable up to 150
UCN5801EP/M518328BPA   UCN5801EP/M518328BPA UCN5801EP/M518328BPA PDF Download The MAX9951/MAX9952 dual parametric measurement
UCN5801EPTR   UCN5801EPTR UCN5801EPTR PDF Download   The heat sink in this example must have a
UCN5801LW   UCN5801LW UCN5801LW PDF Download ONS The MCP1701 is capable of delivering 250 mA with
UCN5801R   UCN5801R UCN5801R PDF Download CDIP CDIP Each member of the M68300 family is distinguishe
UCN5804   UCN5804 UCN5804 PDF Download ALLEGRO DIP16 05+
UCN5804B   UCN5804B UCN5804B PDF Download UDN DIP DIP Notes: 1. Unless otherwise specified, these spe
UCN5804CBA   UCN5804CBA UCN5804CBA PDF Download The AHCT244 devices are organized as two 4-bit
UCN5804LB   UCN5804LB UCN5804LB PDF Download N/A N/A N/A Features • 1:10 outputs LVCMOS zero-delay
UCN5804LBTR   UCN5804LBTR UCN5804LBTR PDF Download SOP 427   The AV34063 is a monolithic control circu
UCN5804LW   UCN5804LW UCN5804LW PDF Download ALLOGE 03+ SOP16 The data contained in the data stream can also a
UCN5810   UCN5810 UCN5810 PDF Download ALLEGRO SOP 07+ • Possible to assert random column address
UCN5810A   UCN5810A UCN5810A PDF Download DIP20 DIP20 Note: 10. Test Conditions of Harmonic Intermodul
UCN5810A-1   UCN5810A-1 UCN5810A-1 PDF Download ALLEGRO *FDD: Supports up to two floppy disk drives *Par
UCN5810A-E   UCN5810A-E UCN5810A-E PDF Download ALLEGRO 1. Place series resistors and CI capacitors as cl
UCN5810AF   UCN5810AF UCN5810AF PDF Download ALLEGRO DIP 06+ INITIALIZATION   During the microprocessor
UCN5810AF-1   UCN5810AF-1 UCN5810AF-1 PDF Download 01+   The NLASB3157 is an advanced CMOS analog
UCN5810EP   UCN5810EP UCN5810EP PDF Download UNIDEN PLCC20 04+   The control algorithm utilized by the UCC
UCN5810EPF   UCN5810EPF UCN5810EPF PDF Download UC 07+ Beneficial comments (recommendations, additions,
UCN5810LM   UCN5810LM UCN5810LM PDF Download 216 WRITE PROTECTION (WP) If WP is connected to Vcc,
UCN5810LME   UCN5810LME UCN5810LME PDF Download 216 The nominal value of the RF choke L1 is 100 nH.
UCN5810LW   UCN5810LW UCN5810LW PDF Download ALLEGRO 2007 Note 1: VOUT+1V< VIN & 2.5V< VIN <
UCN5810LWF   UCN5810LWF UCN5810LWF PDF Download ALLEGRO SOP 00+ High level of integration - only one power semi
UCN5810LWFTR   UCN5810LWFTR UCN5810LWFTR PDF Download s Complete Monolithic 8-Channel, 12-Bit   D
UCN5810N   UCN5810N UCN5810N PDF Download Measurements are made with the device in thermal
UCN5811   UCN5811 UCN5811 PDF Download ALLEGRO 06+ 2000 Inherently Matched LED Current High Efficiency:
UCN5811A   UCN5811A UCN5811A PDF Download ALLEGRO DIP 06+ The UCN5811A integrates a low dropCout regulator
UCN5812   UCN5812 UCN5812 PDF Download ALLEGRO PLCC 07+ (3) Variable attenuation in the channel refers t
UCN5812A   UCN5812A UCN5812A PDF Download 2. When using this product, please observe the ab
UCN5812AF   UCN5812AF UCN5812AF PDF Download ALLEGRO DIP 00+ other than the GSM Tx path, thus achiev- ing lo
UCN5812EOF   UCN5812EOF UCN5812EOF PDF Download UCN 00+ Integrates 10BASE-T Transceiver Functions: -Dri
UCN5812EP   UCN5812EP UCN5812EP PDF Download ALLEGRO 04+ • HFBR-5701L: Dual specified 1.25   G
UCN5812EPE   UCN5812EPE UCN5812EPE PDF Download N/A N/A N/A The UCN5812EPE is a low power 10.7Gbps driver fo
UCN5812EPF   UCN5812EPF UCN5812EPF PDF Download PLCC 07+ The ISL6118 is a dual channel, fully independent
UCN5812EPFTR   UCN5812EPFTR UCN5812EPFTR PDF Download ALLEGRO 1650 The HSDL-3612 can be completely shut down to a
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UCN5812PF   UCN5812PF UCN5812PF PDF Download A PLCC USB-IF Hi-Speed certified to the Universal Serial
UCN5813B   UCN5813B UCN5813B PDF Download ALLEGRO N/A 104   The EL6119 is a dual four-channel  
UCN5814B   UCN5814B UCN5814B PDF Download spr spr dc87 The architecture of the Direct RDRAM allows the
UCN5815   UCN5815 UCN5815 PDF Download PHILIPS DIP N/A PWM With Tri-State Enable 12-V Low-Side Gate D
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UCN5815EP   UCN5815EP UCN5815EP PDF Download 03 The MSM7702 is a single-channel CODEC CMOS IC for
UCN5816   UCN5816 UCN5816 PDF Download UC PLCC 05+ GENERAL FEATURES Simultaneous SD and HD Inputs
UCN5816A   UCN5816A UCN5816A PDF Download DIP • M-Bus Module   Provides interchip
UCN5816EB   UCN5816EB UCN5816EB PDF Download Figure 4 shows the CoolRunner Timing Model. The
UCN5818   UCN5818 UCN5818 PDF Download UC . • Zero insertion and deletion for BOP 
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UCN5818EP   UCN5818EP UCN5818EP PDF Download ALLEGRO 05+
UCN5818EPF   UCN5818EPF UCN5818EPF PDF Download ALLEGRO PLCC-44 N/A A new external compensation technique can be use
UCN-5818EPF   UCN-5818EPF UCN-5818EPF PDF Download † Stresses beyond those listed under absol
UCN5818EPF-1   UCN5818EPF-1 UCN5818EPF-1 PDF Download ALLEGRO . Note: 1. The maximum steady state usable output
UCN5819A   UCN5819A UCN5819A PDF Download • Easy Gate 1 switch-off with PNP switchin
UCN5821   UCN5821 UCN5821 PDF Download ALLEGRO DIP 00+   The melting temperature of solder is highe
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UCN5821LW   UCN5821LW UCN5821LW PDF Download UNIT The UCN5821LW device is organized as two 4-bit l
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UCN5821N   UCN5821N UCN5821N PDF Download CLB has two independent 4-input function generat
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UCN5829   UCN5829 UCN5829 PDF Download HAR 05+   The Logic Diagram and Truth Table indicat
UCN5829EB   UCN5829EB UCN5829EB PDF Download UDN 07+ Retires as many as three instructions per clock
UCN5832   UCN5832 UCN5832 PDF Download The LS395 contains four D-type edge-triggered fl
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UCN5833   UCN5833 UCN5833 PDF Download ALLEGRO DIP 2.7 to 6.0 V Input Voltage Range Output Voltage
UCN5833A   UCN5833A UCN5833A PDF Download ALLEGRO DIP DIP Unless otherwise specified, the following specif
UCN5833EP   UCN5833EP UCN5833EP PDF Download UC 05+ • Input voltage range: 2.25V to 5.5V ̶
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UCN5841   UCN5841 UCN5841 PDF Download ALLEJRO PLCC-20 N/A Notes:  2. The voltage on any input or I/O
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UCN5841EP   UCN5841EP UCN5841EP PDF Download ALLEGRO DIP DIP Features • Hole-less TO-247 package for cl
UCN5841LM   UCN5841LM UCN5841LM PDF Download 152 • Pin- and function-compatible with CY7C102
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UCN5841N   UCN5841N UCN5841N PDF Download Thaler Corporation has developed a nonlinear com
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UCN5843   UCN5843 UCN5843 PDF Download One case that requires additional detail is the
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UCN5843LW   UCN5843LW UCN5843LW PDF Download UNIT PRODUCTION DATA information is current as of publ
UCN5853EP   UCN5853EP UCN5853EP PDF Download The higher V DD voltage range brings flexibility
UCN5871B   UCN5871B UCN5871B PDF Download Parameter Voltage input low Voltage input high
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UCN5891LM   UCN5891LM UCN5891LM PDF Download These pins are connected to the inputs of the t
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UCN5895   UCN5895 UCN5895 PDF Download ALLEGRO PLCC
UCN5895A-2   UCN5895A-2 UCN5895A-2 PDF Download ALLEGRO DIP-16 88+ © Cypress Semiconductor Corporation, 2001.
UCN5895EP   UCN5895EP UCN5895EP PDF Download ALLEGRO PLCC-20 Using this configuration, the device will support
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UCN5895FP   UCN5895FP UCN5895FP PDF Download E3 or DS3 Selection (Input). In Hardware Control,
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UCN5910   UCN5910 UCN5910 PDF Download ALLEGRO DIP DESCRIPTION Oscillator. The output current at
UCN5910A   UCN5910A UCN5910A PDF Download 494 ALLEGRO • Typical tSK(o) (Output Skew) < 250ps
UCN5910A2   UCN5910A2 UCN5910A2 PDF Download The A128 devices have a 10-bit-resolution sample
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UCN5925A   UCN5925A UCN5925A PDF Download Notes: 1. Test conditions assume signal transiti
UCN5929A   UCN5929A UCN5929A PDF Download Figure 3A shows a possible hook-up between the
UCNLT1170CT   UCNLT1170CT UCNLT1170CT PDF Download ALLEGRO DIP 04+ CC (Closed Caption) - Les permite a las personas
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