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  Parameter Total Gate Charge (turn-on) Gate - Emitter Charge (turn-on) Gate - Collector Charge (turn-on) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Turn-On Switching Loss Turn-Off Switching Loss Total Switching Loss Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Switching Loss Internal Emitter Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Diode Reverse Recovery Time
Port 0 (AD0C7), I/O. Port 0 is an open-drain, 8-bit, bidirectional I/O port. As an alternate function Port 0 can function as the multiplexed address/data bus to access off-chip memory. During the time when ALE is high, the LSB of a memory address is presented. When ALE falls to a logic 0, the port transitions to a bidirectional data bus. This bus is used to read external ROM and read/write external RAM memory or peripherals. When used as a memory bus, the port provides active high drivers. The reset condition of Port 0 is tri-state. Pullup resistors are required when using Port 0 as an I/O port.
In case the HT9142 is battery powered, when the power supply voltage goes low to about 1.1V, the output of the pin ²ALM² rises up to about 1.1V and the battery voltage can be monitored by other devices. The output is an open collector similar to FSK NRZ output.
Parr number/PDF Mfg Pack D/C Descrpion
WB5300   WB5300 WB5300 PDF Download N/A DIP 98 The device has 56 software-configurable I/O pins,
WB5D   WB5D WB5D PDF Download TSOP8S 2007+ Headphone is plugged in or not plugged in indicat
W.FL-R-SMT(10)   W.FL-R-SMT(10) W.FL-R-SMT(10) PDF Download Bidirectional I/O lines. Software instructions de
W.FL-R-SMT-1(10)   W.FL-R-SMT-1(10) W.FL-R-SMT-1(10) PDF Download Hirose Electric Co Ltd (VA) TEMP: This pin produces an output signal that tr
W/B/WA-554CG-N   W/B/WA-554CG-N W/B/WA-554CG-N PDF Download − 15-kV − Human-Body Model Meets or
W/F/WREL9715   W/F/WREL9715 W/F/WREL9715 PDF Download • USB host interface supports USB V1.1 at
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W/S/W   W/S/W W/S/W PDF Download † Stresses beyond those listed under absol
W/W/WRES5W0.56R5-ROUND(KNP)   W/W/WRES5W0.56R5-ROUND(KNP) W/W/WRES5W0.56R5-ROUND(KNP) PDF Download Stresses beyond those listed under Absolute Maxi
W0001   W0001 W0001 PDF Download This is an analog control input that enables the
W0-04   W0-04 W0-04 PDF Download 500 MHz, 2.0 ns Instruction Cycle Rate 12M Bits
W005   W005 W005 PDF Download GENERAL INSTRUMENT 87+ The I2C-bus is for 2-way, 2-line communication b
W005F   W005F W005F PDF Download Up to 6.384 Gbps throughput 66MHz to 133MHz in
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W009CBA   W009CBA W009CBA PDF Download Meets or Exceeds the Requirements of ANSI TIA/EI
W010017371   W010017371 W010017371 PDF Download The two RAMs in any CLB can be changed to synchr
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W01GE451   W01GE451 W01GE451 PDF Download 0.75% Output Voltage Accuracy Instant Load-Trans
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W02171   W02171 W02171 PDF Download WO 06+ 500 The W02171 dual-band device has one band selecti
W024627P74   W024627P74 W024627P74 PDF Download   Refresh and Test Mode Capability. ∗
W026393   W026393 W026393 PDF Download Note 7: The current source is connected internall
W02F   W02F W02F PDF Download A Frequency Control pin (BOOST/FC) is provided t
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W03563   W03563 W03563 PDF Download XEROX DIP8 (Note 1) Derate 0.5mA above 70C. (Note 2) 50% du
W0369   W0369 W0369 PDF Download F DIP The MAX9951/MAX9952 dual parametric measurement
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