| Mfg | pack | D/C | Descrpion | ||
| 0.0 | (43) | N/A | 1812 | Peak harmonic or spurious noise is defined as the ratio of the rms value | |
| 0.1 | (16) | N/A | By tying one input to GND or VCC, the SN74LVC1G3208 offers two more funct | ||
| 0.2 | (13) | N/A | Each I/O cell contains a 4:1 dynamic MUX controlled by two select lines | ||
| 0.3 | (6) | AVX | V2 Voltage Monitor Input. When the V2MON input is less than the VTRIP2 vol | ||
| 0.4 | (10) | N/A | 4030 | The HD66764 is a common-driver LSI for systems with color-liquid-crystal | |
| 0.5 | (53) | (1) VOS is defined as the average of the positive and the negative switch | |||
| 0.6 | (6) | 03+ | The A64 device has a 10-bit-resolution sample-and-hold MibADC. The MibADC | ||
| 0.7 | (4) | For example a designer who needs a 14-bit accurate data acquisiti | |||
| 0.8 | (10) | NA | 04+ | room temperature. For a complete description of fea- tures, operating con | |
| 0.9 | (1) | 1) All in one chip IC incorporating functions of volume, tone, an | |||
| 0/H | (1) | ||||
| 0-0 | (94) | AMP | NA | The TTL parallel I/O interface may be configured as either a FIFO (confi | |
| 00- | (59) | KYOCERA | 02+ | On page 3-9, last paragraph, change the first two lines to: The CPU32 res | |
| 00. | (2) | Wide supply voltage range from 1.65 V to 5.5 V 5 V tolerant inputs for | |||
| 000 | (82) | IBM | 04+ | The nominal output impedance of the 0000097P8164 with Pin 19 grounded ha | |
| 001 | (81) | NS | 94+ | California Micro Devices's CM1406 is an EMI filter array with ESD prote | |
| 002 | (56) | 05+ | DIP | MM1207 is described here as the representative model. MM1207 is a wideban | |
| 003 | (59) | MOT | 9脚铁帽 | 08+ | Product Identification Mode Exit/CFI Mode Exit In order to return to the |
| 004 | (32) | NS | 94+ | The electrical characteristic data has been developed from actual product | |
| 005 | (21) | AD | PLCC44 | 94 | Ceramic Capacitors Above 150 kHz the performance of aluminum electrolyti |
| 006 | (96) | CMD | SOP-8 | Each device includes on a single silicon chip a voltage regulator, | |
| 007 | (35) | TRIQUNT | 03+ | The 007R is based on the powerful CPU030 processor which combines a full | |
| 008 | (41) | 5 | MELEXIS | 03/04+ | ELECTRICAL CHARACTERISTICS: Unless otherwise stated, these specifications |
| 009 | (22) | TI | SOP | 03/+04+ | Notes: 1. For max. or min. conditions, use appropriate value specified u |
| 00A | (2) | MARVELL | DFN-12 | 06+ | |
| 00B | (2) | This notice outlines changes made to the first and second printings of th | |||
| 00C | (3) | ROHM | 03+ | Use the typical performance graphs as a guide for expected variat | |
| 00D | (1) | 00 | When EBEN is high and EA is low all program mem- ory operations take pla | ||
| 00F | (4) | MXIC | 04+ | +53 ppm -30 ppm/C from + 25C to - 55C, 60 ppm below 10 pF. X7R & Z5 | |
| 00J | (1) | No part of this document may be reproduced, transmitted, transcribed, stor | |||
| 00T | (3) | MOT | SOP-8 | Organization Memory cell allay 528 ´ 128K ´ 8 Re | |
| 00V | (4) | The 74HC/HCT03 have open-drain N-transistor outputs, which are not clam | |||
| 00W | (1) | Refer to Fig. 12 evaluation amplifier assembly drawing. Attach a regulate | |||
| 0-1 | (32) | N/A | A programmable interval timer generates periodic interrupts. A 16-bit co | ||
| 01- | (13) | M-SYSTEMS | QFN | 05 | The Stop Condition initiates an internally timed write signal whose maxim |
| 01. | (1) | 1. No purposefully added lead. 2. Part mounted on FR-4 board with recom | |||
| 010 | (65) | NA | 02+ | The Infineon single mode ATM transceiver complies with the ATM Forums Net | |
| 011 | (102) | ICS | USOP-8P | 6+ | Please be aware that an important notice concerning availability, |
| 012 | (60) | PHILIPS | 06+ | 500 | At both ends of each array and between each resistor segment is a CMOS |
| 013 | (52) | PCS | 2008 | Battery-Powered Devices Battery-Powered Alarm Circuits Smoke Detectors | |
| 014 | (126) | NS | 16700 | Constructed with the Intersil dielectrically isolated Rad Hard Silicon | |
| 015 | (119) | TOSHIBA | 0603-6.2V | 05+ | The Samsung M464S3254DTS is a 32M bit x 64 Synchronous Dynamic RA |
| 016 | (33) | FUJITSU | 01+ | The ISL5757 is a 10-bit, 260+MSPS (Mega Samples Per Second), CMOS, high s | |
| 017 | (21) | IOR | SOP8S | 2007+ | Note: Stresses greater than those listed under MAXIMUM RATINGS may caus |
| 018 | (26) | 06+ | FPGA configuration is managed by the configuration controller chip. This | ||
| 019 | (14) | MUSICAL | QFP100 | 95+ | The main software flow diagram is shown in figure 2 and the complete code |
| 01A | (4) | 05+ | SMD | Bright Red High Efficiency Red Yellow Super Bright Red Super Bright Gr | |
| 01B | (2) | PHILIPS | SOT-323 | 05+NOPB | Note 4 For a power supply of 5V g10% the worst case output voltages (VOH a |
| 01C | (4) | SOP | 06+ | The HUF76013 is an application-specific MOSFET optimized for swit | |
| 01D | (5) | 5. The 01DHAW4 and 01DHAW4A have resistor matrix taps at VRM1 (pi | |||
| 01G | (3) | NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM &nb | |||
| 01J | (2) | ATMEL | QFN | N/A | For M74HC4020 twelve kind of divided output are provided; 1st and 4th s |
| 01K | (11) | IBM | QFP100 | The listed characteristics are ensured over the operating range of the in | |
| 01L | (17) | 240 | IBM | 99+ | The OP281/OP481 are specified over the extended industrial temperature r |
| 01M | (4) | Unless otherwise specified, these specifications apply at an ambient oper | |||
| 01N | (3) | Infineon | 04+ | Choose among the following memory organizations: IDT72V255LA8,192 | |
| 01P | (1) | A/N | QFN | N/A | The C-suffix devices are characterized for operation from 0C to 70C. The |
| 01R | (1) | During power-on, RESET is asserted when VDD reaches 1 V. After minimum | |||
| 01S | (4) | LT | 3 | Voltage as Low as 2.7 V Replaces Mechanical Thermostats and Switches On | |
| 01T | (2) | CMD | 02+ | USOP-8P铁底 | The IP117M Series are three terminal positive adjustable voltage r |
| 01U | (1) | Power supply, nominal 3.3V 0.7 V Differential SRC TRUE input 0.7 V Dif | |||
| 01V | (5) | No license is granted, implied or otherwise, under any patent or patent r | |||
| 01Z | (1) | TOSHIBA | 0603+ | The dual-enable configuration gives the bus transceiver the capability to | |
| 0-2 | (2) | Many applications require manual-reset capabilities, allowing an operator | |||
| 02- | (81) | CMD | TSOP-8 | The MSK 5115 series of voltage regulators are equipped with a TTL compat | |
| 020 | (99) | QFP100 | AT49BV/LV001NT pin 1 for the DIP and PLCC packages and pin 9 for the TS | ||
| 021 | (241) | SONY | DIP-20 | 05+ | 13. Crosstalk induced jitter is defined as the added jitter that results |
| 022 | (67) | MOT | SOP-8 | Integral Nonlinearity (INL) 1, 2 Integral Nonlinearity (INL | |
| 023 | (91) | TI | SOP8 | Vcc = 5.0V10%, TA = 0C to 70C (Normal) unless otherwise specified S | |
| 024 | (24) | 93 | • Four crystal modes up to 40 MHz • Two external clock mode | ||
| 025 | (99) | CMD | The HAL 57x, HAL 58x two-wire sensors are monolithic integrated circuit | ||
| 026 | (21) | IC | SOP | DESCRIPTION The EMIF02-MIC02 is a highly integrated devices designed to | |
| 027 | (33) | FAI | 03+ | The Idle mode stops the CPU while allowing the other chip function to con | |
| 028 | (19) | FAIR | DIP-8 | 02+ | 7KH KDUGZDUH 5(6(7 SLQ WHUPLQDWHV DQ\ RSHUDWLRQ LQ SURJUHVV DQG UHVHWV WKH |
| 029 | (24) | To blink LEDs at periods greater than 1.6 seconds the bus master (MCU, M | |||
| 02A | (4) | 143 | FAIRCHILD | 00+ | The HC259 and HCT299 are 8-bit shift/storage registers with three-state |
| 02B | (1) | PMI | 06+ | 500 | implement logic functions in the 500- to 800-gate-array complexity. Since |
| 02C | (130) | TOSHIBA | 23-9.1v | 05+ | STANDARD DEFINITION MODE Hue Accuracy Color Saturation Acc |
| 02D | (82) | TOSHIBA | 0805-8.2V | Removed preliminary. Removed old CP44 pin names and replaced with updated | |
| 02E | (1) | Output matching is calculated as the percent variation from IMAX + IMIN/2 | |||
| 02G | (3) | IBM | QFP184 | † Pulsed-output patterns are tested during AC switching at 2 | |
| 02H | (1) | Continuous Drain Current, VGS @ 4.5V Continuous Drain Current, VGS @ 4. | |||
| 02K | (1) | The QS4A205 is a high-performance CMOS analog Four-Channel SPDT m | |||
| 02L | (5) | 62 | IBM | 93+ | The inrush current from the connection of a heavy ca- pacitive load may c |
| 02M | (11) | NS | SOP20W | 2007+ | Wide input voltage range 5V to 15V Tight line regulation 0 5% (typ) Outp |
| 02N | (17) | TO-252 | 06+ | Digital signal processing with the 16-bit RISC performance enables effect | |
| 02P | (7) | F | NA | The center-pin configuration reduces lead inductance when compared to the | |
| 02R | (3) | See the Terminology section. These specifications do include full tempera | |||
| 02S | (4) | JST | connector | 06+ | The NetPHY™ 4LP device operates on a 3.3 V supply and offers 5 V I/ |
| 02T | (6) | IR | USOP-8P | 6+ | The K9K1208U0A are a 64M(67,108,864)x8bit NAND Flash Memory with a spare |
| 02U | (1) | MOT | 03+ | QFP-44P | Requires no external microcontroller External parallel ROM interface allo |
| 02V | (3) | TELCOM | SOT-23 | Note) 1. Measuring methods are based on JAPANESE INDUSTRIAL STANDARD JIS | |
| 02W | (1) | Vcc = 2.3V~2.7V, TA= 0C to 70C/ -40C to 85C, unless otherwise specified & | |||
| 0-3 | (2) | Storage Temperature, TS Operating Temperature, TA Lead Solder Tempera | |||
| 03- | (122) | Ex 株式會社 | 20070114 | By using the control signal CS, SK and data input signal DI, these instru | |
| 03. | (1) | The main counter, Nominal Available Capacity (NAC), represents the availa | |||
| 03/ | (1) | ||||
| 030 | (74) | 12 | ASIC TELESET | 95+ | 256-position End-to-end resistance 5 kΩ, 10 kΩ, 50 kΩ, |
| 031 | (175) | BGA | 00+ | Pin-compatible upgrade of TMC2242B User-selectable interpolate d.c. gain | |
| 032 | (63) | ON | SOP-8 | 06+ | Highly integrated analog interface XGA/SXGA TFT LCD Display Controller |
| 033 | (26) | 76 | INTERSIL | 03+ | PRODUCTION DATA information is current as of publication date. Products c |
| 034 | (44) | SONY | CCD | N/A | Write Enable, active Low. Controls writing of command sequences in order |
| 035 | (21) | Infineon | 03/04+ | SOP8 | High Efficiency Provides Extended Battery Life Less Than 3 |
| 036 | (23) | GENSESIS | 2000 | † Package drawings, standard packing quantities, thermal data, symb | |
| 037 | (14) | MTO | DIP8 | 04+/05+ | Provides High-Performance Static Superscalar DSP Opera- tions, Op |
| 038 | (19) | SOP8 | 015+ | o 8-Channel Single-Ended or 4-Channel Differential Inputs o Sing | |
| 039 | (16) | NCR | QFP-100 | 99 | This Infineon module family are industry standard 144-pin 8-byte Synchron |
| 03A | (1) | Note A: All data listed in the above graphs has been developed from actua | |||
| 03B | (2) | KYOCERA | SMD | The Effects of Sampling Instant Uncertainty (Aperture Jitter) To conside | |
| 03C | (3) | INTERSIL | DFN | This specification describes the Bt8110 and Bt8110B multichannel ADPCM pro | |
| 03D | (5) | MOT | SOP20 | tional (HCPL-900J/-090J), two channels in one direction and two channels | |
| 03E | (2) | LINEAR | MSOP-8 | 03+ | When both clock inputs (CK, CK) are logic low, the device enters in a low |
| 03F | (2) | SAMPLE CLOCKS DATACLK, SHP, SHD Clock Period DATACLK High/ | |||
| 03G | (16) | UNITRODE | DIP8 | This new generation of TRENCH MOSFETs from Zetex utilizes a unique struct | |
| 03H | (6) | 05+ | QFP | Home Appliances : Washing Machines, Vacuum Cleaners, Rice Cookers, | |
| 03J | (2) | For applications that program the 03JUL97WMA at the factory, Analog Devi | |||
| 03K | (4) | Guaranteed 1% output voltage tolerance (LM317A) Guaranteed max. 0.01%/V | |||
| 03N | (7) | INFINEON | TO-220 | 04+ | When fewer vertical clock lines are connected, the clock dis- tribution |
| 03P | (18) | NEC | TO-92 | 02+ | The PWRDWN# pin is used to shut off all clocks cleanly and instruct the d |
| 03R | (1) | ||||
| 03S | (1) | The chip-erase mode can be initiated by a six-byte command sequence. After | |||
| 03T | (2) | CMD | 02+ | USOP-10P铁底 | Unlike other nonvolatile memory technologies, there is no write delay wit |
| 03U | (1) | byte-command sequence with Block Erase command (50H) and block address | |||
| 03Z | (1) | 02+ | Low Dropout with >99.5% Duty Cycle Lossless High-Side Current Limit W | ||
| 0-4 | (1) | 1. Life support devices or systems are devices or systems w | |||
| 04- | (54) | SINCERA | 1210-224 | CAUTION: These devices are sensitive to electrostatic discharge; f | |
| 040 | (695) | N/A | NOTES: (1) Stresses above these ratings may cause permanent damage. Expo | ||
| 041 | (55) | PHILIPS | SOP-8 | Typical ground pin current is only 1mA (at IOUT = 500mA) and drops to 0. | |
| 042 | (70) | INTERSIL | LCC超微 | 26dB small signal gain 26.5dBm output power @ 1dB compression 2.5% EVM | |
| 043 | (141) | Littelfuse | 0603-3A | 04+ | The receive FIFO consists of an 8 stage memory and 2 counters generating |
| 044 | (28) | N/A | N/A | N/A | Beneficial comments (recommendations, additions, deletions) and any pertin |
| 045 | (148) | N/A | 5X7保险管 | Input Current, IIN, SCLK Pin Input Current, IIN, CS Pin &n | |
| 046 | (82) | FDS | SOP8 | 99+ | These LCA functions are established by a configuration program which is |
| 047 | (39) | N/ | 00+ | SOP-8 | These lamps are made with an advanced optical grade epoxy, offering s |
| 048 | (74) | PHI | SOP-8 | The CD4514B and CD4515B are 4-to-16 line decoders with latched inputs im | |
| 049 | (25) | MOT | 00+ | Efficiency at 8-A Continuous Output Source or Sink Current Disabled Curr | |
| 04A | (3) | 05+ | SMD | • Ballast control and half-bridge driver in one IC • Transform | |
| 04B | (2) | By convention, any device that is sending data onto the bus is the tran | |||
| 04C | (2) | DL | 07+ | Notes: 1. Repetitive Rating : Pulse width limited by maximum junction tem | |
| 04D | (1) | This will result in an input to the crystal of 50% of the rail to rail ou | |||
| 04E | (2) | MOT | 06+ | 500 | 1) CPD isdefined as the value of the ICsinternal equivalent capacitance w |
| 04F | (19) | MOT | TQFP44 | 2007+ | When reading this manual, disregard information concerning the floating-po |
| 04H | (5) | TO-220 | An inhibit terminal is provided that can be used to disable internal swi | ||
| 04N | (14) | ICS | MSOP-8 | N/A | The IRU3072 controller IC is designed to provide a low cost synchronous B |
| 04S | (2) | N/A | • High Reliability - NEL HALT/HASS qualified for crystal osc | ||
| 04T | (1) | CMD | 02+ | USOP-8P铁底 | Notes a: Stresses greater than those listed under Absolute Maximum Rati |
| 04Z | (2) | QFN8 | 6 | The 04ZF5 C14 have 7 instructions as described below 04ZF5ote that the M | |
| 0-5 | (2) | During the soft start and the time-out delay duration with the IC in its | |||
| 05- | (13) | HT | Port 2 is an 8 bit bi-directional I/O port with internal pullups. Port 2 | ||
| 050 | (138) | LT | Using the first option, the user can program the part on the candy board | ||
| 051 | (132) | LT | Maximum ratings are those values beyond which device damage can occur. M | ||
| 052 | (50) | Infineon | SOP8 | 99+ | 1.2.3 Bit-Level Control Bit-level control over many of the microcontroll |
| 053 | (31) | molex | 04+ | 1,000 | Note 1. Operating current is a linear function of operating frequency and |
| 054 | (14) | NEC | 9508+ | DIP40 | n CMOS design for low power n 0.2V sensitivity over input common mode |
| 055 | (42) | TI | QFN24 | 06+ | NOTES: 1. Typical values are at VCC = 3.3V, +25C ambient. 2. The increa |
| 056 | (14) | MOT | N | Lead temperature 1,6 mm (1/16 inch) from case for 10 secondsTBD (1 | |
| 057 | (26) | 3.3-V Supply Operation 10-Bit-Resolution A/D Converter 11 Analog Input C | |||
| 058 | (11) | SIEMENS | 0409+ | The Hynix HYM71V16M655HC(L)T8 Series are Dual In-line Memory Module | |
| 059 | (7) | USI | SOP20P | 00+ | The Inhibit pin is an open-collector/drain active-low input that is refer |
| 05A | (7) | 05+ | SMD | A silicon diode operating as a current source. The out- put current is | |
| 05B | (2) | Minimum Quiet Time Required between CS Rising Edge and Start of Next Con | |||
| 05C | (9) | Working Standoff Voltages: 5.5 volts to 171 volts Metallurgi | |||
| 05D | (4) | TOSHIBA | 04+ | Under normal operation there are four internal frequency sources that may | |
| 05E | (1) | Low frequency cutoff determined by external coupling capacitors. | |||
| 05F | (9) | High Voltage: Operation Up to 72V Synchronizable Operating Frequency and | |||
| 05G | (1) | Note: 1. These are the frequencies that are selectable after power | |||
| 05H | (3) | PHI | PLCC28 | 2007+ | At both ends of the array and between each resistor segment is a CMOS s |
| 05J | (1) | All necessary development software and hardware is available from Hyperst | |||
| 05K | (6) | A/N | QFP-100 | 05 | • Function, pinout, and drive compatible with FCT and F logi |
| 05N | (5) | INFINEON | TO252 | 05+ | |
| 05P | (10) | MOT | 2000 | Added section 4.15.3 - In-System-Programming (ISP) of FLASH ROM De | |
| 05R | (2) | NOTE 1: Dissipation rating tables and figures are provided for maintenanc | |||
| 05S | (3) | 64 | TO252 | 04+ | Byte Write In the Byte Write mode, the Master device sends the START co |
| 05T | (5) | Sharp | TO-252 | A buffered output-enable (OE) input can be used to place the eight output | |
| 05V | (1) | SHARP | TO263 | 07+ | The basic unit of logic on the ispLSI 1048C device is the Generic Logic |
| 05W | (5) | KYOCERA | SMD | GND HD15 HD14 HD13 3.3V-VDD HD12 HD11 HD10 1.8V-VDD GND HD9 HD8 | |
| 05Y | (1) | The 74LVC1GX04 combines the functions of the 74LVC1GU04 and 74LVC1G04 in | |||
| 05Z | (2) | 05ZR-8Mhe VIN input should be capacitively bypassed to reduce AC | |||
| 06- | (9) | JAT | SMA | 05+ | The TLV349x family of push-pull output comparators fea- tures a fast 6& |
| 06/ | (1) | (H) | Note 1) All voltage are relative to VSS =0V reference. Note 2) The LSI m | ||
| 060 | (1899) | AVX | 2007+PB | When starting up the circuit utilizing the MSK 4301 for the first time, | |
| 061 | (62) | EOVS | N/A | 500 | The digital source input, D, was designed for micropro- cessor or contr |
| 062 | (21) | ST | SMD | 05+ | The Hynix HYM72V32M636T6M Series are 32Mx64bits Synchronous DRAM Modules. |
| 063 | (19) | ST | SOP-16 | 06+ | Burst mode operation Auto & self refresh capability (4 |
| 064 | (30) | ACON | N/A | 1,260 | At low gain settings an external compensation capacitor is requir |
| 065 | (39) | AMIS | QFP208 | device while it is in the system (e.g., by a virus), the device has a S | |
| 066 | (17) | LF | 07+ | assumed to be luminance and the high frequency portion is processed as c | |
| 067 | (30) | TSOP8S | 2007+ | The device fully supports live-insertion with its Ioff and power-up/ dow | |
| 068 | (30) | NEC | DIP | 2006 | ESD damage can range from subtle performance degradation to complete devic |
| 069 | (6) | HML | 06+ | 500 | Reliability Developed and manufactured in Germany guaranteeing & |
| 06A | (9) | 2008 | Depending on the type of information to be switched, the MT8985 device can | ||
| 06C | (5) | Two modes of operation are provided. In Low-Power mode, total power dis | |||
| 06D | (1) | The chipset employs Discrete Multi-Tone modulation as specified in ANSI T | |||
| 06F | (8) | JST | 07+ | DATA POLLING: The AT49BV/LV040 features Data Poll- ing to indicate the e | |
| 06G | (8) | The Am29F010A is a 1 Mbit, 5.0 Volt-only Flash memory organized as 131, | |||
| 06H | (6) | QFP64 | Protect Register Disable (PRDS) The PRDS instruction is a ONE TIME ONLY i | ||
| 06K | (24) | AMCC | BGA | The VFC measures bipolar signals up to 250mV. The bq2060 detects charge a | |
| 06N | (9) | TO-252 | The ISP1161A is a single-chip Universal Serial Bus (USB) Host Controller | ||
| 06P | (1) | PARAMETER Collector-emitter voltage peak value Collector-emitter volta | |||
| 06R | (2) | The ISL6118 has integrated current sensing on the power MOSFETs that allo | |||
| 06T | (3) | 05+ | SMD | This package is fully binned by color and intensity, except for red c | |
| 06U | (1) | (UART or clock synchronous) x 3 Clock synchronous 10 bits x (8 + 8 + 8 | |||
| 06V | (1) | The signal-select multiplexer gives the macrocell the ability to feedback | |||
| 06W | (1) | ECOS2TA560AA ECOS2TA680AA ECOS2TA820AA ECOS2TA330BL ECOS2TA560BA ECOS | |||
| 07- | (9) | N/A | 9118 | 100 | • Serial Peripheral Interface (SPI) : a kind of serial I/O interfac |
| 070 | (26) | SHARP | TO-263-5 | The Hynix HYM76V16655HGT8 Series are 16Mx64bits Synchronous DRAM Modules. | |
| 071 | (11) | ST | SMD | 05+ | 1708.30 1409.80 1281.80 1150.00 1022.00 890.20 762.20 & |
| 072 | (17) | Infineon | SOP8 | 99+ | Per MIL-STD-202, Method 213, Condition E Per MIL-STD-833, Method 1011, Co |
| 073 | (7) | An embedded MIPS processor (PR3940) running at 150 MHz is intended to run | |||
| 074 | (11) | ST | 04+ | For a VCC value below 1.0V, the FM1233B does not sink very much current | |
| 075 | (2) | Collector-Emitter Voltage (R BE 0 Ω) Collector-Emitter Voltage ( | |||
| 076 | (7) | N/A | PQFP-144 | 99 | Insertion loss is an important index for switch performance. Switch mod |
| 077 | (12) | JRC | 04+ | The IDT77155 is a member of IDT's SWITCHStAR™ family of pro | |
| 078 | (6) | FAIR | DIP-8 | 02+ | Gate-Source Threshold Voltage Gate-Source Leakage Current Static Drain-S |
| 079 | (8) | ST | N/A | Writing of memory data is performed in either byte or word increm | |
| 07A | (6) | The ready/busy status can be determined after the start of a write oper | |||
| 07B | (1) | The UVS-312A/313A/315A is 0.3 inch (7.62mm) height single digit display. | |||
| 07C | (4) | INTERSIL | LCC | 02+ | The HYM7V63801B F-Series are Dual In-line Memory Modules suitable for easy |
| 07D | (7) | 00 | Operates from Single Li-Ion Battery 2.8V to 5.5V Input Voltage Range Ver | ||
| 07E | (1) | 97+ | SSOP | The PWP and RGE packages are available taped and reeled. Add an R suffix | |
| 07F | (6) | JST | 07+ | • 2.1 MHz Clock Rate • Low power CMOS Active curre | |
| 07G | (1) | (1) Measured under pulsed conditions. Width=300µs. Duty cycle 2% (2 | |||
| 07H | (7) | INTERSIL | LCC | 02+ | Note 1: The MAX5075 is 100% tested at TA = TJ = +125C. All limits over tem |
| 07J | (1) | Revised footnote for Table 14. Added numbers to Virtex-E Electrical Cha | |||
| 07M | (1) | Multi-function Input Zero (0): If MODE = L (m68 mode), E input pin, da | |||
| 07N | (13) | N/A | N/A | 05+ | The Hynix 2Mx32 DDR SDRAMs offer fully synchronous operations referenced |
| 07O | (1) | AMD MirrorBitTM flash technology combines years of Flash memory manufac | |||
| 07R | (3) | 2007 | The nominal value of the RF choke L1 is 100 nH. At the frequencies below | ||
| 07T | (5) | 04+ | SMD | RST Reset I O A high on this pin for two machine cycles while the oscilla | |
| 07V | (5) | SHARP | 99+ | SO-263 | If the DPs are not required, then the connections shown in Table 2 can be |
| 07X | (2) | TO-252/5 | At + 85C: Leakage current shall not exceed 10 times the values listed in | ||
| 08- | (435) | CISCOSYSTEMS | 01+ | The RC4700 ALU consists of the integer adder and logic unit. The | |
| 080 | (2682) | PQFR-208 | 99+00+ | The L1085 is a positive and low dropout three-terminal voltage regulator | |
| 081 | (35) | ST | SMD | 05+ | Technology • Positive VCE(ON)Temperature Coefficient ̶ |
| 082 | (26) | ST | Four channels of EMI filtering Four channels of ESD Protection 15kV ESD | ||
| 083 | (7) | AMIS | 05+ | MQFP44 | The SPS product family is specially designed for an off-line SMPS with m |
| 084 | (21) | ST | SOP14 | Designed for applications that require long battery life while us | |
| 085 | (18) | BEL | 436 | ESD damage can range from subtle performance degradation to complete devi | |
| 086 | (28) | KYOCERA | 07+ | n Complete specifications at 1A load n Output voltage tolerances of 2% | |
| 087 | (21) | Agilent | 00+ | SMSC DISCLAIMS AND EXCLUDES ANY AND ALL WARRANTIES, INCLUDING WITHOUT LIM | |
| 088 | (13) | FAIR | DIP-8 | 02+ | NOTES: 1. Dimensions are in inches. 2. Millimeters equivalen |
| 089 | (3) | SMD | 03+/04+ | When 16/68# pin is at logic 1, it selects Intel bus interface and this i | |
| 08A | (22) | Buck Controller ♦ Quick-PWM with 100ns Load-Step Response ♦ | |||
| 08B | (1) | The algebraic convention is used in this data sheet; the most negative val | |||
| 08C | (7) | Complete Sensorless control IC for Permanent Magnet AC motors No phase | |||
| 08D | (4) | ST | 01+ | EAOUT: Error Amplifier Output. It is also connected inter- nally to the | |
| 08E | (2) | Stanford Microdevices 08ETH06PBF is a high performance SiGe Heterojuncti | |||
| 08F | (12) | WINBOND | 05+/06+ | The CS4271s wide dynamic range, negligible distor- tion, and low noise ma | |
| 08G | (7) | N/A | 06+ | 500 | To accommodate split-band and filtering, the PCS VGA drives two output a |
| 08H | (1) | HAR | 02+ | TO3P | The Fairchild Switch FST3384 provides 10 bits of high- speed CMOS TTL-c |
| 08J | (4) | CISCOSYSTEMS | BGA | 2002 | ther subdivided into: a 4-bit Device Type Identifier, and a 3-bit Chip |
| 08K | (7) | 2000 | 99+/00+ | Offered in 256Mx8bit or 128Mx16bit, the K9F2GXXU0M is 2G bit with spare 64 | |
| 08L | (3) | SSOP-8 | 03+ | After each 24-hour period has elapsed, the battery is connected to an inte | |
| 08M | (2) | 03+/04+ | An export permit needs to be obtained from the competent authorities of t | ||
| 08N | (4) | N/A | N/A | 03+ | Output skew with respect to the REF input is adjustable to compens |
| 08P | (3) | Infineon | TO252-3 | This pin is internally connected to the inverting input of the PWM compara | |
| 08Q | (1) | The SL1024A series offers high levels of current handling on fast rising | |||
| 08R | (2) | SOP | 03+/04 | This is the master clock input pin. The clock signal applied to t | |
| 08S | (1) | Ground VCR Part HD Pulse (VCR PB Mode Title Mix) VCR Part VD Pulse (VCR | |||
| 08T | (4) | 05+ | SMD | C Glueless Interface to Synchronous Memories: SDRAM or SBSRAM C G | |
| 08X | (1) | This section includes Table 1 which lists the main differences between th | |||
| 08Z | (1) | EUPEC | 2DIO: 800A1200V | VIN and IIN refer to control inputs. VI, VO, II, and IO refer to data pi | |
| 0-9 | (4) | TMS | 6000 | SYM=POWMOSN .SUBCKT 501N16A 10 20 30 * TERMINALS: D G S * 500 Volt 16 A | |
| 09- | (168) | N/A | DESCRIPTION Single chip Schottky rectifier suited for Switch Mode Power | ||
| 09. | (2) | Information furnished by Analog Devices is believed to be accurate and r | |||
| 090 | (57) | MOLEX | 05+ | 3,346 | |
| 091 | (48) | MEC | N/A | 2 | • VTT Bus Termination Output (Output Tracks the System VREF) |
| 092 | (18) | INTERSIL | LCC | 03+ | The TLC3704C is characterized for operation over the commercial tempera |
| 093 | (39) | TO263-5 | 05+ | The thermal coefficient is reduced to 600 PPM/C, which is equivalent to | |
| 094 | (10) | Infineon | SOP8 | 99+ | System Reliability: Battery-backed SRAM is inherently vulnerable to shock |
| 095 | (25) | STARCONN | 05+ | The MSK 620(B) is a very high frequency video amplifier system cap | |
| 096 | (29) | SSM | DIP-16 | 07+/08+ | • High-density mounting is possible • Low forward voltage VF , |
| 097 | (11) | ST | SSOP | NOTES : 1. VIH (max) = 5.3V AC.The overshoot voltage duration is 3ns. 2 | |
| 098 | (21) | AMIS | PLCC-84P | 03+ | The total synthesized voice contents (2.8 sec- onds) can be partitioned i |
| 099 | (38) | MOLEX | 04+ | VB: Supplies power to all circuits of the regulator except the output pow | |
| 09A | (7) | The AP1501 series are monolithic IC that design for a step-down DC/DC con | |||
| 09C | (2) | MAXIM | SOT23-3 | 2003 | Overtemperature Detect The overtemperature detect circuit switches the l |
| 09D | (1) | SHARP | TO252 | TO252 | Description Numeric, Right Hand DP Numeric, Left Hand DP Hexad |
| 09F | (19) | IBM | DIP64 | ||
| 09G | (6) | The ICs remote on/off function can turn off the output from the detached | |||
| 09H | (6) | The ispLSI and pLSI 1032E are High Density Program- mable Logic Devices | |||
| 09J | (3) | 13 | AMD | 99 | Logic Device C 3.0 to 3.6V Operating Range C 32 Macrocells |
| 09K | (14) | IBM | CGA3343 | 00+ | Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V |
| 09L | (5) | ST | 00+ | This document states the current technical specifications regarding the S | |
| 09M | (11) | N/A | DIP | Description Receiver Negative Bipolar Input. Line analog input. Receive | |
| 09N | (10) | CET | TO-220 | 04+ 03+ | • Up to 6-A Output Current • 5-V Input Voltage • Wide- |
| 09P | (6) | Infineon | TO252-3 | Note: All information contained in this data sheet has been carefully che | |
| 09S | (2) | • Low voltage operation • Low saturation voltage (<500mV, | |||
| 09T | (6) | N/A | PBGA | N/A | 3.5.1 Certification/compliance mark. The certification mark for de |
| 09V | (1) | - Operation from single +5.0V supply - Input pull-down resistor prevents | |||
| 09X | (1) | Important Information and Disclaimer:The information provided on this pag | |||
| 09Y | (2) | QFP-100 | 98+ | The B9946 is capable of generating 1X and 1/2X signals from a 1X source. | |
| 09Z | (2) | SQFP48 | 2007+ | FEATURE lOptions :- 10mm lead spread - add G after part no. &nb | |
| 0A- | (1) | NOTES: 1. Dimensions are in inches. 2. Metric equivalents ar | |||
| 0A0 | (1) | When the device is configured for programmable flags and both WEN2/LD a | |||
| 0A2 | (2) | RENESAS | TQFP-M64P | 6+ | The first solution simply sacrifices the segment drive that share a catho |
| 0A3 | (1) | LSI | PQFP-160 | 99 | |
| 0A4 | (1) | The DDU4C tolerances are guaranteed for input pulse widths and periods gr | |||
| 0A9 | (1) | Nonmultiplexed address bus Processor operates at the cloc | |||
| 0AC | (2) | After determining which clock edge to use, a start and stop bit, appende | |||
| 0AD | (1) | RESET is an open drain output that is driven to a low impedance state whe | |||
| 0AF | (1) | Stresses above these ratings may cause permanent damage. Exposure to abso | |||
| 0AH | (1) | Moving the data from two groups of registers to four common output buse | |||
| 0AR | (1) | Note 1: Resistive loading of the N_/HP_, LP_, BP_ outputs includes the res | |||
| 0AS | (1) | SOP8 | from Normal to Freerun. The Compare Circuit then measures the phase delay | ||
| 0AT | (3) | SSOP | Stresses beyond those listed under Absolute Maximum Ratings may cause per | ||
| 0B2 | (1) | HITACHI | BGA | 2006 | One case that requires additional detail is the auxiliary SVHS mode. In t |
| 0B9 | (1) | ||||
| 0BC | (1) | The MLX90247family sensors are thermopile sensors IC which detects very | |||
| 0BD | (1) | • Easier assembler notation: register interlock function • B | |||
| 0BF | (1) | MOT | 03/04+ | MQFP64 | 3.3 Electrical performance characteristics and postirradiation par |
| 0BL | (3) | LITTELFUSE | 0718+ | n Variable power management n Packaged in 6-lead SOT-23 (ADC081S101 als | |
| 0BM | (1) | 2.1.1 Specifications, standards, and handbooks. The following spec | |||
| 0BT | (2) | CMD | TSOP-8 | The HAL 805 is an universal magnetic field sensor with a linear output | |
| 0-C | (1) | Write Operation Status Detection The SST39VF160Q/VF160 provide two softw | |||
| 0C- | (2) | The 256K bytes of Flash program memory are used to store the application | |||
| 0C0 | (2) | CAO/ENBL (Current Amplifier Output/Chip Enable): The current loop compen | |||
| 0C1 | (2) | Description Pulses for operating the MOS shift register. The vide | |||
| 0C2 | (2) | Output clock data format. Controls the output clock (ODCK) format for eit | |||
| 0C3 | (2) | Address Inputs: Provide the row address for ACTIVE commands, and the colum | |||
| 0C4 | (1) | Note 5: Set FB to C0.3V, 2.5V and insure that COMP does not phase invert | |||
| 0C9 | (2) | Maximum ratings are those values beyond which device damage can occur. Ma | |||
| 0CH | (2) | Typical data are for initial design estimations only, and assume o | |||
| 0CM | (1) | There are five selectable modulation schemes: binary frequency shift key | |||
| 0CT | (2) | CMD | 02+ | USOP-10P铁底 | Note 1: All units are 100% production tested at TA = +25C. Limits over the |
| 0D- | (3) | (IBAT = 375/RPROG). This pin also allows for the charge current to be mon | |||
| 0D4 | (4) | ParameterSymbolConditions 26, 10I C INTERFACE TIMING CHARACTERISTIC | |||
| 0D9 | (1) | The synchronous start-stop character, TDI (transmitter data input), is | |||
| 0DC | (2) | HIGH SPEED: tPD = 0.3ns (TYP.) at VCC = 3.0V tPD = 0.4ns (TYP.) at VCC | |||
| 0DD | (3) | MEMORY BLOCKS C Memory Array: 63 Main Blocks C 8 Parameter Blocks (Top | |||
| 0DL | (2) | Send PCM Signal Input (Input). 128 kbps to 4096 kbps serial PCM input st | |||
| 0DS | (1) | Before valid data exchanges between the serializer and deserializer can r | |||
| 0E2 | (1) | product described in this document are for reference only. Upon actual us | |||
| 0E3 | (2) | MOT | DIP-20 | 02+ | |
| 0E5 | (1) | 2. Characteristics in microcontroller interface mode • 3-bit/4-bit | |||
| 0EA | (1) | This device contains an 8-bit, serial-in, parallel-out shift register tha | |||
| 0EC | (5) | In addition to the register operation, the conventional memory addressing | |||
| 0EP | (1) | Within the logic allocator, product terms are allocated to macrocells in | |||
| 0F1 | (1) | voice, inputs from an external audio expansion system and an output gai | |||
| 0F4 | (1) | ||||
| 0FH | (1) | 0804+ | TRI-STATE version of LS151 Interface directly with system bus Perform pa | ||
| 0FL | (3) | Operating at loads other than 50 pF poses a problem since propagation i | |||
| 0FT | (1) | Aside from jitter effects, noise and pulse distortion both reduce the phas | |||
| 0FW | (2) | NOTES: 1. A17 is a NC for IDT70V3399. 2. VDD, OPTX, and VDDQX must be s | |||
| 0G- | (1) | • Solid-state potentiometer • 3-wire serial interface • | |||
| 0GA | (1) | If you have any marketing or sales questions, please contact: Law | |||
| 0GH | (1) | 20 µA Quiescent Current Low Dropout: 200 mV (typical) Guaranteed 1 | |||
| 0GM | (2) | Configured by Loading Binary File - Unlimited reprogrammability Readba | |||
| 0H0 | (4) | • Up to 6-A Output Current • 5-V Input Voltage • Wide- | |||
| 0IG | (1) | ||||
| 0IS | (1) | SAMSUNG | 00+ | The DS2751 multichemistry battery fuel gauge is a data-acquisition and inf | |
| 0J2 | (1) | Write Protect Control Pin. This pin is a CMOS compatible input. When LOW, | |||
| 0J3 | (1) | MOT | SOP-28 | Please be aware that an important notice concerning availability, | |
| 0JS | (1) | TOGGLE BIT: I n a d d i t i o n t o DATA p o l l i n g t h e AT29LV1024 | |||
| 0K2 | (1) | MOTOROLA | SOP-8 | 01+ | <Common> • Operating Temperature : -25C ~ 85C • Packa |
| 0KB | (1) | AMI | The only controlled copy of this BIF document is the electronic read-only | ||
| 0KL | (2) | LITTLEFUSE | 12000 | A force of 1.0 Kg shall be applied to each terminal in the direction of th | |
| 0L3 | (1) | It is an open drain output and may be wire-ORed with any number of open | |||
| 0LC | (2) | 4.4.3 Group C inspection. Group C inspection shall be conducted in | |||
| 0M1 | (1) | PHILIPS | 06+ | 30000 | • Compliant to the latest IrDA physical layer specification |
| 0M2 | (1) | • The information in this document is current as of July, 2001. The | |||
| 0M3 | (2) | The TFP401/401A combines PanelBus circuit innovation with TIs adv | |||
| 0M5 | (2) | C-BUS is MX-COMs proprietary standard for the transmission of commands an | |||
| 0M7 | (1) | The 883 specifications are written to reflect the current (at the time o | |||
| 0M8 | (1) | All voltage values, except differential voltage are with respect to netwo | |||
| 0MA | (1) | Operating voltage: 2.4V~5.0V Low standby current (1µA Typ.) Voice/ | |||
| 0MF | (1) | ||||
| 0MI | (2) | DESCRIPTION The HOA0901 sensor consists of a dual channel IC detector a | |||
| 0MM | (1) | Beneficial comments (recommendations, additions, deletions) and any perti | |||
| 0MR | (1) | For battery based applications, power consumption is a key issue, therefor | |||
| 0N3 | (5) | DIP | 97 | The MAX9951/MAX9952 dual parametric measurement units (PMUs) feature a sm | |
| 0N4 | (1) | The 0N4785 is designed for asynchronous communication between data buses. | |||
| 0NS | (1) | This document is a general product description and is subject to change wi | |||
| 0OE | (1) | Panasonic | SOP14S | 2007+ | In addition, Dallas Semiconductor's continuous reliability monitor program |
| 0P0 | (11) | TI | 07+ | ICSI reserves the right to make changes to its products at any time withou | |
| 0P1 | (7) | LINEAR | DIP | 05 | The Hynix HYM7V65401B Q-Series are 4Mx64bits Synchronous DRAM Modules. The |
| 0P2 | (26) | PMI | SOP8 | 07+/08+ | High performance 20-bit Sigma-Delta ADC 118dB SNR at 78kHz output data |
| 0P3 | (3) | AD | 05+ | The HY51V(S)17400HG/HGL is the new generation dynamic RAM organized 4,194, | |
| 0P4 | (9) | The TSC80251G2D derivatives are pin and software compatible with standard | |||
| 0P5 | (1) | 3.3V LVTTL input is a level sensitive strobe used to latch the USB_48/FS_ | |||
| 0P6 | (1) | The DC/DC power module shall be installed in an end-use equip- ment and c | |||
| 0P7 | (3) | PMI/AD | This register configures the directions of the I/O pins. If a bit in this | ||
| 0P8 | (1) | The PCI subsystem is a bus master interface that performs the memory acce | |||
| 0P9 | (3) | NOTES: 1. Designators in TYPE: P: power supply and ground, DI: digital in | |||
| 0PA | (24) | SOP8 | 06+ | NOTES: 1. Clocks required specified by JEDEC functionality and not depen | |
| 0PB | (2) | Voltage range specified in the Output Stage of the Electrical Characteris | |||
| 0PI | (2) | When 16/68# pin is at logic 1 for Intel bus interface, this output become | |||
| 0PT | (2) | The UT28F256 has three control inputs: Chip Enable (CE), Program Enable | |||
| 0PW | (1) | 260C for more than 10 seconds. • When shifting from preheatin | |||
| 0Q1 | (1) | PHILIPS | DIP28 | 93+ | Notes: 1. For max. or min. conditions, use appropriate value specified u |
| 0Q8 | (1) | Notice that ITH discharges CT during both half-cycles of the line, while | |||
| 0Q9 | (1) | The NJU26108 is a digital signal processor that provides the function of | |||
| 0R0 | (1) | Applications include point-to-point (single termination) and multi- poin | |||
| 0R1 | (1) | Note: 1. The transient peak current is the maximum non-recurring peak cu | |||
| 0R2 | (4) | ORCA | RQFP-208 | 00 | Note 7: FO = 0V (internal oscillator) or fEOSC = 139800Hz 2% (external os |
| 0R8 | (1) | • High Reliability - NEL HALT/HASS qualified for crystal osc | |||
| 0R9 | (1) | The following tests are supported: • Resource tests | |||
| 0RA | (1) | The HS-5104ARH is a radiation hardened, monolithic quad operational amp | |||
| 0RD | (1) | PLL-LPF (Pin 3): Phase Locked-Loop Filter Pin. This is the output of the | |||
| 0S1 | (1) | PQFP-160 | 01 | PA0~PA7 constitute an 8-bit bidirectional input/output port with Schmitt | |
| 0SA | (2) | PHI | 99+ | TQFP-M100P | During switching, a MOSFETs source voltage must remain fixed, as any va |
| 0SD | (1) | AMI | 04+ | • Optimized for Quasi-Resonant Converter (QRC) • Advanced B | |
| 0SL | (1) | An 0SLC050.TF bypass capacitor should be used on the Vdd input. A 100 pF | |||
| 0SN | (1) | Note 2: Absolute Maximum Ratings are those values beyond which the safety | |||
| 0SO | (1) | • Single +5V supply • 24-pin SOIC • Compatible with fi | |||
| 0SR | (4) | SOP20 | 38503 | ST | Ceramic Capacitors Above 150 kHz the performance of aluminum electrolyti |
| 0T0 | (1) | ||||
| 0T3 | (1) | Package drawings, standard packing quantities, thermal data, symbolizatio | |||
| 0T4 | (1) | 常熟市光大电器厂 | N/A | The OPA860 is a versatile monolithic component designed for wide-bandwi | |
| 0TI | (3) | Pixel Magic | 07+/08+ | The STR73xF requires an external 4.5 to 5.5V power supply. There are two | |
| 0TL | (1) | For more information on the PWP package, refer to TI technical bri | |||
| 0TR | (1) | Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds300C ( | |||
| 0U2 | (1) | The IS93C46A/56A/66A is very popular in many high- volume applications | |||
| 0U4 | (1) | The DG2011 is a low on-resistance, single-pole/double-throw monolithic | |||
| 0UA | (1) | The ML9266 is a small, high efficiency, and low voltage step-up DC/DC c | |||
| 0UC | (1) | The 0UCSS106D is available in two packages: 32-pin DIP and 34-pin PowerCap | |||
| 0V5 | (1) | The basic logic element in each VersaBlock structure is the Logic Cell, | |||
| 0V7 | (1) | n Meets EIA standards RS232-C, RS422 and RS423, Federal Standards | |||
| 0W2 | (1) | Maximum ratings are those values beyond which device damage can occur. M | |||
| 0W4 | (1) | The 0W4864CD312 has on-resistance matching (less than 0.05 W @ 2.7 V) an | |||
| 0W6 | (1) | The MLX90247DSG sensor IC is integrated together with a PTC thermistor. | |||
| 0WE | (1) | The TLC372C is characterized for operation from 0C to 70C. The TLC372I is | |||
| 0WI | (4) | The bq2083−V1P2 contains 512 bytes of internal data flash memory, | |||
| 0X0 | (1) | ||||
| 0XE | (1) | The TELUX™ series is a clear, non diffused LED for high end applic | |||
| 0XF | (1) | Directly placing semiconductor transient protection devices or MOV's on | |||
| 0Y0 | (2) | The 129NQ... (R) high current Schottky rectifier module series has been o | |||
| 0YA | (1) | The C30737 type avalanche photodiode provides high responsivity between 5 | |||
| 0Z2 | (2) | IDE | 23-10V | 05+ | Notes: a. Room = 25_C, Full = as determined by the operating temperature |
| 0Z9 | (4) | MICRO | 02+ | EMPTY FLAG (EF) The Empty Flag (EF) will go LOW, inhibiting furthe | |
| 0ZD | (1) | General layout and supply bypassing play major roles in high frequency |
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