| Mfg | pack | D/C | Descrpion | ||
| 4.0 | (37) | Hynix HYMD232G726(L)8M-K/H/L series incorporates SPD(serial presence detec | |||
| 4.1 | (16) | Information is transmitted on the serial bus in messages. Each MESSAGE is | |||
| 4.2 | (7) | ST | 9540 | Reduce accidents The JTD_ID Indicator fuse improves safety by minimizin | |
| 4.3 | (23) | TOSHIBA | 23-4.3V | 05+ | Designers must have two documents to fully use all the features of this de |
| 4.4 | (10) | KSS | 3 | 07+ | 3.2 Qualification. Devices furnished under this specification shal |
| 4.5 | (10) | KDS | 12.6×12.6 | DIP 4P | Stereo 16-Bit Oversampling Sigma-Delta A/D Converter Stereo 16-Bit Overs |
| 4.6 | (6) | KYOCERA ELCO | 04+ | NOTES: 1. Inputs are capable of translating the following interface stan | |
| 4.7 | (79) | ?? | These octal buffers and line drivers are designed to have the performan | ||
| 4.8 | (1) | The operational amplifier has 6.4 MHz of bandwidth and 1.6 V/µs of | |||
| 4.9 | (9) | KDS | The HSMx-S670 is the industry standard 2.0 x 1.25 mm package, and is | ||
| 4.N | (1) | Panasonic | SOP14S | 2007+ | The TLC5620 is implemented using four resistor-string DACs. The core of e |
| 4/1 | (20) | ||||
| 4-0 | (15) | MOT | TO3 | CRemote Sense: This is the logic 0 reference for the inputs VID0 C VID4, | |
| 40- | (58) | LUCENT | QFP | 2000 | ing more than one potential position for clocking bits. Upon detection, |
| 40. | (35) | —— | DIP14晶振 | 9106+ | (1) If any of the products or technical information described in this boo |
| 400 | (299) | ISD | 06+ | 500 | This document describes part-number-specific changes to recommended opera |
| 401 | (354) | 00 | The phase of VS relative to HS and the active picture content is measured | ||
| 402 | (240) | N/A | N/A | 03+ | Four stereo 24-bit multi-bit sigma delta DACs are used with oversampling |
| 403 | (150) | A-B | MODULE | N/A | Circuit connectivity is as follows: ✔ Line 1 is connected to Pin |
| 404 | (217) | IC | 集成电路 | ATMEGA8515L-8JI | NOTES: 1. For conditions shown as Min. or Max., use the appropriate valu |
| 405 | (213) | MOT92 | 07+ | • Microchip's web site: www.microchip.com • Microchip's Techni | |
| 406 | (243) | 82 | F | In most applications, the transient suppressor device is placed i | |
| 407 | (234) | 98 | FDS | O3+ | The port transmitter and receiver circuitry is disabled during power down |
| 408 | (136) | MITSUBIS | SMD | n Up to fourteen multi-source vectored interrupts servicing Exte | |
| 409 | (131) | IC | 集成电路 | ATTINY12L-1SU | The MAX3277 is identical to the MAX3275, but with the output polarities i |
| 40A | (6) | 6 | KONICA | 2001 | To set the new VTRIP voltage, start by setting the WEL bit in the contr |
| 40B | (1) | Blanking the noise pulse in this way is very effective, but some | |||
| 40C | (54) | IR | TO-262 | 2 | PARAMETER Error Comparator Section Input Bias Current Input Offset Volt |
| 40D | (4) | TSSOP | 05+ | A 8051 standard pin is a pseudo open drain pin. It can sink at least 4mA | |
| 40E | (13) | IR | TO-247 | 08+ | Guaranteed Low Skew < 25ps (max) Very low duty cycle dis |
| 40F | (4) | MT | O7+ | When an external clock is desired, a clock pulse of ap- proximately 3V | |
| 40G | (7) | SOP16M | 2007+ | The software protection is a register based read and write protection i | |
| 40H | (158) | IR9541 | 07+ | The device is available with an access time of 85 ns. The device is off | |
| 40I | (6) | First stage output bias. This pin is sensitive to bypass capacitors place | |||
| 40J | (2) | Vcc = 2.3V~2.7V, TA= 0C to 70C/ -40C to 85C, unless otherwise specified & | |||
| 40K | (3) | MOT | 06+ | BGA | wide band frequency, 200-2000 MHz excellent amplitude unbalance, 0.2 dB |
| 40L | (23) | IR | TO-3P | The battery-saving function is controlled by the pin ²BS² and t | |
| 40M | (13) | SEI | 鋾4脚 | 2001/7D | The LCD product described in this specification is designed and manufactu |
| 40N | (17) | N/A | N/A | N/A | In 1969, the first triple operational transconductance ampliᤙ |
| 40P | (18) | Honeywell | 2008 | (1) The algebraic convention, in which the least positive (most negative) | |
| 40Q | (2) | TO-252 | A six-byte command (Enter Single Pulse Program Mode) sequence to remove t | ||
| 40R | (2) | 40POS | 2005 | NOTES: (1) Test Levels: (A) 100% tested at 25C. Over temperature limits b | |
| 40S | (27) | LB | SOP-40 | 98 | Detection of a shorted load sets a latch which turns off both the high-s |
| 40T | (12) | 95 | Notes: VZ is programmable from -2V to +7V. IOL & IOH programmable fr | ||
| 40V | (3) | ON | SOT23 | By incorporating so many major features into a single M68300 family chip, | |
| 40Y | (2) | QUICKLOGIC | TQFP | 03+ | Full-field Image Sensor 3500 x 2300 Pixels Pixel 10 µm x 10 µ |
| 40Z | (2) | VITEC | SOP-40 | 08+ | The receiver would fail to acknowledge for two distinct reasons. First |
| 4-1 | (124) | AMP | 2000 | 50 | 5.2.2 Framing Functions The ST20196 incorporates framing functions for t |
| 41- | (9) | PHILIPS | 2008 | This popular Transient Voltage Suppressor (TVS) series for 1N6036 thru 1N | |
| 41. | (4) | The IC80C51/31 is designed with 4K x 8 ROM (IC80C51 only); 128 x 8 RAM; | |||
| 410 | (56) | IC | 集成电路 | ATTINY12V-1SI | We Listen to Your Comments Any information within this document that you |
| 411 | (120) | BOURNS | DIP-16 | 9533+ | |
| 412 | (49) | N/A | DIP16 | 07+ | MX98715A's PCI bus master architecture delivers the optimized performan |
| 413 | (42) | SMD | 01+ | HT1625 is a peripheral device specially designed for I/O type MCU used to | |
| 414 | (121) | AMP/TYCO | N/A | The joint TLB also contains information to control the cache coher | |
| 415 | (69) | IC | 集成电路 | ATU2270B-MFPY | The LP5550 is a PWI 1.0 compliant Energy Management System for reducing |
| 416 | (95) | AT&T | PLCC68 | 00+ | C Pinout and software compatible with single-power supply Flash d |
| 417 | (47) | AMD | DIP | 03+04+ | BYTE64-125Manufacturer Data FieldHYUNDAI MFD- BYTE126-127R |
| 418 | (38) | IC | 集成电路 | B32561J3104K289 | † Stresses beyond those listed under absolute maximum ratings may c |
| 419 | (28) | DLP/TI | BGA | 3 | Full Scale Range (FSR) is 10V for unipolar mode. Guaranteed but not pro |
| 41A | (22) | N/A | 00+ | N/A | FEATURES • Current Limit Protection • l/O Isolation, 5300 VR |
| 41B | (11) | LUCENT | 04+ | The MAU can perform SHA-1, MD5 and MD4, three of the most popular public | |
| 41C | (48) | MPE | SOJ | 1998 | This device operates from a single 3.3-V supply. The device has integrate |
| 41D | (5) | LUCENT | 04+ | This block generates the system timing and control signal supplied to the | |
| 41E | (8) | IBM | 2005+ | BGA37.5*37.5 | repetitive avalanche performance. †This value determined fro |
| 41F | (4) | NEC | 2007 | Similar To Industry Standard LT1085 Approved To DESC Standardized Milit | |
| 41G | (2) | LUCENT | 2008 | High data rate, 5 MHz typical (NRZ) Free from latch up and oscilliation | |
| 41H | (41) | ir | n/a | @ Digital power output 824-849 MHz Over supply voltage Over temperature | |
| 41J | (4) | LUCENT | 04+ | Junction Temperature: -65oC to +175oC Storage Temperature: -65oC to +17 | |
| 41K | (11) | LUCENT | 04+ | Junction Temperature Calculation: TJ = TA + (PD x JA ), PO = DF x (TJ C TA | |
| 41L | (28) | AT8T | DIP | Notes: 1. Permanent device damage may occur if the above Absolute | |
| 41M | (12) | LUCENT | DIP | Internal, dual, high-performance phase locked loop (PLL) synthesizers/VCOs | |
| 41N | (6) | IR | TO-220 | The internal bootstrap diode and an external bootstrap capacitor supply | |
| 41P | (6) | LUCENT | 2008 | The TC6501 and TC6503 have an open-drain, active- low output, which targe | |
| 41Q | (1) | MA-COM | O7+ | † Stresses beyond those listed under absolute maximum ratings may c | |
| 41S | (1) | Integration ADSP-2100 Family Code Compatible (Easy to Use Algebr | |||
| 41T | (6) | ST | On receipt of PWM signal start instruction turn-in signal for forc | ||
| 41U | (1) | The AT89S2051/S4051 provides the following standard features: 2K/4K bytes | |||
| 41V | (1) | ON | LL34 | The CS61880 is a full-featured Octal E1 short-haul LIU that supports 2. | |
| 4-2 | (13) | MOT | CAN6 | maintenance, a PRBS/QRSS generation/detection circuit is integrated in t | |
| 42- | (5) | N/A | Up to 6.384 Gbps throughput 66MHz to 133MHz input clock support Reduce | ||
| 42. | (3) | The second feature offered by the MIC5156/7/8 parts is an error flag. T | |||
| 420 | (148) | INTERSIL | SMD8 | 9948 | Note 1: Measurements are made with the device in thermal equilibrium. Not |
| 421 | (129) | Note 11 Positive linearity error is defined as the deviation of the analo | |||
| 422 | (59) | IC | 集成电路 | B72520T0300K062 | Anticollision mode, which is used only in long range operation, allows |
| 423 | (48) | BB | DIP | DIP | Short Circuit Protective Function (SC) : SC protection is achieved by s |
| 424 | (98) | N/A | MOLEX | 05+ | The SN74CBT3125C is a high-speed TTL-compatible FET bus switch with low O |
| 425 | (60) | NEC | SOP8 | 03+ | Right Hand Decimal Point 1. Overflow Character • C |
| 426 | (55) | NEC | SOJ | 00+ | Cavity-free glass-passivated junction Ideal for automated placement Ul |
| 427 | (57) | Infineon | TO:263-5 | (*) CPD is defined as the value of the ICs internal equivalent capacitanc | |
| 428 | (80) | MOLEX | 08+ | Notes: 6. These LED displays are categorized for luminous intensity, with | |
| 429 | (50) | IC | 集成电路 | BAS16 | 1 Gbit/sec, 100 MBytes/sec, each direction w/full duplex support Up to |
| 42A | (1) | The device can distinguish between a local wake-up request (pin WAKE) and | |||
| 42C | (72) | IR | 07+ | Controls C12V, 3.3V, 5V and 12V Supplies 14.4V Absolute Maximum Rating fo | |
| 42D | (2) | N/A | 06+ | 1317 | Multi-channel Rch input A Multi-channel Cch input A Multi-channel SLch i |
| 42E | (1) | Panasonic | SOP14S | 2007+ | to that code position, and there is no need to replicate this information |
| 42F | (7) | INTEL | PLCC32 | 03/+04+ | |
| 42G | (16) | UC | SOP | 06+ | Positive edge triggered input clock signal that is set to 16 times the dat |
| 42H | (19) | NSC | O7+ | Enhanced N channel FET with no inherent diode to Vcc 5Ω bidirectio | |
| 42I | (2) | Peak harmonic or spurious noise is defined as the ratio of the rms value | |||
| 42J | (1) | The XC5200 family has been benchmarked with many designs running synchr | |||
| 42L | (1) | NSC | O7+ | The advanced and highly flexible digital output interface enables perfor | |
| 42M | (5) | NS | SMD | tPHZPropagation delay time, high-level-to-high-impedance output tPLZProp | |
| 42N | (4) | PH | TO-220 | Addresses, data I/Os, chip enables (E1, E2, E3), address burst control i | |
| 42P | (3) | SOJ40 | 2007+ | • Plastic package has Underwriters Laboratory Flammability | |
| 42R | (2) | 05/06+ | Device programming occurs by executing the pro- gram command sequence. T | ||
| 42S | (41) | ICSI | TSOP | 0425+ | Meet ANSI standard RS-485 and RS-422 Data rate 2.5 Mbps Single supply |
| 42T | (5) | eupec | Resolution: The accelerometer resolution is limited by noise. The output | ||
| 42Z | (2) | FIL-MAG | DIP-8 | 08+ | The CX65105 is internally matched for optimum linearity and efficiency. T |
| 4-3 | (11) | Measurements are made with the device in thermal equilibrium. Current int | |||
| 43- | (16) | TLSI | DIP-28 | 8921+ | The Hitachi HN29W12811 Series is a CMOS Flash Memory with AND type multi- |
| 43. | (6) | JPN | N/A | 08+ | TI warrants performance of its semiconductor products to the specificatio |
| 43/ | (1) | Note 3: Specifications over the C40C to 85C temperature range are assure | |||
| 430 | (559) | Molex | 08+ | Features Ÿ International standard package miniBLOC Ÿ A | |
| 431 | (234) | ST | 06+ | 2320 | Four (391), Eight (389) or Sixteen (387) Line Drivers Meet or Exceed the |
| 432 | (86) | N/A | MOLEX | 05+ | |
| 433 | (70) | T | 00+ | • Low On-Resistance (16Ω typ) Minimizes Distortion an | |
| 434 | (52) | (E)3/8A(0.375A) | Specifications with standard typeface are for TJ = 25˚C, and those w | ||
| 435 | (76) | NS | DIP14 | 04+ | +Denotes lead-free package. *I2C is a trademark of Philips Corp. Purchase |
| 436 | (164) | Molex | 08+ | The output enable input is active LOW. If the output enable is active whil | |
| 437 | (283) | ST | TFBGA | 05+ | FEATURES High-Performance Member of Pin-Compatible TxDAC Product |
| 438 | (73) | MARVELL | 3.9mm | 05+ | • Separate Memory Banks by Address Space C Simultaneous Re |
| 439 | (48) | IC | 集成电路 | BAT54,E6327 | 21. Measured using a 750 mV source, 50% duty cycle clock source. All load |
| 43A | (2) | 03+ | SOP23-6 | slew-rate control structure with four configurable options for each indi | |
| 43B | (2) | ||||
| 43C | (25) | 00+ | MPX53 series pressure sensors are available in differential and ga | ||
| 43D | (1) | /RCS0 -->/CS : SDRAMs D0-D8 /RCS1 -->/CS : SDRAMs D9 - D17 RBA0-RB | |||
| 43E | (17) | MOTOROLA | 06+ | QFP 44 | The DTMF generator controls the sending of the sixteen standard DTMF tone |
| 43F | (12) | N/A | 45321812 | Testing of switching parameters is modeled after testing methods specifi | |
| 43H | (8) | LEXMARK | QFP100 | Input Filter: To facilitate the high output fast trqansient performance, | |
| 43K | (3) | Indefinite short circuit protection and overload protection are provided | |||
| 43L | (6) | CS | Figure 1 shows a typical battery pack application of the bq2014 using the | ||
| 43M | (1) | 3.6 Certificate of compliance. For device classes Q and V, a certi | |||
| 43N | (2) | 07+ | TO-220 | The TESTM, SE, and SM terminals are used to set up various manufacturing | |
| 43P | (21) | SP | 05/06+ | LAYOUT CONSIDERATIONS The high peak currents and switching freque | |
| 43R | (2) | Stresses above those listed under Absolute Maximum Ratings may cause pe | |||
| 43T | (1) | the temperature extremes, hot and cold. This variation is characteristic | |||
| 43U | (2) | ON | SOT-223 | 01+ | These capabilities make the 43U02 ideal for nonvolatile memory applicat |
| 43V | (3) | PHI | Two serial outputs (Os and Os) are available for cascading a number of | ||
| 43W | (3) | voltage (150 mV at full load). Therefore, compared to many other regula | |||
| 43X | (1) | 2008 | In addition to the high-speed converter and versatile control capability | ||
| 43Z | (1) | Inhibit*: This is an open-collector (open-drain) negative logic input tha | |||
| 4-4 | (11) | MOT | 95+ | TO-39 | New high voltage technology designed for ZVS-switching in lamp ballasts |
| 44- | (15) | KOA | 03+ | 256 Independent, Bidirectional HDLC Channels Up to 132Mbps Full-Duplex T | |
| 44. | (12) | The HC27 and HCT27 logic gates utilize silicon gate CMOS technology to | |||
| 440 | (125) | IC | 集成电路 | BAT54C | C672x: 32-/64-Bit 300-MHz Floating-Point DSPs Upgrades to C67x+ CPU From |
| 441 | (117) | Molex | 08+ | 16 Single-Bit General Purpose I O ports (GPIO) Modifiable address | |
| 442 | (137) | MAX | 99 | MSOP8 | layout, a frequency counter capable of less than 1 ppm resolution and acc |
| 443 | (52) | APM | SOP8 | 06+ | rial Data (SDA) to VCC. (Figure 4. indicates how the value of the pull |
| 444 | (90) | Molex | 08+ | Note 1: Power dissipation is 500 mW when mounted as recommended. Derate a | |
| 445 | (45) | Infineon | 2003 | PQFQ-44 | CAP: A capacitor is normally connected between this pin and GND providin |
| 446 | (58) | IC | 集成电路 | BAV70LT1 | Collector-Emitter Breakdown Voltage IC = 200 mAdc Collector-Emitt |
| 447 | (88) | 2007 | These CMOS switches can operate continuously with a single supply between | ||
| 448 | (36) | IC | 集成电路 | BAV99,E6433 | The major controlling factor in the OTA is the input amplifier bia |
| 449 | (17) | IC | 集成电路 | BAV99W,135 | The 24XX32A supports a bidirectional, 2-wire bus and data transmission |
| 44A | (19) | 82 | 铁帽 | Address, data inputs, and all control signals are synchronized to the inpu | |
| 44B | (7) | MOTOROLA | 06+ | SMD | NOTES:2911 tbl 09 1. "X" in part numbers indicates power ratin |
| 44C | (36) | SOZ | The intended application of this device and signaling technique is for po | ||
| 44D | (5) | LEXMARK | 0028 | sinking and sourcing 20 mA at TTL voltage levels. The Output Disable log | |
| 44E | (1) | Panasonic | SOP14S | 2007+ | EtherCouplers receive and transmit sections fully imple- ment the ISO/AN |
| 44F | (1) | TIs new, small geometry, state-of-the-art, analog CMOS process allows t | |||
| 44H | (1) | MOT | TO-251 | 07+ | Description The CE pin is used for interfacing with the CPU. Should be he |
| 44I | (1) | AMKOR | 2008 | FEATURES D Replaces OR-ing Diodes D Operating Supply Range | |
| 44J | (4) | 0 | PLCC | Designed to meet the the derating requirements of MIL- STD-975 and manu | |
| 44K | (1) | No Option and Option 300 contain 50 units (HCPL-7710), 100 units (HCPL-071 | |||
| 44L | (12) | ASAT | PQFP44 | 07+ | The LM4953 is an audio power amplifier designed for driving Ceramic Spe |
| 44M | (2) | 07+ | Power dissipation at 25ºC: 5.0 watts (also see derating in Fi | ||
| 44N | (2) | Maximum ratings are those values beyond which device damage can occur. Ma | |||
| 44P | (9) | ||||
| 44R | (1) | FEATURES Fast Throughput Rate: 200 kSPS Specified for AVDD of 2.7 V to 5 | |||
| 44S | (5) | PQFP44 | 38503 | PHI | Broad Support Program: A BSP layer is provided to allow easy porting of p |
| 44T | (1) | TI | TSSOP-10 | 07+ | The ZL10354 is a superior fourth generation fully compliant ETSI ETS300 7 |
| 44U | (1) | INTERSIL | 00+ | The low (3.5pF) input capacitance makes this part useable for applicatio | |
| 44W | (10) | BI | CONNECTION MODE In Connection Mode, the addresses of input source | ||
| 44Z | (1) | I FEATURES G Operating Voltage G 3-Wired Serial Control & | |||
| 4-5 | (16) | AMP/TYCO | 89+ | Time filtering on the undervoltage and overvoltage detection and current | |
| 45- | (12) | 93 | QFP | NOTES 1Measured at IOUTA, driving a virtual ground. 2Nominal full-scale | |
| 45. | (11) | SOSHIN | 05+ | The SCLK is the clock input to the ISD5008. Gener- ated by the master mi | |
| 450 | (192) | IC | 集成电路 | BAW56W,115 | LED backlight modules are combination modules of custom light- source |
| 451 | (169) | IC | 集成电路 | BB178,115 | DESCRIPTION The VN750, VN750S, VN750PT, VN750-B5 are a monolithic devi |
| 452 | (83) | ST | SOP | 00+ | 2. TVS devices are normally selected according to the working peak revers |
| 453 | (92) | SI | SOP-8P | 6+ | Bank Select Address (BA0 and BA1) defines which bank the ACTIVE, READ, |
| 454 | (68) | NS | SMD | 00+ | The HY29DS16x can be programmed and erased in-system with a single 2.0 |
| 455 | (123) | AT | SMD-8 | 05+ | When pin CPH exceeds 5.1V, the IR21592 enables the over-current protectio |
| 456 | (50) | SOP-8 | SOP-8 | Due to the large number of high current drivers available on the XC73144 | |
| 457 | (49) | WICKMANN | 3X11保险管 | Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V | |
| 458 | (64) | SOP-8 | SOP-8 | MBF1 is set LOW by a LOW-to-HIGH transition of CLKA that writes data to th | |
| 459 | (24) | API Delevan | 0830 | Stress in excess of Absolute Maximum Rat- ings may cause permanent damage | |
| 45A | (7) | QFN | 03+ | Figure 33 provides the Motorola part numbering nomenclature for the MPC82 | |
| 45C | (4) | IR | TO-259AA | 00+ | Parameter VDD to GND2 RFVDD to GND Digital I/O Voltage to GND Operatin |
| 45D | (32) | AT | SOP | 07+ | B. Panasonic is endeavoring to continually improve the quality and reliab |
| 45E | (5) | TOROCOM | 1. This document may, wholly or partially, be subject to change without n | ||
| 45F | (16) | Agilent | 0405+ | The IC must be equipped with external RC circuitry to limit the voltage i | |
| 45G | (2) | Isolation in Power-Down Mode, V+ = 0 Specified Break-Before-Make Switchin | |||
| 45H | (3) | MOT | TO252 | 9330+ | TAOperating free-air temperatureC4085C NOTE 3: All unused inputs o |
| 45J | (3) | The phantom clock provides timekeeping information including hundredths of | |||
| 45K | (1) | The chip-erase mode can be initiated by a six-byte command sequence. After | |||
| 45L | (37) | DSI | n/a | CLOCK and DATA TRANSITIONS: The SDA pin is normally pulled high with an e | |
| 45M | (7) | IR | The SY89328L is a differential LVPECL-to-LVTTL translator and an | ||
| 45N | (8) | NIKOS | SOT-263 | 03+ | Notes: 1. Minimum Noise Figure and Associated Gain at Fmin computed from |
| 45P | (10) | ST | SOP-3.9-8P | 6+ | This LSI device can contribute to improved anti-shock performance by add |
| 45R | (1) | ||||
| 45S | (1) | NS | 08+ | The AD5207 provides dual channel, 256-position, digitally controlled var | |
| 45T | (2) | SMD-8 | 2005 | A store-and-forward switching method using a non-blocking architecture is | |
| 45U | (1) | ||||
| 45V | (3) | SST | O7+ | n Pop & click circuitry eliminates noise during turn-on and t | |
| 45W | (1) | AZU | 04+ | QFN-M10P | The first one is the ROM/SRAM/Flash-style interface that has programmabl |
| 45Y | (2) | The ABT162244 contains sixteen non-inverting buffers with 3-STATE output | |||
| 4-6 | (94) | MOT | 92+ | CAN/3 | The HT24LC02 has a write protect pin that provides hardware data protecti |
| 46- | (6) | NCR | PLCC-84 | Both pre- and post-radiation performance are tested and specified using | |
| 46. | (5) | DESCRIPTION The SuperMESH™ series is obtained through an extreme | |||
| 46/ | (2) | Features NPT IGBT technology low saturation voltage l | |||
| 460 | (451) | AD | DIP | 00+ | These EPROMs and OTP PROMs operate from a single 5-V supply (in the read |
| 461 | (225) | BOURNS | 35000 | A 75 Ω termination resistor with short traces should be attached be | |
| 462 | (27) | 05+ | PLCC | These devices operate from a single supply of +2V to +12V and are optimiz | |
| 463 | (32) | FSC | 06+ | 680 | NOTES: 1. Stresses above those listed under Absolute Maximum Ratings may |
| 464 | (25) | IC | 集成电路 | BC559BTA | Small Size Industry Standard Footprint Compatible w |
| 465 | (55) | IC | 集成电路 | BC640G | FEATURES Bidirectional crowbar protection Voltage: range from 120V t |
| 466 | (41) | TEMIC | PLCC-28P | 00+ | How are these devices different than the other Crystal PCI audio products |
| 467 | (20) | 05+ | PLCC | The stereo audio DAC supports sampling rates from 8 kHz to 96 kHz and i | |
| 468 | (27) | N/A | 04+ | † Stresses beyond those listed under absolute maximum ratings may c | |
| 469 | (6) | MOT | PLCC44 | 07+ | Note 1: Absolute maximum ratings indicate limits beyond which damage to t |
| 46A | (6) | CMD | SMD | 96/97+ | The AM93LC86 is the 16384-bit non-volatile serial EEPROM. The AM93LC86 pr |
| 46C | (2) | A/N | QFN | 04 | Each logic block features a 72 x 87 programmable product term array. Th |
| 46D | (3) | EUPEC | 8000A,600V | 07+特价模块 | SD/CT: This is the shutdown pin and also the short-circuit timing pin. Pu |
| 46E | (1) | N/A | N/A | N/A | • Adjustable Output Down To 1.2V • Fixed Output Voltages 1.5, |
| 46G | (1) | ISSI | SOP- 8 | The LPC47M14x* is a 3.3V (5V tolerant) PC99 compliant Super I/O controller | |
| 46H | (6) | NEC | DIP-42 | 9936 | NOTES: 1. All typical values are at VCC = 5 V, Tamb = +25C ambient and |
| 46I | (1) | FAIRCHILD | 06+ | SOT-89 | Maximum ratings are those values beyond which device damage can occur. Ma |
| 46J | (1) | JAC | It must also be noted that in (noninverting) gain configurations (with l | ||
| 46K | (1) | General-purpose applications are greatly enhanced by the large address sp | |||
| 46L | (4) | QFP64 | 4.3 Screening. Screening shall be in accordance with MIL-PRF-19500 | ||
| 46N | (8) | IR | TO220 | Samsung Electronics' microcontroller business has been awarded full ISO-14 | |
| 46R | (1) | • Complete Shutdown C TxD, RxD, PIN Diode • One Optiona | |||
| 46T | (4) | TI | TSSOP-10 | 07+ | Notes: 5. Test conditions assume signal transition time of 3 ns or |
| 46U | (1) | 03+ | SOP23-6 | If the STBY* input (pin 8) is left open-circuit the regulator operates n | |
| 46V | (7) | Hynix HYMD132645B(L)8-M/K/H/L series is designed for high speed of up to | |||
| 46Z | (2) | UITEC | SMD | 96 | ture. Once the end of a byte program cycle has been detected, a new acc |
| 4-7 | (15) | n/a | N/A | 64 | Notes: 9. Test conditions assume signal transition time of 3 ns or |
| 47- | (15) | SKYWORTH | 99+ | The ICL7104, combined with the ICL8052 or ICL8068, forms a member of In | |
| 47. | (2) | ||||
| 47/ | (1) | JA values shown are typical for standard test PCBs only. For high-power | |||
| 470 | (179) | KYOCERA | 4X4可调 | ESD damage can range from subtle performance degradation to complete dev | |
| 471 | (78) | IC | 集成电路 | BC846B,E6327 | Power Diode Module DF40BA is designed for three phase full wave rectifica |
| 472 | (51) | IC | 集成电路 | BC847A T/R | During packet reception the serial data bits are split into two-, four-, |
| 473 | (40) | IC | 集成电路 | BC847BPN T/R | Byte write operations are qualified with the four Byte Write Select (BW[A |
| 474 | (46) | IC | 集成电路 | BC847CW,115 | The SN65LV1023A and SN65LV1224A are a 10-bit serializer/deserializer chip |
| 475 | (39) | ph | ph | dc86 | The large Cs capacitor creates a virtual ground termination, making the |
| 476 | (46) | AMIS | QFP128 | Fourth Generation HEXFETs from International Rectifier utilize advanced p | |
| 477 | (27) | N/A | SOP- 8 | 2. Regularly and continuously improve the performance of our products, pr | |
| 478 | (23) | FAIRCHILD | 01+ | SOP-3.9-14P | It can be interfaced to 5V signal environment for inputs in mixed 3.3/5 |
| 479 | (11) | N/A | PLCC-44 | 98 | † Stresses beyond those listed under absolute maximum ratings may c |
| 47A | (8) | PHILIPS | SMD | 9905 | The 47ABT245D interfaces directly to the PCI bus. As a bus master, it t |
| 47B | (1) | Case: JEDEC ITO-220AB molded plastic body Terminals: Plated leads, solder | |||
| 47C | (341) | TOS | DIP | 2006 | An internal PMOS pass transistor allows the low 135µA supply curren |
| 47F | (3) | The CN8223 ATM Transmitter/Receiver with UTOPIA Level 1 interface provides | |||
| 47H | (2) | PLCC | 98+ | 2. When using this product, please observe the absolute maximum ratings an | |
| 47J | (1) | There is another error term which becomes important at very low charge | |||
| 47K | (9) | PANASONI.. | 05+ | SOP-16 | LoDCR mΩ DCR mΩ HEAT RATING INDUCTANCE TYPICALM |
| 47M | (3) | 05+ | QFP | C Certain signals are logically true at a voltage defined as low | |
| 47N | (13) | Infineon | TO263 | 03+ | The GS82032A is an SCD (Single Cycle Deselect) pipelined synchronous SR |
| 47P | (30) | N/A | BGA | The ISO120 and ISO121 are precision isolation ampli- fiers incorporating | |
| 47R | (2) | SOP-14 | 98+ | ICs form an on-board 28-bit serial-in/parallel-out shift register with c | |
| 47U | (46) | Other features include low quiescent current, typical- ly 70µA, and | |||
| 47V | (1) | ON | SOT23 | Unique 1-Wire interface requires only one port pin for communication Der | |
| 47W | (2) | AZN | MLP-S10P | 07+ | Specifications are for the OUTA or OUTB of a single 2nd order section (A o |
| 47X | (2) | 2008 | They are intended for applications in the RF front end, in wideband ap | ||
| 4-8 | (22) | AMP 07+ | Minimizes Distortion and Error Voltages On-Resistance Matching Channels, | ||
| 48- | (4) | 01+ | BGA | • Access times of 70, 85 ns • CMOS low power operation: &nb | |
| 48. | (14) | KSS | CRYSTAL13PIN | 07+ | AMDs Flash technology combines years of Flash memory manufacturing expe |
| 480 | (100) | N/A | MOLEX | 05+ | HY5DV651622 offers fully synchronous operations referenced to both rising |
| 481 | (439) | SOP16M | 2007+ | Gain Bandwidth Product at VCE = 2 V, IC = 20 mA, f = 2.0 GHz Gain Band | |
| 482 | (90) | IC | 集成电路 | BCP51-10,135 | |
| 483 | (37) | IC | 集成电路 | BCP56 T/R | The PC87431x incorporates an embedded microcontroller, three System Man |
| 484 | (24) | ONS | QFN8 | conditions, the contents of the memory lo cation specified on the address | |
| 485 | (42) | 模块 | 08+ | The ZREF25 uses a bandgap circuit design to achieve a precision micropow | |
| 486 | (44) | NS | . | The transmitter is an inverting level translator that con- verts CMOS-log | |
| 487 | (109) | MOT | DIP-8 | 2. The maximum rated output power for this series is 20W. An incr | |
| 488 | (30) | IC | 集成电路 | BCW70LT1G | The ICS8308I is characterized for 3.3V core/3.3V output, 3.3V core/2.5V |
| 489 | (64) | IC | 集成电路 | BCX19LT1G | AUXILIARY COMPOSITE OUTPUT The auxiliary port includes a composite video |
| 48A | (2) | FAIRCHILD | QFN | 06+ | TI warrants performance of its semiconductor products and related softwar |
| 48B | (1) | TI | 04+ | To blink LEDs at periods greater than 1.6 second the bus master (MCU, MP | |
| 48C | (43) | SOP-8 | CHS=0,BAL=11111 Vin = 1Vrms Vo=0.5Vrms BW=400Hz to 30kHz Vin=1Vrms BW | ||
| 48D | (13) | 2008 | tPLDhOutput enable time3⋅T + tPD4⋅T + tPDnsT=CLK period &nbs | ||
| 48E | (2) | Relative accuracy g0 19% error maximum (DAC0808) Full scale current match | |||
| 48F | (5) | SOP8 | The FLASH370i family can be configured to operate in both 3.3V and 5.0V s | ||
| 48H | (3) | N/A | N/A | N/A | InternationalAirportIndustrialPark • MailingAddress:POBox11400 R |
| 48I | (18) | 05+ | QFP | Conexant products are not intended for use in medical, life saving or lif | |
| 48J | (1) | TI | 03+ | BIBLIOGRAPHY 1. Application Note 1005: Operational Consid | |
| 48K | (2) | This heading on a data sheet indicates that the device is in sampl | |||
| 48L | (39) | OSE | SSOP48 | 07+ | (11) Soldering condition Solder at 260C or less for no more than |
| 48M | (10) | TOSHIBA | 01+ | TO263-2脚半 | DESCRIPTION The 74AC138 is an advanced high-speed CMOS 3 TO 8 LINE DEC |
| 48N | (3) | MOT | DIP8 | 07+ | Edition 01.2001 Published by Infineon AG , Marketing-Communication, Bal |
| 48P | (6) | IBM | 05+ | • VDD : 2.5V 0.2V, VDDQ : 2.5V 0.2V for DDR333 • VDD : 2.6V | |
| 48R | (7) | Hynix HYMD264646A(L)8-M/K/H/L series incorporates SPD(serial presence dete | |||
| 48S | (37) | MOT | TQFP/100 | The control register sets the mode and signal direction for the three 8-b | |
| 48T | (10) | ST | DIP | 4096 bits of read/write nonvolatile (NV) memory organized as 16 pages of | |
| 48V | (6) | N/A | 5X7保险管 | STANDARD DEFINITION MODE Hue Accuracy Color Saturation Acc | |
| 48W | (1) | AZN | 04+ | QFN-M10P | The total thermal resistance from junction to ambient can be as low as 4 |
| 48Z | (5) | ST | The design of the Ballast control portion of the circuit has been accompl | ||
| 4-9 | (4) | Transmit alarm detectors: C Loss of Transmit Clock (TLOC) C Transmit Sho | |||
| 49- | (7) | N/A | PQFP-208 | 99 | Two communication ports are provided, a 1-Wire and a 3-wire port. The adva |
| 49. | (7) | TXC | These quad single-pole single-throw switches are designed for a wide va | ||
| 49/ | (9) | KONY | 01+ | Drain-Source Voltage Gate-to-Source Voltage Continuous Drain Cur | |
| 490 | (67) | INFINEON | 01+ | BCX53-16,115 | For answers to technical questions, AMD provides a toll-free number for |
| 491 | (62) | CEM | SOP-8 | 04+ | At each input-line/product-term intersection there is an EEPROM memory |
| 492 | (55) | FAIRCHILD | SOP8 | 02+/04+ | Three Independent Channels PCI Memory Controller Interfac |
| 493 | (62) | IC | 集成电路 | BD13916STU | A 8051 standard pin is a pseudo open drain pin. It can sink at least 4mA |
| 494 | (32) | MOT | SOP-28 | 99+ | Systems calibrations Electronics level settings Mechanical Trimmers® |
| 495 | (30) | NS | 522 | A stereo 24-bit multi-bit sigma delta ADC is used with a four stereo chan | |
| 496 | (15) | IC | 集成电路 | BD676A | Additional features of the Cypress PALCE22V10 include a synchronous prese |
| 497 | (10) | TRIG | PLCC | The CZ80CPU cores functionality was verified by means of a proprietary har | |
| 498 | (15) | The device contains two operational amplifiers and a precision shunt re | |||
| 499 | (131) | AMP/TYCO | 9745+ | BENEFITS 4 lines low-pass-filter High efficiency in EMI filt | |
| 49A | (1) | FAIRCHILD | QFN | 06+ | Specifications are production tested at TA = +25C. Limits over temperature |
| 49B | (6) | NSC | O7+ | PG and PG shown in Output level versus Input Level are given by , | |
| 49C | (27) | WIN | 06+ | Glueless Interface Between the Peripheral Component Interconnect (PCI) Bu | |
| 49E | (1) | Panasonic | SOP14S | 2007+ | The IRPT50 51A power assembly (figure 1) consists of input rectif |
| 49F | (75) | IDT | 7.2mm | 99 | Ringing is applied to the line by disconnecting pin 8, RF, from pin 9, RV, |
| 49G | (28) | PHI | SOP20W | 07+ | The XC2164 series are high frequency, low current consumption CMOS ICs wi |
| 49H | (2) | NEC | QFP-44 | The QUICC is 32-bit controller that is an extension of other members of t | |
| 49L | (51) | SST | 03+ | Hynix HYMD232G726B(L)8-M/K/H/L series incorporates SPD(serial presence det | |
| 49M | (26) | JUNG-KUN | Item Repetitive Peak Off-State Voltage R.M.S. On-State Current | ||
| 49P | (2) | 2. Tolerance on the true position of the leads is 0.065 mm maximum. 3. P | |||
| 49S | (50) | PHILIPS | 1990 | SMD | The CY7C133/143 has a flow-through architecture that facili- tates repeat |
| 49U | (10) | CHIP ENABLE The CE input is the device selection control. When the device | |||
| 49W | (3) | AZN | 04+ | QFN-M10P | The 49WZ079 microcontroller features a direct connection to off-chip memo |
| 4A | (1) | For packing material that is returned to us unsorted or which we are no | |||
| 4A0 | (7) | TSSOP-8 | The V62C518256 is a 262,144-bit static random access memory orga | ||
| 4A1 | (6) | AMTRON | 0 | The bi-polar long-term timer U6046B is designed to automatically limit th | |
| 4A2 | (9) | HIT | DO-35 | 05+ | Each channel is equipped with a programmable Vce monitoring function for |
| 4A3 | (3) | 400 | MICROCHIP | 99+ | Note 1: Absolute Maximum Ratings are those values beyond which the safet |
| 4A4 | (1) | N/A | N/A | N/A | General description Quad channel Low-Side Switch in Smart Power Technolo |
| 4A7 | (2) | 04+ | QFN-M16P | IEEE 1149.1 (JTAG) Compliant Bus LVDS Signaling Low | |
| 4A9 | (1) | 1. Renesas Technology Corp. puts the maximum effort into making semicondu | |||
| 4AA | (3) | 333 | A common ground is required between the input and the output voltages. Th | ||
| 4AB | (1) | MICROCHIP | USOP-8P | 6+ | FRF = 915 MHz, PA is matched into 50 Ω FRF = 915 MHz, PA is matche |
| 4AC | (14) | N/A | N/A | Under-Voltage Lockout An under-voltage lockout circuit holds the outputs | |
| 4AD | (1) | AD | SOT23 | 6+ | Function Amplifier 1 - Input 2 Amplifier 1 - Input 1 Analog gro |
| 4AE | (2) | This IC is intended for two-way asynchronous communication between data | |||
| 4AF | (1) | tLOW Low Period of SCL Clock tHIGH High Period of SCL Clock tSU;STA Setu | |||
| 4AJ | (1) | ATMEL | MODULE | N/A | The DDU4C relies on a stable power supply to produce repeatable delays wi |
| 4AK | (14) | Hitachi | The SDRAM provides for programmable READ or WRITE burst lengths o | ||
| 4AM | (7) | HIT | TEST LEVELS 1. Production test at room temperature and nominal supply vol | ||
| 4AO | (1) | Hynix HYMD264726B(L)8J-J series incorporates SPD(serial presence detect). | |||
| 4AP | (1) | N/A | Unless otherwise specified, the following specifications apply for AGND = | ||
| 4AR | (1) | New techniques such as Wavelength Division Multiplexing (WDM) further inc | |||
| 4AS | (1) | There are three global OLMC configuration modes possible: simple, comple | |||
| 4AT | (4) | AMTRON | 03+ | The sensor outputs raw Bayer colorized data to the STV0974 companion mo | |
| 4AV | (1) | The devices low VCC detection circuitry protects the users system from | |||
| 4B- | (1) | ||||
| 4B0 | (1) | HARRIS | 00+ | DIP-8 | † Package drawings, standard packing quantities, thermal data, symb |
| 4B1 | (3) | HIT | 05+ | The q denotes the specifications which apply over the full operating temp | |
| 4B2 | (3) | HIT | DO-35 | 05+ | This fully integrated PLL transmitter allows particularly simple, low-cos |
| 4B3 | (1) | HIT | DO-35 | 05+ | Very Low Dropout Voltage Guaranteed 150mA Output Accurate to within 3 |
| 4B4 | (1) | TOS | DIP-4 | Extended data out does not place the data in / data out pins (DQs) into t | |
| 4B5 | (1) | 718 | 单排 | 07 | FC-AL Features In addition to the high-perfor- mance architecture, Ta |
| 4B8 | (1) | ||||
| 4BA | (3) | These dual P-Channel logic level enhancement mode MOSFET are produced u | |||
| 4BC | (1) | The VP5313/VP5513 converts digital Y Cr Cb data into analog PAL | |||
| 4BR | (1) | QFN | The frequency of oscillation of a quartz crystal is determined by its c | ||
| 4BT | (4) | PLCC | 04+ | For the most current package and ordering information see the Package Opt | |
| 4BY | (2) | BGA | 01+ | The HYM72V64736T8 Series are 64Mx72bits ECC Synchronous DRAM Modules. The | |
| 4C- | (3) | IC | SOP | or 18-bit output bus. The Bus Size Select pin (BSS) determines the desire | |
| 4C0 | (10) | N/A | SONY | 04+ | Four 8-Bit Voltage Output DACs 5-V Single-Supply Operation Serial Interf |
| 4C1 | (14) | HIT | DO-35 | 05+ | The ADR380 and ADR381 are precision 2.048 V and 2.500 V band gap voltage |
| 4C2 | (6) | N/A | TSSOP-38 | The 4C2973-26 is capable of driving 50Ω transmission lines on the i | |
| 4C3 | (1) | HIT | DO-35 | 05+ | When CS is high, or UB and LB are high, the device enters standby mode: t |
| 4C4 | (3) | MT | SOJ20 | 2007+ | A random read requires a dummy byte write sequence to load in the data wo |
| 4C5 | (2) | Endurance 93AA461M1M25C, Vcc = 5.0V, Block Mode 93AA56/66 | |||
| 4C8 | (8) | IIT | CPGA | 07+ | signal processing, and are commonly used in digital filters and Fourier |
| 4C9 | (1) | Ultrasonically bonded leads and controlled die mount techniques are util | |||
| 4CC | (5) | Ratio of output level with 1-kHz full-scale sine wave input, to the outpu | |||
| 4CD | (3) | ALCATEL | PLCC44 | 06+ | To set the new VTRIP voltage, apply the desired VTRIP threshold voltage |
| 4CE | (1) | DIP | • 13 I/O pins with individual direction control • High curre | ||
| 4CI | (1) | • Two standard 16-bit timer/counters • 512 8 RAM, expandable | |||
| 4CK | (1) | SOP8 | Note 3 These specifications apply for VS e g15V and 0 C s TA s a 70 C VOS | ||
| 4CM | (3) | SOP16 | † Stresses beyond those listed under absolute maximum ratings may c | ||
| 4CN | (2) | 54 | NS | Automatic mode transition of constant-frequency synchronous rectification | |
| 4CT | (1) | In addition, the 4CTI has two software selectable modes of power reducti | |||
| 4CV | (1) | The 80C186XL provides an on-chip clock generator for both internal and e | |||
| 4CX | (1) | The 4CX250B signal pin assignments and functional pin descriptions are f | |||
| 4CY | (1) | MOT | PLCC44 | 06+ | The host system can detect whether a program or erase operation is comp |
| 4-D | (1) | ISSI reserves the right to make changes to its products at any time witho | |||
| 4D- | (2) | LTI | SMD | 2008 | Digital logic input used to select charge pump current. This pin has an in |
| 4D0 | (2) | 1. Test conditions unless otherwise noted: 25 C, Vsupply = +8V, in tuned | |||
| 4D2 | (4) | NEC | 86 | 3. JA is measured in free air with the component mounted on a high effect | |
| 4D4 | (1) | ||||
| 4D8 | (1) | ATGT | 08+ | Notes: 1. Derate linearly as shown in Figure 4. 2. Drive currents betw | |
| 4D9 | (1) | Panasonic | SOP14S | 2007+ | Industry's first TotalCMOS™ PLD - both CMOS design and process te |
| 4DB | (2) | Serial Data Setup Time CLK Pulsewidth Serial Data Hold Time CLK Pulse S | |||
| 4DC | (3) | DC PERFORMANCE(4) Open-Loop Voltage Gain (AOL) Input Offset Voltage & | |||
| 4DF | (18) | TOKO | SOT | 05+ | *There is also an option for anAnti Reflection Coating. This will remove |
| 4DI | (2) | FUJI | SOP | Each of the 8-bit planes has separate serial write and read ports. These | |
| 4DJ | (1) | N/A | SOP- 8 | The ratio of the voltage divider R10/R11 is fixing a voltage level thres | |
| 4DM | (2) | Note 3. These parameters, although guaranteed over the recommended operat | |||
| 4DN | (1) | N/A | SOP8 | N/A | |
| 4DP | (5) | 07+ | The FAN1951 offers a logic level enable pin and an error flag outp | ||
| 4DR | (7) | Changes or storage to the EEPROM memory cells must allow for a 2 second | |||
| 4DT | (2) | Pb−Free Packages are Available No Auxiliary Winding Operation Auto | |||
| 4DW | (2) | TQFP100 | Dual pins: OUTPUTA, OUTPUTB, PVDDA1 and PVDDB1 must have both pins connec | ||
| 4DX | (1) | Four independent 128-bit wide internal data buses, each con- necting to | |||
| 4E2 | (1) | MOT | 98 | SOP | Due to a typical 20µA quiescent current and 2.5V~7V supply voltage |
| 4E3 | (3) | 2004/ | VOLTAGE OUTPUT versus APPLIED DIFFERENTIAL PRESSURE The di | ||
| 4EB | (2) | DAIKIN | 4 | TQFP | !Features 1) 4 -input 1-output switch. 2) Built-in 6dB amplifier and 75& |
| 4EW | (1) | The SMSC 4-port hub controller supports the Session Request Protocol (SRP) | |||
| 4-F | (1) | Hynix HYMD232M726A(L)8-J/M/K/H/L series is unbuffered 200-pin double data | |||
| 4F- | (1) | DUPLO | Notes: 1. Repetitive Rating : Pulse width limited by maximum junction tem | ||
| 4F0 | (1) | (3) The products described in this material are intended to be used for s | |||
| 4F2 | (5) | ARA | PLCC-80 | 9327 | • Generates 5 Regulated Voltages - Synchronous Buck PWM Cont |
| 4FC | (5) | ST | DIP-8 | making it an Ideal Device for Applications where Board Space is at a Pre | |
| 4FH | (2) | The output buffer provides a reverse-terminated volt- age output. The buf | |||
| 4FP | (1) | The ADS1610 is a high-speed, high-precision, delta- sigma (∆) ana | |||
| 4FR | (1) | converter accuracy. Linearity error is the deviation of an actual bit tr | |||
| 4FS | (1) | OmniVision Technologies, Inc. reserves the right to make changes without | |||
| 4FU | (1) | SOP | 03+ | 256-byte SecSi™ (Secured Silicon) Sector Factory locked and | |
| 4FW | (3) | 99+ | • Low ON-Resistance (100 Ohms Max.) Minimizes Distortion an | ||
| 4G0 | (1) | 三菱 | SOP | 05+ | The Advanced Interrupt Controller (AIC) controls the internal sources fro |
| 4G2 | (2) | LUCENT;MOT | 04+ | Note - If an of the identified ranges include code positions to which no | |
| 4G4 | (1) | Output Swing Includes Both Supply Rails Low Noise . . . 12 nV/Hz Typ at f | |||
| 4G7 | (1) | The Samsung M464S1724CT1 is a 16M bit x 64 Synchronous Dynamic RA | |||
| 4G9 | (3) | 2004/ | Please read rating and !CAUTION (for storage, operating, rating, | ||
| 4GB | (15) | IR | GBL | 00+ | Virtex FPGAs are SRAM-based, and are customized by loading configuration |
| 4GL | (2) | 03 | W83877ATF is made to fully comply with MicrosoftTM PC97 Hardware Design Gu | ||
| 4GT | (1) | PULSE | 05+ | SMD | Memory encompasses 4 KB of Flash for program storage, 256 bytes of SRAM |
| 4H1 | (2) | The 1.8 Volt Intel® Wireless Flash Memory (with 3 Volt I/O and SRAM) | |||
| 4H2 | (2) | Max. UnitsConditions CCCVVGS = 0V, ID = 250µA CCCV/C Refere | |||
| 4H4 | (1) | TQFP | 07+ | Of the 87 product terms, 80 are for general-purpose use for the 16 macro | |
| 4H5 | (1) | N/A | Absolute Maximum Ratings are those values beyond which damage to the devi | ||
| 4H9 | (1) | 04+ | The HS-2870 Series of quartz crystal oscillators provide MECL 10K and 10K | ||
| 4HC | (1) | These circuits depend upon the use of two diodes having matched Vf chara | |||
| 4HK | (1) | Literature Fulfillment: Literature Distribution Center for ON Semi | |||
| 4HL | (3) | Sirenza Microdevices SVG-2066 is an IC based 6-bit digi- tal 31.5dB range | |||
| 4HR | (1) | 05+ | SMD | The transmitter converts electrical PECL compatible serial data (TD and | |
| 4HS | (2) | CHINA | 04+ | The MSM5117800F is a 2,097,152-word 8-bit dynamic RAM fabricated in Oki | |
| 4HT | (1) | Hynix HYMD532M646(L)6-K/H/L series is designed for high speed of up to 133 | |||
| 4-I | (1) | OKI | SMD | 1996 | Using this configuration, the device will support SVHS mode for four enco |
| 4I1 | (1) | • Fast Page Mode Access Cycle • TTL compatible inputs and o | |||
| 4I8 | (1) | - PMOS open drain output for control of the charge control MOSFET | |||
| 4IB | (1) | IBM | 06+ | NOTES 1Oversampling disabled. Static DAC performance will be improved wi | |
| 4IJ | (1) | (*) CPD is defined as the value of the ICs internal equivalent capacitanc | |||
| 4IK | (1) | DIGITAL INPUT CURRENT Input High Current, IIH Input Low Cu | |||
| 4J3 | (1) | ANM | 04+ | Speed grade update to preliminary status, Power-on specification and Cloc | |
| 4J7 | (1) | Write All (WRALL) The WRALL instruction is valid only when the Protect R | |||
| 4JR | (1) | Note 1: All parameters specified over standard operating conditions unles | |||
| 4K2 | (2) | Assuming that an output load resistor of 75 Ω is connected between | |||
| 4K3 | (3) | The sealed modules offer a metal baseplate for improved thermal performan | |||
| 4K7 | (3) | The MAX4364/MAX4365 are bridged audio power amplifiers intended for porta | |||
| 4K8 | (1) | The Analog System is composed of 12 configurable blocks, each comprised | |||
| 4K9 | (1) | The EWEN/EWDS instruction will enable or disable the programming capabili | |||
| 4KN | (1) | MORIYAMA | PDIP64 | 99+ | Pin 10 is the clamp comparator output pin. A capacitance of appro |
| 4KV | (5) | WM | Y5V | 05+ | The MAX828 and MAX829 are CMOS charge pump voltage inverters that |
| 4-L | (2) | JAT | SOT | 04+ | 15) Sweep the power supply to 5.5V. Verify that the LED module rem |
| 4L- | (16) | SIEMENS | SOP28 | 04+ | On receipt of PWM signal start instruction, turn-on signal for for |
| 4L0 | (15) | MICROCHIP | USOP-8P | 6+ | − Active Mode: 200 µA at 1 MHz, 2.2 V − Standby Mode: 0 |
| 4L1 | (10) | QFP | RS is the parasitic series resistance of the diode, the sum of the bondw | ||
| 4L2 | (2) | MICROCHIP | 05+ | USOP-8P | SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - |
| 4L3 | (1) | 3900 | MICROCHIP | 99+ | The DS1254 executes a read cycle whenever WE is inactive (high) and CE is |
| 4L4 | (1) | POW | TO-220 | 0728vgc+ | The 318 encoders are a series of CMOS LSIs for remote control system app |
| 4L5 | (1) | Power Thyristor Module AK25GB series are designed for various rectifier c | |||
| 4L8 | (1) | MICROCHIP | 05+ | USOP-8P | Current Settling Time, Clocked Mode Current Settling Time, Clocked Mode |
| 4LB | (1) | 340 | MICROCHIP | 99+ | The HSMx-L640 is a Chip LED with an integrated lens. The lens concentr |
| 4LC | (10) | MT | All outputs skew <100 ps typical (250 max.) 15- to 80-MHz output opera | ||
| 4LI | (1) | TSSOP-8 | 135-mΩ -Maximum (5-V Input) High-Side MOSFET Switch 500 mA Continu | ||
| 4LM | (1) | ST | DIP-8 | To operate a port as a 1394b bilingual port, the speed/mode selections te | |
| 4LN | (1) | TIMER PINCCTIMING CONTROL Internal Oscillator Default Frequency, & | |||
| 4LP | (1) | Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds300C ( | |||
| 4LS | (2) | ECOS1JA122AA ECOS1JA152AA ECOS1JA182AA ECOS1JA681BL ECOS1JA681BA ECOS | |||
| 4LV | (1) | ||||
| 4LW | (2) | ST | O7+ | Please read the General Operating Considerations sec- tion, which | |
| 4-M | (1) | The 82078 Product Family brings a set of enhanced floppy disk controllers | |||
| 4M- | (1) | ||||
| 4M0 | (1) | EE | SOP-16 | 08+ | The PWR5104 and PWR5105 offer respectively 12VDC and 15VDC outputs of r |
| 4M1 | (2) | BT | SOJ-40 | 08+ | Minimum time between read command (i.e., a write to Communication Regist |
| 4M3 | (2) | Configured as an 8-Port M-LVDS Repeater − SN65MLVD128 2 LVTTL Rece | |||
| 4M6 | (1) | FEATURES • Normally Open, Single Pole Single Throw Operation ̶ | |||
| 4M7 | (2) | NOTES: 1. For conditions shown as Max. or Min., use appropriate value sp | |||
| 4MA | (1) | ||||
| 4MB | (12) | FUJI | s GENERAL DESCRIPTION 4MBI100T-060 is an eight channel electronic | ||
| 4MC | (8) | NIPPON | 06+ | • N-to-1 PAL Conversion Utility XEPLD automatically combine | |
| 4MG | (1) | SAMSUNG | SOP72 | 00+ | Collector-to-Emitter Breakdown Voltage Continuous Collector Current Co |
| 4MH | (5) | When ACK is asserted and JAM is HIGH, an active IMR+ device is in a col | |||
| 4MM | (2) | N/A | Thermal Design The IRU1261 incorporates an internal thermal shutdown tha | ||
| 4MN | (2) | including Strike Voltage Breakdown test, Endurance Conditioning,Temperat | |||
| 4MP | (1) | The CS4344 family is based on a fourth order multi-bit delta-sigma modula | |||
| 4MS | (1) | The LPC47M14x has incorporated the following Super I/O components: a paral | |||
| 4MX | (3) | +5V main power supply Back-up power supply (back-up capacitor connected) | |||
| 4N- | (1) | • Input voltage range: 2.25V to 5.5V • Stable with ceramic ou | |||
| 4N0 | (3) | MOT | 06+ | 500 | Port 2: Port 2 is an 8-bit I/O port with a user-configurable output type. |
| 4N1 | (4) | ON | The following table lists the conditions that cause the fault lamp driver | ||
| 4N2 | (255) | Fairchi | 05+ | VBIAS (VCC, VBS, VDD) = 15V, TA = 25C and VSS = COM unless otherwise speci | |
| 4N3 | (300) | Fairchi | 05+ | The 82078 Product Family brings a set of enhanced floppy disk controllers | |
| 4N4 | (24) | FATRCHILD | N/A | 0505+ | The CA3094 offers a unique combination of characteristics that suit it |
| 4N5 | (12) | PHI | DIP | 91+ | The internal circuit is composed of 3 stages including buffer output, w |
| 4N6 | (3) | UTC | TO-220F | 08+ | Standard Definition Programmable Features 16 Oversampling |
| 4N7 | (6) | Empty or Full Fault Flag: empty Fault is updated on the rising edge of CK | |||
| 4N8 | (2) | ST | TO-220 | • Super bright LED for optical fiber communication • High acc | |
| 4N9 | (3) | IR | 038* | The IRU1010-18 is a low dropout three-terminal fixed out- put regulator w | |
| 4NC | (1) | Selects Positive or Negative Edge Control and High or Low output drive st | |||
| 4NE | (1) | Initial issue. 1. Note 1 ( Program/Erase Characteristics) is added( page | |||
| 4NF | (2) | Boost converter with a 2A, 0.18Ω switch Boost output voltage adju | |||
| 4NI | (1) | The 329C/W for the SC-74 package assumes the use of the recommend | |||
| 4NK | (1) | The TLE 6208-6 G is a fully protected Hex-Half-Bridge-Driver designed spec | |||
| 4NQ | (1) | 48 | FAIRCHIL | 04+ | The Hyundai HYM71V75S3201 N-Series are 32Mx72bits ECC Synchronous DRAM Mod |
| 4O6 | (1) | Panasonic | SOP14S | 2007+ | The output drivers in the HIP6601B, HIP6603B and HIP6604B have the capa |
| 4P- | (1) | HAR | 99+ | PLCC-28P | |
| 4P0 | (7) | N/A | TSSOP8 | 5.2.4 Control of Transceiver Chip The ST20196 runs the firmware controll | |
| 4P1 | (2) | MACOM | 1210 | CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic ch | |
| 4P4 | (2) | USA | 04+ | Radiation Hardened up to 1 x 106 Rads (Si) Single Event Burnout (SEB) H | |
| 4P5 | (1) | For a DAC, linearity is measured between zero-input code (all inputs 0) a | |||
| 4P7 | (3) | The ES3986 digital-audio processor chip is ESS Technologys highly integra | |||
| 4PC | (4) | Through the product term allocator, software automatically distributes pr | |||
| 4PH | (3) | MICROWAVE | 1210 | 05+ | HEDS-5500/5600 and HEDM- 5500/ 5600 are two square waves in quadratur |
| 4PI | (5) | Notes: 1. All dimensions are in millimeters (inches). 2. Tolerance is | |||
| 4PR | (1) | * This device is protected by U.S. patent numbers 4,631,603, 4,577,216, a | |||
| 4PS | (4) | A | 07+ | The circuit board used in the final application should use RF circuit des | |
| 4PT | (1) | HY57V561620B-I is offering fully synchronous operation referenced to a pos | |||
| 4PZ | (1) | - Low voltage low power architecture including internal voltage r | |||
| 4Q0 | (1) | AD | 2007 | Wichtige Hinweise! Mit den Angaben werden die Bauelemente spezifiziert, | |
| 4QA | (1) | 1000 | PANASONIC | For the purposes of simplification, the following descrip- tions will ass | |
| 4R0 | (4) | FUJITSU | 06+ | Highly Integrated transmitter-receiver for 125kHz ASK transponders Parall | |
| 4R1 | (2) | FUJI | 03+ | NOTES : 1. In case of 40MHz Frequency, CL1 can be supported. 2. Samsung | |
| 4R3 | (12) | N/A | 3. Low duty cycle pulse techniques are used during testing to maintain th | ||
| 4R6 | (15) | FUJI | 03+ | DCLK Edge Select, Double Data Rate Enable and Serial Data Input. This i | |
| 4R7 | (1) | NEC | SMC | The HYM72V64656T8 H-series are gold plated socket type Dual In-line Memory | |
| 4RC | (1) | IR | TO-252 | 02+ | The TLV2252/4 also make great upgrades to the TLV2322/4 in standard desig |
| 4RD | (2) | The S52xxM is a u-cap 150mA linear voltage regulator in the SOT-25 packag | |||
| 4RE | (2) | Receive data. These outputs carry 10-bit parallel data output from the tr | |||
| 4RV | (1) | muRata | SMD | NOTES: 1. "H" = VIH, "L" = VIL, "X" = Don' | |
| 4-S | (3) | SIEMENS | PGA- | The PALCE29MA16 uses the familiar sum-of-products (AND-OR) structure, a | |
| 4S- | (1) | The VRE3041 is recommended for use as a reference for 14, 16, or 18 bit d | |||
| 4S1 | (7) | Notes: 1. Test conditions assume signal transition times of 2 ns or less | |||
| 4S2 | (2) | It is a single-pin crystal oscillator, operating at the series resonant | |||
| 4S3 | (6) | FAIRCHILD | 05/06+ | DESCRIPTION M63800FP is a seven-circuit output-sourcing Darlington tran | |
| 4S5 | (1) | • Guaranteed temperature performance, C20 to 70 C C C | |||
| 4S6 | (2) | Vcc = 2.3V~2.7V, TA= 0C to 70C/ -40C to 85C, unless otherwise specified & | |||
| 4S9 | (12) | The MAX3277 is identical to the MAX3275, but with the output polarities i | |||
| 4SC | (1) | The 4SC1078 is a small form factor infrared (IR) transceiver module t | |||
| 4SD | (1) | The first stage (the data encoder) implements Manchester (BiPhase) or M | |||
| 4SE | (4) | SANYO | 2008+ | • THE EASE OF USE AND FAST SYSTEM SPEED OF PLDs WITH THE DEN | |
| 4SG | (1) | IC=10uA IC=100mA IE=10uA VCB=60V VCB=60V, VEB(off)=3V VEB=3V IC=150m | |||
| 4SL | (1) | SONY | 06+ | 500 | Voltage gain Upper cut-off frequency (Fig. 3) Lower cut-off frequency |
| 4SN | (1) | (LX)high-frequency | The output of the mixer is then fed to the loop amplifier around | ||
| 4SP | (14) | SANYO | 2008+ | 44 input lines: • 24 input lines carry the True and Complement of | |
| 4SS | (1) | a. Absolute maximum continuous ratings are those maximum values beyond wh | |||
| 4ST | (3) | MA/COM | 99+ | SOT23 | The Hyundai HYM71V75S1601 H-Series are 16Mx72bits ECC Synchronous DRAM Mod |
| 4SV | (6) | SANYO | 2008+ | 1. Intersil Pb-free products employ special Pb-free material sets; | |
| 4SW | (3) | The Hynix 4SW150M(150UF4V) Series are Dual In-line Memory Modules s | |||
| 4SX | (1) | N/A | The receive ATM clock from the ATM layer <= 40 MHz. The start of cell | ||
| 4SY | (1) | This CMOS device is designed for switching PCM-encoded voice or da | |||
| 4T2 | (1) | TSOP8S | 2007+ | Installations intended to meet UL and CUL requirements must follow the ins | |
| 4T6 | (4) | The ATF1502ASVs logic structure is designed to efficiently support all ty | |||
| 4TB | (1) | The devices also have 64 I/O cells, each of which is directly connected | |||
| 4TE | (1) | The oscillator signal from the core drives an output buffer amplifier. Th | |||
| 4TP | (25) | Notes: 1. Stresses above those listed under Absolute Maximum Ratings may | |||
| 4U2 | (2) | RF PLL Enable (enable when high, power down when low). Controls the RF PL | |||
| 4U6 | (15) | High performance and low cost solution Synchronous operation with high ef | |||
| 4U7 | (8) | The RF5189 is a linear, medium-power, high-efficiency amplifier IC desi | |||
| 4UF | (2) | The 3-state output buffers are controlled by a 2-input NOR gate. When b | |||
| 4UH | (2) | This tables show the pin assignments of the RDRAM package from the top-si | |||
| 4UP | (2) | This pin is the reference select pin and the external reference input. | |||
| 4V0 | (1) | NOVATEK | QFP | 06+ | An external resistor between Vin and this pin adjusts the amplitude of th |
| 4V1 | (2) | NICHI | This input is used to control the motion of the motor. Outputs will cha | ||
| 4V2 | (2) | PHILIPS | SOT23 | This document is a general product description and is subject to change wi | |
| 4V3 | (1) | KEY FEATURES 350 MHz High Performance Blackfin Processor Core Two 16-Bi | |||
| 4V4 | (1) | PANASONIC | POWER SUPPLIES As shown in Figure 6 which is a complete schematic of the | ||
| 4V6 | (2) | N/A | B | Port 0: Port 0 is an 8-bit open-drain, bidirectional I/O port. Port 0 pin | |
| 4VA | (1) | The MAX6673 has a push-pull output. The rise and fall times of the MAX667 | |||
| 4VP | (1) | MICROCHIP | QFN-8P小体 | 6+ | Electrically Isolated Top Tab or Z Tab SIP Extremely Low Dropout Voltage |
| 4W0 | (2) | ALPHA | SOP-8 | 04+ | The input/output pins (I/O1 through I/O16) are placed in a high-impedan |
| 4W1 | (2) | skyworks | 96+ | Deselected, Power-down Deselected, Power-down Deselected, Power-down | |
| 4W2 | (2) | SECON | Module | 00+ | With the XC9105 series, the CE pin also serves as a PWM/PFM switching pin. |
| 4W3 | (1) | TOSHIBA | TSSOP-8 | 07+ | • 24-Bit SPI for Control and Fault Reporting, 3.3 V/5.0 V Compatible |
| 4W5 | (2) | TOSHIBA | SSOP8 | 03+ | The Hynix HY5V26C(L/S)F is a 134,217,728bit CMOS Synchronous DRAM, ideally |
| 4W6 | (3) | TOSH | SSOP8 | The HY6264A is a high-speed, low power and 8,192x8-bits CMOS static RAM f | |
| 4WA | (1) | The HYM5321600A M-Series is a 16Mx32-bit Fast Page mode CMOS DRAM module | |||
| 4X/ | (1) | Each I/O macrocell, as shown in Figure 4, consists of a D- type flip-flop | |||
| 4X0 | (1) | Samsung makes no warranty, representation, or guarantee regarding the sui | |||
| 4X1 | (4) | SOJ42 | 00+ | The MAX8546 operates at 300kHz. The MAX8546 is compatible with low-cost al | |
| 4X2 | (1) | ||||
| 4X3 | (4) | Applicable printer Package type Dimension (WxDxH) mm Configuration Cha | |||
| 4X4 | (6) | Panasonic | 4x4-200R | 05+ | C Supports both Firmware Hub (FWH) and LPC Memory Read and Write C |
| 4X5 | (1) | NEW Fully Plastic TO-220 for HIGH VOLTAGE APPLICATIONS NPN MONOLITHIC | |||
| 4X9 | (1) | The bq2060 SBS-Compliant Gas Gauge IC for battery pack or in-system inst | |||
| 4XL | (1) | ||||
| 4XR | (1) | ||||
| 4XS | (1) | PLCC | 04+ | The specification of 4XSX1B4911A is identical to the specification for 4X | |
| 4Y4 | (1) | Notes : 1. In case of module timing, command cycles delayed 1CLK with resp | |||
| 4YC | (1) | Data transfer starts with the falling edge of the CS signal. Data must ap | |||
| 4YP | (1) | The 74ALVCH16841 has two 10-bit D-type latch featuring separate D-type i | |||
| 4ZI | (1) | MICROCHIP | QFN-8P小体 | 6+ | These Intersil RS-485/RS-422 devices are ESD protected, fractional unit l |
| 4ZP | (1) | MICROCHIP | QFN-8P | 07+ | Because the PMOS device behaves as a low-value resistor, the dropout volt |
| 4ZS | (1) | MICROCHIP | QFN-8P小体 | 6+ | Note 2: Absolute maximum ratings are those values beyond which damage to |
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