| Mfg | pack | D/C | Descrpion | ||
| 7.0 | (5) | To set the new VTRIP voltage, start by setting the WEL bit in the contr | |||
| 7.1 | (6) | crystal | 晶振 | 晶振 | 6. PD = CPD VCC2 fi + Ó (CL VCC2 fo) + Ó (VL2/RL) (Duty Fact |
| 7.2 | (4) | ||||
| 7.3 | (12) | COMCLOK | 晶振 | 96+ | The control inputs UC and DC are active low inputs which interpret input |
| 7.4 | (4) | Thermocompression bonding is recommended. Welding or conductive epoxy ma | |||
| 7.5 | (10) | NATIONAL | 2008 | These numbers are measured with the load circuit of Figure 2 and d | |
| 7.6 | (5) | KDS | Output voltage 5 V 2% Very low current consumption Power-on and unde | ||
| 7.7 | (1) | NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 i | |||
| 7.8 | (1) | NULL | Module | N/A | The MAX104 features an on-board +2.5V precision bandgap reference, which |
| 7.9 | (5) | MOT | 99 | These pins form a 5´8 keyboard matrix which can perform keyboard i | |
| 7-0 | (9) | COP8™, MICROWIRE/PLUS™, and WATCHDOG™ are trademarks of | |||
| 70- | (21) | The FM809/810 are supervisor circuits that monitor power supply or othe | |||
| 70. | (1) | ||||
| 70/ | (1) | Alphatec | PLCC-68P | 01+ | These low current seven segment displays are designed for applica- tions |
| 700 | (454) | NS | O7+ | For the ADS-944, offset adjusting is normally accomplished at the point | |
| 701 | (203) | SANWA | QFP | 07+ | The 701A22532 adds a second level hiccup mode currentsensethreshold,bi-d |
| 702 | (210) | IDT | LQFP80 | Interrupt. This open drain weak pullup, output signal is used to inform th | |
| 703 | (90) | NS | DIP-16 | 98+ | Firmware implements the full IEEE 802.11 Wireless LAN MAC protocol. It |
| 704 | (43) | Molex | connector | 06+ | Specifically Designed for Battery Powered Applications 1.0 - 3.0 Volts an |
| 705 | (249) | MOLEX | 07 | 1041 | Introduction The IRU1050 adjustable Low Dropout (LDO) regulator is a thr |
| 706 | (64) | IC | 集成电路 | E-L4973V5.1 | The TSH300 is a voltage feedback amplifier featuring ultra-low input vo |
| 707 | (32) | 2008 | All rights reserved. No part of this publication may be reproduced, stored | ||
| 708 | (69) | IC | 集成电路 | E-L5973AD | Device Bias Operating Voltage Operating Current 500 MHz Gain Noise Fi |
| 709 | (60) | R | SMD | 07+ | (709-0010A EV kit, V CC = +3.0V, V GC = +2.15V, RXEN = TXEN = low, all mea |
| 70A | (51) | TDK | Advanced oxide-isolated ion-implanted Schottky TTL process Functionally | ||
| 70B | (2) | TDK | PLCC | 03+/04+ | International standard packages JEDEC TO-264, epoxy meet UL 94 V-0 fla |
| 70C | (14) | TI | SUMMARY DESCRIPTION The 70C02NL is a 16 Mbit (2Mb x8) non-volatile memo | ||
| 70D | (2) | STM | SOP-28 | 04+ | The 74ALVCH16841 has two 10-bit D-type latch featuring separate D-type i |
| 70E | (5) | IR | PowIRtab | 00+ | As shown in the functional block diagram on Page 1, the ADSP- 21262 uses |
| 70F | (12) | N/A | DC Voltage from 3.0 V to 3.6 V. VDD should be bypassed with a 0.1µ | ||
| 70G | (25) | N/A | QFP | Sony Ericsson is expected to be profitable in the second half of 2003 as | |
| 70H | (71) | DSI | n/a | UNLATCHED ADDRESS BUS: High-order 7 bits of the 24-bit system address bu | |
| 70I | (1) | NEC | 0543+ | Programmable Refresh Timer for DP84xx DRAM Controller NS32008 16 32 to D | |
| 70J | (2) | Single Supply for Read and Write: 2.7V to 3.6 (BV), 3.0 to 3.6V (LV) Fast | |||
| 70L | (5) | FAI | 5 | TO-263 | Sector Erase and Bulk Erase The Page Program (PP) instruction allows bit |
| 70M | (33) | IR | INT-A-Pak (Bridge) | 00+ | 64 positions OTP (one-time programmable)1 set-and-forget resistance &nbs |
| 70N | (11) | 220 | |||
| 70P | (5) | IBM | PGA | 04+ | Notes: 1. Due to the Cypress implementation of USB suspend mode support, |
| 70Q | (1) | 08+ | Caution: The BiCMOS inherent to this design of this component increases th | ||
| 70S | (17) | (LX)high-frequency | 1. This device series contains ESD protection and exceeds the following t | ||
| 70T | (12) | FSC | TO-252 | 03+ | SB: The voltage on SB sets the output current level at which standby mod |
| 70U | (14) | DSI | n/a | The voltage at the TOVER pin is equal to a logic-low level if the sensor | |
| 70V | (33) | QFP64 | The AME8801/8840 family of positive, linear regulators feature low quie | ||
| 70W | (2) | 05+ | QFP | (Unless otherwise specified, these specifications apply over the operatin | |
| 70Y | (2) | Buck Controller ♦ Quick-PWM with 100ns Load-Step Response ♦ | |||
| 70Z | (1) | n 832 Mbps LVDS 16-bit serializer and deserializer interface &nb | |||
| 7-1 | (66) | REL POW PCB 2P C/O 8A 24VAC FLX AgNi - RT424524 | TYCO RELAYS | 05+ | The microphone input transfers its signal to the on-chip preamplifier. An |
| 71- | (6) | AMIS | TQFP-100P | 02+ | Notes: 1. H = HIGH Voltage Level. L = LOW Voltage Level. X = Dont |
| 71. | (3) | TOYOCOM | N/A | 08+ | This pin is programmable to 24MHz or 48 MHz clock output through SMBus. |
| 71/ | (1) | The C6203 device program memory consists of two blocks, with a 256K-byte | |||
| 710 | (434) | SOP | 03+/04 | Device programming occurs by executing the program command sequence. This | |
| 711 | (88) | 98 | The 711JT is a fully integrated 10/100/1000BASE-T Gigabit Ethernet Media | ||
| 712 | (160) | IDT | DIP/28 | 07+ | The data inputs (SDIP/SDIN) and clock inputs (SCIP/SCIN)are internally te |
| 713 | (91) | 01+ | NOTES: 1. This parameter is warranted but not production tested. The pro | ||
| 714 | (116) | PHI | 96+ | TQFP-M128P | A requirement of automotive systems is steady operation over a va |
| 715 | (65) | IC | 集成电路 | EM4222V3SP3B | ACTIVE: Product device recommended for new designs. LIFEBUY: TI has annou |
| 716 | (79) | 16 way socket with standard strain relief | FRAMATOME | 05+ | The B-port drivers are Low-capacitance open collectors with controlled |
| 717 | (70) | IC | 集成电路 | EP1C6Q240C8N | A power-up clear function is supplied that forces all registered outputs |
| 718 | (16) | NEC | 9831+ | QFP | The TPS6030x charge pumps are voltage quadruplers that provide a regulate |
| 719 | (95) | 50 way right angled header with latches | FRAMATOME | 05+ | Provides up to 8K-Address Matching System Provides Glueless External-Add |
| 71A | (3) | To transfect cells in different tissue culture formats, vary the amounts | |||
| 71B | (10) | IDT | SOJ | 95+ | NOTES: 1. Measured with outputs open. 2. Refresh period is 64ms. 3. Int |
| 71C | (20) | ST | TSSOP | 07+ | A0-A11 are address inputs sampled during the ACTIVE (row-address A0-A11 |
| 71D | (1) | OUT (Pin 5): Oscillator Output. This pin can drive 5kΩ and/or 10pF | |||
| 71F | (35) | LT | SOP | N/A | 500 MSPS Maximum Update Rate DAC WCDMA ACPR C 1 Carrier: 76 dB Centered |
| 71G | (2) | 2005 | Maximum Output Current: 250 mA. Highly Accurate Output Voltage +/- 1.4% | ||
| 71H | (18) | ir | n/a | To enhance the flexibility and function of the clock synthesizer, a two-s | |
| 71J | (5) | SOP20 | 06+ | NOTES 1Tester measures code transitions by dithering the voltage of the | |
| 71K | (5) | MOT | DIP6 | ||
| 71L | (1) | Generates Programmable CPU Clock Output (50 MHz, 60 MHz, or 66 MHz) Gene | |||
| 71M | (1) | N/A | N/A | N/A | Item Average On-State Current R.M.S. On-State Current Surge On- |
| 71P | (25) | SPANSION | BGA | 05+ | The i.MX (Media Extensions) series provides a leap in performance with |
| 71R | (2) | N/A | The HCT161A/163A are programmable 4Cbit synchronous counters that | ||
| 71S | (1) | The FMS6346 provides an internal diode clamp to support AC- coupled inpu | |||
| 71T | (2) | On-chip registers can be programmed with high and low limits for the con | |||
| 71V | (151) | IDT | TQFP100 | 2007+ | These devices can be used in a wide range of digital panel meter applicat |
| 71W | (1) | SPANSION | 1500 | 06+ | This three terminal negative adjustable voltage regulator is designed to |
| 71Z | (1) | 1. Typical characteristics are at TA = 25oC. 2. These are absolute values | |||
| 7-2 | (12) | MICRO-MATCH MOW.04P | AMP | 05+ | This pin is the non-inverting analog input that trans- fers the signal t |
| 72- | (28) | 5 | AMI | 00+ | Note 2: SC70 and µDFN parts are 100% tested at TA = +25C. Limits acr |
| 72. | (1) | Notes: 1. All voltage values, except differential I/O bus voltages, are | |||
| 720 | (147) | IDT | O7+ | The PTH12020 series of non-isolated power modules offers OEM designers a | |
| 721 | (78) | 00 | |||
| 722 | (107) | INTEL | 00+ | IEEE 1149.1 (JTAG) Compliant Bus LVDS Signaling Low | |
| 723 | (120) | 2008 | Ultra low dropout voltage Guaranteed 500 mA continuous output current | ||
| 724 | (68) | IC | 集成电路 | EPM3128ATC100-5N | The 7240M integrates 64K words of on-chip memory configured as 32K words |
| 725 | (46) | ST | QFP | 06+ | Unlike masked or programmable gate arrays, which induce variable delay de |
| 726 | (50) | ECHELON | O7+ | The DS1258W 3.3V 128k x 16 Nonvolatile SRAM is a 2,097,152-bit, fully stat | |
| 727 | (38) | IC | 集成电路 | EPM7128SQI100-10 | Dimensions are in inches. Metric equivalents are given for general info |
| 728 | (49) | IC | 集成电路 | EQ50F100LR/NOPB | A 1% resistor must be connected between this pin and GND (pin 1) to set t |
| 729 | (27) | IC | 集成电路 | ES2B | 0 - 230Vdefined by external PWM control 0.75 hp (0.56 kW) nominal full lo |
| 72A | (3) | NS | SOP8 | —— | Flame retardant encapsulation Practically without epoxy run down Very |
| 72B | (1) | Feedback Voltage and Short Circuit Detection pin. It is the inverting inp | |||
| 72C | (19) | ST | TQFP | This procedure is used to set the VTRIP to a native voltage level. For | |
| 72D | (1) | N/A | 10 | Positive analog supply pins. These pins should be connected to a quiet | |
| 72E | (1) | ST | 9929+ | 32 | Program Verify Command Following byte program, the programmed byte must |
| 72F | (45) | ST | n 2-wire, SMBus 2.0 compliant, serial digital interface n 8-bit Ó | ||
| 72G | (1) | IDT | 03+ | Cycle Control Internal High Accuracy Bandgap Voltage Reference Current | |
| 72H | (20) | DSI | n/a | 6. The analog input signal is sampled on the positive-going edge | |
| 72J | (4) | MOTOROLA | 314 | Switch Enable into Heavy Load If a switch is powered-on or enabled into a | |
| 72L | (2) | BGA | An eight-bit PCM encoded digital word is received on DSTi input once durin | ||
| 72M | (1) | ||||
| 72P | (33) | ST | SOP28 | 04+ | The HY62LF16101C is a high speed, super low power and 1M bit full CMOS SR |
| 72R | (19) | 97 | Addresses are generated for the burst access as shown below, The starting | ||
| 72S | (2) | ST | QFP | 06+ | The Hynix HYM7V73AC801B H-Series are 8Mx72bits ECC Synchronous DRAM Module |
| 72T | (39) | QFP | The VSX60 Series are dual output converters with 18-36V and 36-75V input | ||
| 72V | (45) | IDT | LQFP64 | FEATURES lOptions :- 10mm lead spread - add G after part no. &n | |
| 72X | (43) | IBM | 模块 | 01+ | CAUTION: These devices are sensitive to electrostatic discharge; f |
| 7-3 | (9) | • Meets or Exceeds the Requirements of ANSI TIA/EIA-644-199 | |||
| 73- | (12) | NS | DIP-20 | 08+ | ELECTRICAL CHARACTERISTICS D.C. T amb = C40C to + 85C, VCC = 3.5V to 6.5 |
| 730 | (58) | N/A | QFP | 07+ | VCXOs are usually used as a narrowband local frequency source that is l |
| 731 | (79) | TI | DIP | 90 | Power ThyristorModule AK90GB series are designed for various rectifier ci |
| 732 | (60) | IC | 集成电路 | E-TDA2003V | During power-on, RESET is asserted when supply voltage VDD becomes higher |
| 733 | (164) | AMIS | Software and Register Compatible with SMSC's Proprietary | ||
| 734 | (57) | 3COM | PLCC | The receiver input is normally transformer-coupled to the AMI signal. The | |
| 735 | (40) | IC | 集成电路 | EVAL5973D | Note 7: Maximum ambient temperature (TA-MAX) is dependent on the maximum |
| 736 | (98) | IC | 集成电路 | EVAL6235N | Each DS1258W device is shipped from Dallas Semiconductor with its lithium |
| 737 | (43) | IC | 集成电路 | EVAL6599-200W | This procedure is used to set the VTRIP to a higher volt- age value. Fo |
| 738 | (49) | IC | 集成电路 | EVAL6926D | Logic control inputs can be driven up to +5.5V regardless of the supply v |
| 739 | (42) | Molex | 08+ | The receive (D/A) filter provides interpolation filtering on the 8 kHz sam | |
| 73A | (7) | N/A | TI | 04+ | CS: The input to the PWM, peak current, and overcurrent comparators. The |
| 73B | (2) | NULL | . | VCC = 600V, IC = 40A VGE = 15V, Rg = 5Ω, L = 200µH TJ = | |
| 73C | (6) | BGA | N/A | The 73C03 series are highly precise, low power consumption voltage detec | |
| 73D | (13) | TI | SOP-14 | 01+ | Care should also be taken in the resistor selection to ensure that the c |
| 73F | (12) | MOT | SOP | NOTE: 10EP circuits are designed to meet the DC specifications shown in t | |
| 73G | (3) | The following are trademarks of Conexant Systems, Inc.: Conexant™, | |||
| 73H | (1) | ST | 9644 | Infineon 2-Band Transformer Design Infineon 2-Band Hybrid Design B Inf | |
| 73K | (121) | TDK | PLCC28 | 03/+04+ | These N-Channel enhancement mode power field effect transistors are produ |
| 73L | (1) | The SC16C554B/554DB is a 4-channel Universal Asynchronous Receiver and T | |||
| 73M | (69) | TDK | QFP | 04+ | 3.3 Reference and Clock An internal bandgap circuit is used to generate a |
| 73N | (1) | N | Writing to the device is accomplished by taking Chip Enable 1 (CE1) LOW | ||
| 73R | (1) | 97 | Real-time clock (RTC) keeps track of hundredths of seconds, seconds, minu | ||
| 73S | (6) | TDK | new | HOTLink-II devices are ideal for a variety of applications where paralle | |
| 73T | (3) | TI | SOP8 | The device offers complete compatibility with the JEDEC single-power-supp | |
| 73U | (1) | Two analog comparators. Full duplex UART. I2C communication port. Eight | |||
| 73V | (1) | The XC5200 CLB consists of four LCs, as shown in Figure 4. Each CLB has | |||
| 73X | (2) | 02 | The ULN2001A, ULN2002A, ULN2003 and ULN2004Aare high voltage, high curr | ||
| 73Z | (1) | The thermal resistance j−T of 73Z00500 package designed for low th | |||
| 74- | (2) | tsk(p)See Figure 350 † All typical values are at VCC = 3.3 V | |||
| 74. | (1) | Notes: 1. Test conditions assume signal transition times of 2 ns or less | |||
| 740 | (273) | ST | 00+ | SOP-16 | FM Double-conversion System Integrated Second IF Filter with Software-con |
| 741 | (312) | NS/S | 89 | C High-performance 32-bit RISC Architecture C High-density | |
| 742 | (192) | WURTH | N/A | 972 | The ISSI IS41C4100 and IS41LV4100 are 1,048,576 x 4-bit high-performance |
| 743 | (98) | IC | 集成电路 | FDB045AN08A0 | 6ns rise and fall time 2 A peak output source/sink current 1.2V to 5V in |
| 744 | (124) | NS | DIP | 00+ | The CY7C133 and CY7C143 are high-speed CMOS 2K by 16 dual-port static RAM |
| 745 | (371) | IC | 集成电路 | FDC6321C | The accuracy of the DAC/reference combination is 1%. The overvoltage and |
| 746 | (132) | AMP | n/a | 97 | After a successful ATR, the Protocol and Parameter Selection (PPS) protoc |
| 747 | (390) | AMP | 0725+ | CHIP ERASE: The entire device can be erased at one time by using the 6-b | |
| 748 | (191) | IC | 集成电路 | FDG312P | The attached data sheets are provided by SAMSUNG Electronics. SAMSUNG Elec |
| 749 | (237) | IC | 集成电路 | FDG901D | Outputs are low-side, open-drain DMOS transistors with output ratings of |
| 74A | (7641) | TI | 00+ | SSOP-7.2-56P | Simplifies system and board design • Reduced I/O pin requirements |
| 74B | (178) | 270 | PHILIPS | 99+ | The HIDRV driver has a power supply, VCCQP, supplied from a 12V source a |
| 74C | (420) | TI | QFN?(RGY) | 14 | 07+/08+ | • A single chip solution integrates 100/10 Base-T fast Ethe |
| 74D | (29) | PHILIPS | SMD | OO24 | ones and six zeros switching at the input clock rate. The transmission of |
| 74E | (3) | The decoders receive data that are transmitted by an encoder and interpr | |||
| 74F | (4230) | FUJ | SMD | SMD | The RS-422 interface is an excellent choice for commu- nicating in noisy |
| 74G | (46) | MCL | 98+ | The basic unit of logic on these devices is the Generic Logic Block (GL | |
| 74H | (6971) | TI | SOP14 | 04+ | • N channel FET switches with no parasitic diode to Vcc |
| 74J | (1) | SOP | PURS: Power-Up ReSet. To reset internal circuitry at power-up; a logic 1 | ||
| 74L | (7457) | FAIRCHILD | 06/07+ | DESCRIPTION The ST3237E is a 3V to 5.5V powered EIA/ TIA-232 and V.28/ | |
| 74M | (2) | SSOP-8 | Notes: 1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS | ||
| 74N | (4) | The compensation pin is connected to the output of the error amplifi | |||
| 74O | (42) | FAIRCHILD | SOP-6 | 05+ | The LVTH241 devices are organized as two 4-bit line drivers with separa |
| 74P | (17) | 95 | DESCRIPTION The M74HC4514 is an high speed CMOS 4 LINE TO 16 LINE SEGM | ||
| 74Q | (1) | 2 | IDT | 01+ | charged with a constant current, I, until the upper switch- ing threshol |
| 74R | (3) | PHI | 95P1 | Stresses above those listed under Absolute Maximum Ratings may cause per | |
| 74S | (490) | F | 77 | DIP | How are these devices different than the other Crystal PCI audio products |
| 74T | (19) | 93 | SOP | WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (3 | |
| 74U | (2) | 98 | It is possible to connect the Data In and Data Out pins together. Howev | ||
| 74V | (1725) | STM | 04+ | FREQUENCY RESPONSE 3dB Bandwidth TEMPERATURE OUTPUT Tout | |
| 74X | (5) | FAIRCHILD | 05+ | The MAX6902 SPI™-compatible real-time clock contains a real-time clo | |
| 7-5 | (17) | The TSC80251G2D products are derivatives of the Atmel Microcontroller fami | |||
| 75- | (22) | 121 | IR | 01+ | System Reference Clock The SiW3500 chip can use either an external cryst |
| 75. | (3) | N/A | 2001 | 50 | This document is a general product description and is subject to change wi |
| 750 | (268) | N/A | N/A | 03+ | CAS Detection Early Steering (CMOS Output). Active high. This pin is the |
| 751 | (334) | N/A | N/A | N/A | Bild / Fig. 6 B6 - Sechpuls-Brckenschaltung / Six-pulse bridge circuit H |
| 752 | (64) | IC | 集成电路 | FDN372S | System oriented features for mobile, graphics and large memory systems i |
| 753 | (96) | TI | 2 | The local bus controller also generates two control signals (DEN and DT | |
| 754 | (161) | N/A | SOP8 | ||
| 755 | (72) | IC | 集成电路 | FDS6982S | The information in this document is preliminary and subject to change. Th |
| 756 | (44) | 0141+ | Advanced HEXFET® Power MOSFETs from International Rectifier utilize a | ||
| 757 | (18) | TO263 | 2. TVS devices are normally selected according to the working peak revers | ||
| 758 | (97) | N/A | PLCC-44 | 98 | The MAX2640/MAX2641 are low-cost, ultra-low-noise amplifiers designed for |
| 759 | (42) | TO263 | NOTE: Permanent device damage may occur if Absolute Maximum Ratings are e | ||
| 75A | (86) | TEXAS | DIP | Diagonal 3mm (Type 1/6) 752 (H) 582 (V) approx. 440K pixels 795 (H) | |
| 75B | (1) | NATIONAL | SOP | 99 | The MC68302 Integrated Multiprotocol Processor Users Manual describes the |
| 75C | (36) | SOP28 | The HC533, HCT533, HC563, and CD74HCT563 are high-speed Octal Transpare | ||
| 75D | (2) | Read cycle time Address access time Chip enable access time Output e | |||
| 75E | (1) | 00 | n Drive up to 4, 6, 8 or 10 white LEDs for Dual Display Backlight | ||
| 75F | (12) | LATTICE | BGA | 07+ | FUNCTIONAL DESCRIPTION The LS155 and LS156 are Dual 1-of-4 Decode |
| 75G | (5) | N/A | Figure 3 shows a typical test circuit for evaluation of the 75G6P41. This | ||
| 75H | (19) | IBM | QFP | 3.1.1 SPI bus While SSB pin is pulled to "high" or "low&qu | |
| 75I | (1) | TI | BGA | 03+ | GENERAL DESCRIPTION The hs2k219 is high speed ic types are freque |
| 75J | (3) | 1735 | FEATURES • Two 10-bit Nonvolatile DACs − INL 1 | ||
| 75K | (3) | IDT | O7+ | Die Attach Pad (DAP) is the metal contact at the bottom side, located at | |
| 75L | (93) | N/A | G760 is a single chip solution for fan speed control, packaged in a space | ||
| 75M | (1) | 1. This document may, wholly or partially, be subject to change without n | |||
| 75N | (14) | 60 | TO262 | The NetPHY™ 4LP device operates on a 3.3 V supply and offers 5 V I/ | |
| 75P | (14) | NEC | QFP | 96+ | s Flyback Operation with Quasi-Resonant Soft Switching for Low Po |
| 75Q | (3) | N/A | N/A | N/A | CT: Oscillator Timing Capacitor. (Refer to Fig. 1, Oscilla- tor Block Di |
| 75R | (1) | Differential output for the synthesizer. LVPECL interface levels. Active | |||
| 75S | (4) | IR | SMD-1 | 00+ | ON Semiconductors e2 PowerEdge family of low VCE(sat) transistors |
| 75T | (48) | DATA INPUTS/OUTPUTS: The I/O pins are used in the A/A Mux interface to in | |||
| 75U | (3) | QFP | READY: This signal can be used to extend the memory read and write pulses | ||
| 75V | (1) | Note 2: At elevated temperatures, device power dissipation must be derate | |||
| 7-6 | (13) | TI | DIP8 | 07+ | A chopper-stabilized low-drift input amplifier assures stable long-term |
| 76- | (3) | ALPS | SOP | (4) Losses that occur during charge transfer (from the co | |
| 76. | (2) | Proper and sufficient power supply bypassing is crucial to | |||
| 760 | (95) | TI | 07+ | Because the PMOS device behaves as a low-value resistor, the dropout volt | |
| 761 | (126) | ROHM | SOP-3.9-8P | 6+ | When no data transfer occurs, you can use the Powerdown state. The Seri |
| 762 | (65) | HAR | SOP-3.9-8P | 6+ | H = High Voltage Level, L = Low Voltage Level, X = Dont Care, Z = High Im |
| 763 | (182) | FUJ | SOP | 03/+04+ | Notes: Notes 1 through 6 are applicable to the Receiver Differential &nb |
| 764 | (49) | UTC | O7+ | ||
| 765 | (32) | IC | 集成电路 | FMMT449 | ALE Pulse Width ALE Rising Edge after CK1 Rising Edge (Note 2) ALE Fall |
| 766 | (218) | INTERSIL | DIP-8 | 02+ | The GMR S6 is an angle sensor based on sputtered metallic multilayer tech |
| 767 | (206) | IC | 集成电路 | FP15R12KT3 | Stresses beyond those listed under Absolute Maxi- mum Ratings may |
| 768 | (79) | IC | 集成电路 | FPF2002 | High current sink/source 25 mA/25 mA Four external interrupt pins Time |
| 769 | (23) | N/A | SOP- 8 | Word Program Operation The SST39VF160Q/VF160 are programmed on a word- | |
| 76A | (7) | TI | PLCC24 | cascading counter for n-bit synchronour application without additional | |
| 76C | (8) | HY | ISSI reserves the right to make changes to its products at any time witho | ||
| 76D | (2) | TI | 798 | The HYS64/72D32000GU and HYS64/72D64020GU are industry standard 184-pin 8 | |
| 76E | (1) | ? | SOP14 | —— | Initiating A Conversion Please refer to Figure 4. The SP8480 was de- si |
| 76F | (4) | N/A | SOP- 8 | The MAC unit comprises the main arithmetic processing unit of the DSP5630 | |
| 76G | (2) | AAL1 cell format for "Structured DS1/E1 N x 64kbps Service" as | |||
| 76H | (8) | digital or analog input Three 16-bit timer/counters Highly flexible relo | |||
| 76L | (3) | FAI | SOP-8P | 07+ | Note 2: The fOP frequency specification specifies a minimum clock period |
| 76M | (4) | 00 | This circuit uses a Darlington pair topology with resistive feedback fo | ||
| 76P | (35) | N/A | Grayhill | 05+ | Voltage Output Models Three settling times are specified to 0.01% of ful |
| 76R | (25) | MOT | DIP-14 | 08+ | The 82C37A allows an external signal to terminate an active DMA service b |
| 76S | (40) | N/A | Grayhill | 05+ | Features • IXYS advanced low Qg process • Low gate charge an |
| 76Y | (5) | The RESET pin is connected to the RST pin on the register and to the OE pi | |||
| 76Z | (3) | SPRAGUE | 88 | NOTES: (1) Test levels: (A) 100% tested at 25C. Over temperature limits b | |
| 7-7 | (7) | The 7-745129-0 is a PLL based clock generator specifically designe | |||
| 77- | (3) | FREESCALE | 05+ | PLCC44 | Chip Select Input. CS HIGH, deselects the device and the SO output pin is |
| 77. | (3) | N/A | VALPEY FISH | 04+ | NOTE: Device will meet the specifications after thermal equilibrium has b |
| 770 | (487) | LINEAR | CAN | 95+ | The PS-R11 photo switches are composed of a modulated infrared emitting d |
| 771 | (56) | 1000 | GENERAL SPECIFICATIONS Working Voltage:AxialRadial C0G50 &a | ||
| 772 | (25) | TI | 03+ | Receiver Differential Input. Input accepts AC differential signals as smal | |
| 773 | (95) | IC | 集成电路 | FQP20N06L | The adjustable version of the FAN2500/01 includes an input pin ADJ which |
| 774 | (20) | NS | LLP | 00+ | This method of determining odd / even field information provides for supe |
| 775 | (42) | VTC | SSOP20M | 2007+ | Reset: A high on this pin for two machine cycles while the oscillator is |
| 776 | (34) | IC | 集成电路 | FSA1258L8X | The 7760 can perform conversions at rates of 15, 30, 60, or 240 samples |
| 777 | (27) | TI | SOP16 | Macrocell registers can be clocked from one of several global or produc | |
| 778 | (8) | ROCKWELL | TQFP144 | 07+/08+ | The MAX9765/MAX9766/MAX9767 family combines speaker, headphone, and micro |
| 779 | (10) | IC | 集成电路 | FST3126M | Typicals represent average readings at 25C, VDD = 5 V. R |
| 77A | (10) | (VCC = +2.97V to +3.63V, CML output load is 50Ω to VCC, TA = -40C to | |||
| 77B | (2) | Infineon | 02-04+ | The Effects of Non-zero Aperture Time For the analysis of aperture time | |
| 77C | (4) | NEC | PLCC28 | There are several power-down features on the CY7B951. Any of the differe | |
| 77D | (5) | Improved Accuracy at High Temperature Available in Small and Super Small | |||
| 77E | (2) | 3. If an external source backfeeding the regulators output is gre | |||
| 77F | (1) | ESD damage can range from subtle performance degradation to complete de | |||
| 77H | (3) | 2000 | Microchip offers a QTP Programming Service for factory production order | ||
| 77L | (3) | NEC | TO-92 | Notes: 1. Threshold of falling VCC with hysteresis of 0.2 V (typ.). 2. | |
| 77M | (11) | N/A | DIP | 2005+ | The ZR78L Series show performance characteristics superior to other loca |
| 77P | (14) | IBM | 05+ | QFP | Description Agilents ABA-31563 is an economical, easy-to-use, inter- na |
| 77R | (1) | N/A | DIP | 07+ | When low, "A" and "B" data is present on its respecti |
| 77S | (3) | 1.1 Scope. This specification covers the performance requirements | |||
| 77T | (3) | Two 24mA non-inverting drivers provide buffering for the HSYNC and VSYN | |||
| 77V | (9) | IDT | SQFP64 | 2007+ | The MC74AC377/74ACT377 has eight edge-triggered, D-type flip-flop |
| 77X | (1) | THALES | 01+ | DESCRIPTION The M54/74HC138 is a high speed CMOS 3 TO 8 LINE DECODER f | |
| 77Z | (5) | SPRAGUE | SMD-8 | 88 | See Command Codes for Boot Block Lockout Enable for the specific code. Onc |
| 7-8 | (2) | C 512K-Bit Internal Program/Cache (16K 32-Bit Instructions) | |||
| 780 | (238) | TI | CDIP16 | 00+ | The GS71024 is a high speed CMOS static RAM organized as 65,536 words b |
| 781 | (93) | SN | 04+ | DIP | This pin provides an access to the output current control loop for the NC |
| 782 | (76) | The bq2060 accepts an NTC thermistor (Semitec 103AT) for temperature meas | |||
| 783 | (23) | INTERSIL | 03/04+ | TO220 | Ideal for space critical applications, the LM4040 precision voltage ref |
| 784 | (35) | MLX | QFN | 04+ | SEN enables serial loading of programmable flag offsets. During Master Re |
| 785 | (28) | IC | 集成电路 | H11A817B.300 | Ground reference to LVDS and CMOS circuitry. For the LLP package, the D |
| 786 | (124) | IC | 集成电路 | H11A817C | The 48-bit instruction word accommodates a variety of parallel operation |
| 787 | (150) | IC | 集成电路 | H11AA4 | NOTES: 1 pin #10 = pin #19(internally connected). 2. Do not tie up Vp an |
| 788 | (66) | N/A | SOP10 | N/A | CS falling edge to first SCLK falling edge. SCLK logic high pulsewidth. |
| 789 | (30) | NEC | . | A 75 Ω termination resistor with short traces should be attached bet | |
| 78A | (7) | PHIL | SOP14P | 01+ | NOTES: 1. All voltage values, except differential voltages, are with resp |
| 78B | (38) | N/A | Grayhill | 05+ | The DS90C363B transmitter converts 21 bits of CMOS/TTL data into three |
| 78C | (4) | LINEAR | SSOP16 | 07+ | Port 1 is an 8 bit bi-directional I/O port with internal pullups. Port 1 |
| 78D | (35) | UTC | TO-252 | TO-252 | Antiparallel diode for high frequency switching devices Anti saturatio |
| 78E | (13) | LINEAR | SSOP16 | 07+ | Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V |
| 78F | (25) | NEC | 0536+ | The device will respond with a 64-bit ATR code, including historical byte | |
| 78G | (11) | TDK | PLCC | 03+/04+ | The K6F2008U2E families are fabricated by SAMSUNGs advanced Full |
| 78H | (38) | N/A | Grayhill | 05+ | The LH1532 dual 1 Form A relays are SPST normally open switches that can |
| 78J | (5) | N/A | Grayhill | 05+ | Input Voltage 2 V to 6 V Low 150-mV Dropout at 500-mA Load Guaranteed |
| 78K | (6) | N/A | Grayhill | 05+ | ‡ Unless otherwise indicated, voltages are reference to ground and |
| 78L | (191) | UTC | O7+ | ||
| 78M | (112) | Applications include point-to-point (single termination) and multi- poin | |||
| 78N | (13) | RICOH | SOT-23 | and Parallel Load Conditional Store Instructions Fast Return From Interr | |
| 78O | (2) | SANYO | TO220 | The circuit of the TSOP22..YA1 is designed in that way that unexpected | |
| 78P | (52) | NEC | QFP | 96+ | The host must issue a hardware reset or the soft- ware reset command to |
| 78Q | (36) | TERIDIAN | 490/BOX | 08+ | Japan Wide 100k/200k L L H H Dont care Dont care Dont |
| 78R | (25) | N/A | N/A | N/A | The second is the programmable 16- or 32-bit-wide SDRAM interface that a |
| 78S | (70) | ST | TO-220 | 06+ | I , Q = 1 Vp-p implies that themagnitude of the signal at each input pin |
| 78T | (15) | SEC | TO-220 | 04+ | Digital RGB or YCrCb non-interlaced input to interlaced or non-interlaced |
| 78Y | (51) | IF-Compensation Demodulator Chrominance Filter Frequency Demodulator | |||
| 78Z | (23) | FIL-MAG | 2007 | These dual monolithic silicon zener diodes are designed for appli | |
| 790 | (87) | TI | 07+ | The ISP2200 FPM supports the following: s Support for one Fibre Channel p | |
| 791 | (108) | IC | 集成电路 | H21B1 | 3. Processing before Initialization Note: When power is first supplied, |
| 792 | (55) | 96 | When LRC is at a logic 1, LRD will sink current which energizes the Loop | ||
| 793 | (30) | DIP | 94 | TI warrants performance of its semiconductor products to the specificatio | |
| 794 | (190) | IC | 集成电路 | HCF4011BM1 | The MCP6275s VCM for op amp B (pins VOUTA/VINB+ and VINBC) is VSS + 100 m |
| 795 | (12) | HIFN | TQFP | Note 1: In the typical PECL 100K logic output Voh is 2.35 volts and Vol | |
| 796 | (56) | AMI | PLCC-44 | Tables 2 and 3 summarize the different behaviour and advantages of both | |
| 797 | (4) | AMD | O7+ | Corona C Corona is the ionization of air or other vapors which causes the | |
| 798 | (11) | MOT | DIP16 | 07+ | The IC also includes 4 readable input (I1..I4) pins and 8 settable outpu |
| 799 | (15) | PHI | SOP24W | 07+ | Bit Clock (For MPI)/Data Clock (For GCI). In MPI mode, BCLK pin clocks o |
| 79A | (7) | CTSS | 2008 | *Ultrasmall-sized package permitting 79A-1C appliedses to be made s | |
| 79B | (1) | PROG (Pin 4): Charge Current Programming, Charge Current Monitor and Manu | |||
| 79C | (6) | Load Regulation Since the IRU1050 is only a three-terminal device, it is | |||
| 79D | (9) | UTC | TO251 | 08+ | The SNI consists of five main logical blocks a) the oscillator generates |
| 79E | (11) | MOT | TSSOP-16 | 98+ | ZS and ZL reflect the impedances that should be pre- sented to the transi |
| 79F | (6) | SSOP-30 | NOTES (a) For a device surface mounted on 25mm x 25mm FR4 PCB with high | ||
| 79G | (3) | MOTO | DIP24 | N/A | m1: arrangement number of special module. The number of special module &n |
| 79H | (6) | NS | TO-3 | Stresses beyond those listed under Absolute Maximum Ratings may cause per | |
| 79K | (1) | IDT | The AD9878 is a single-supply, cable modem/set-top box, mixed-signal fro | ||
| 79L | (86) | UTC | O7+ | ||
| 79M | (48) | SANYO | DIODE | The MB89960 series is a single-chip microcontroller that utilizes the F2M | |
| 79N | (6) | 17 | SMD | POWER SUPPLY Supply Voltages AVDD DVDD Analog | |
| 79P | (5) | 82 | IDT | 99/00+ | The MAX5042/MAX5043 isolated multimode PWM power ICs feature integrated s |
| 79Q | (1) | TDK | 02+ | PLCC-28 | Note1: The control pins, CE, TxEn and Bands shall never exceed Vcc + 0.3V |
| 79R | (103) | PLCC-84 | During the turn−on and turn−off delay times, gate current is | ||
| 79S | (1) | The emulator consists of a base unit that connects to the PC by way of t | |||
| 79T | (6) | high-frequency tube | TOS | 04+ | The C6203 device has a powerful and diverse set of peripherals. The perip |
| 79V | (2) | This is the output terminal for the LPF input and charge pump output. Wh | |||
| 79X | (1) | IBM | 模块 | 01+ | Data is first written to the scratchpad from where it can be read back. Af |
| 79Z | (4) | MOTOROLA | QFP0707-32 | 95+ | • Supports Cypresss Ultra37000™, Ultra37000V™, |
| 7A- | (2) | FH | 05+ | Motorola reserves the right to make changes without further notice to any | |
| 7A0 | (11) | SAGAMI | 7A08L-330K-Ahe 7A08L-330K-A is a dual inverting buffer/line driver with | ||
| 7A1 | (15) | SOP8 | SOP8 | The ispLSI and pLSI 1032E are High Density Program- mable Logic Devices | |
| 7A2 | (17) | ST | SSOP | 07+ | SOT-23 and SOIC Packages 0.5% Voltage Reference Initial Accuracy (IRU431 |
| 7A3 | (1) | HIT | DO-35 | 05+ | |
| 7A4 | (2) | TOSHIBA | SOT-252 | Anyone purchasing any products described or contained herein for an above | |
| 7A5 | (2) | POWER | 模块 | 08+ | RECEIVE CHANNEL Number of Inputs Input Voltage Range Common-Mode Vol |
| 7A6 | (5) | VIN =2.7V ~ 5.5V, IOUT =500mA, each switch RL =10 each output RL =10 e | |||
| 7A7 | (1) | ESD damage can range from subtle performance degradation to complete de | |||
| 7AA | (1) | ||||
| 7AB | (3) | PHILIPS | SSOP-56 | 07+ | Figure 2 on page 4 shows one sample configuration of a SPORT using the p |
| 7AC | (3) | HAR | 91+ | 19 | OPTI-LOOP compensation allows the transient response to be optimized over |
| 7AD | (20) | TI | QFP | The conversion process and data acquisition are controlled using CS and | |
| 7AF | (1) | The bq3287E is a fully compatible real-time clock for IBM AT-compatible | |||
| 7AG | (1) | − Licensed CMOS 765B Floppy Disk Controller − Software and | |||
| 7AL | (1) | The 74HC/HCT158 are quad 2-input multiplexers which select 4 bits of da | |||
| 7B0 | (3) | Modulus control output for controlling an external dual-modulus prescaler | |||
| 7B1 | (27) | HIT | DO-35 | 05+ | NOTE: Intersil Pb-free products employ special Pb-free material sets; mol |
| 7B2 | (55) | ADI | 07+ | __________________________________________________________________________ | |
| 7B3 | (91) | ADI | 07+ | The contents of this document are provided in connection with Advanced Mi | |
| 7B4 | (53) | ADI | 07+ | • No glitch on power-up • Supports hot insertion • Low st | |
| 7B5 | (2) | I, PD Output Enable Input. When asserted LOW, the outputs are enabled &n | |||
| 7B8 | (2) | This data sheet provides an overview of the R4700s CPU features a | |||
| 7B9 | (6) | A capacitor is connected between AFSM (Pin 11) and GND for smoothing of | |||
| 7BA | (1) | ||||
| 7BB | (16) | MURATA | Note: Stresses greater than those listed under MAXIMUM RATINGS may caus | ||
| 7BJ | (1) | An existing low-battery output (LBO) like that found on DC-DC converters | |||
| 7BM | (1) | During the turn−on and turn−off delay times, gate current is | |||
| 7BN | (1) | MIC2595 and MIC2595R: Turn-Off Threshold. When the voltage at the OFF pi | |||
| 7BP | (3) | ADI | 07+ | • TOSHIBA is continually working to improve the quality and reliabil | |
| 7BR | (1) | The host can program both the temperature alarm threshold (TOS) and the | |||
| 7BS | (1) | TXCLK is an internally derived signal in Internal mode and is connected i | |||
| 7BW | (1) | TAOperating free-air temperatureC55125C4085C NOTE 3: All unused co | |||
| 7C- | (2) | 05+ | DIP | Even Parity. Parity is even parity across AD31-0 and nC/BE3-0. PAR is sta | |
| 7C0 | (51) | T | SOP | 03/+04+ | The HYS64/72D32000GU and HYS64/72D64020GU are industry standard 184-pin 8 |
| 7C1 | (175) | 97 | |||
| 7C2 | (9) | HIT | DO-35 | 05+ | This document is preliminary. As such, it contains data derived from func |
| 7C3 | (9) | HIT | DO-35 | 05+ | between the two supply inputs is + 8.0 volts while the minimum voltage |
| 7C4 | (22) | TI | SMD | 9616 | The Bank Activate command must be applied before any Read or Write operati |
| 7C6 | (79) | 00+ | A tunable delay cell (controlled via CLKDACTRL) is integrated between the | ||
| 7C7 | (1) | The enhanced configuration device features multiple configuration scheme | |||
| 7C8 | (6) | SMD | Operation at even lower levels of Vcc supply voltage are possible with | ||
| 7C9 | (1) | Notes; (1) Repetitive Rating: Pulse Width Limited by Maximum Junction Te | |||
| 7CD | (13) | ST | 99+ | 63 | The FCT374T devices are high-speed, low-power, octal D-type flip-flops, f |
| 7CH | (1) | Charge in Li-Ion and Li-Polymer Batteries Supports the Smart Battery Spec | |||
| 7CT | (1) | Viewing Angle & Lead Stand Offs 08: 6 deg without lead stand offs 10 | |||
| 7D1 | (13) | N/A | MPX2050 series pressure sensors are available in differential and | ||
| 7D2 | (1) | FUJI | The TSM107 is a monolithic IC that includes three op-amp for which the | ||
| 7D3 | (9) | 1735 | The Secure Microcontroller Family (DS5000FP, DS5001FP, DS5002FP, and ass | ||
| 7D5 | (11) | 1735 | The LVDS Repeaters take an LVDS input signal and provide an LVDS output | ||
| 7D6 | (2) | OPTOLAB | The true CMOS 765B core provides 100% compatibility with IBM PC/XT and PC | ||
| 7D7 | (7) | N/A | The RESET/OE input of all PROMs is best driven by the INIT output of th | ||
| 7DA | (1) | STM | 04+ | 5 | If the password mode is enabled with PW_ON, read and write commands are |
| 7DD | (2) | JRC | 98+ | Several register bits (Bit 0 to Bit 145) are used to control the circuits | |
| 7DE | (1) | JRC | 99 | The TLC77xxI is characterized for operation over a temperature range of C | |
| 7DG | (1) | ||||
| 7DJ | (1) | A/N | PLCC-28 | 01 | Note 5: In applications where high power dissipation and/or poor package |
| 7DL | (2) | JRC | BGA | N/A | specific default state that will automatically occur during power-up. T |
| 7E0 | (46) | N/A | |||
| 7E1 | (3) | SAGAMI | 10145 | The host system can detect whether a program or erase op- eration is co | |
| 7E2 | (5) | N/A | BGA | DMS (Data Management Software) allows systems to easily take advantage o | |
| 7E5 | (4) | ＭＡＸＩＭ | This is a dual function pin. In the IDT Standard mode, the EF function is | ||
| 7EF | (2) | H | O7+ | The IRU1050 keeps a constant 1.25V between the out- put pin and the adjus | |
| 7EK | (1) | When WEN1 is LOW and WEN2/LD is HIGH, data is written into the FIFO on | |||
| 7EP | (5) | (B) The local controller should monitor the Unbalance Detection output (U | |||
| 7EZ | (6) | The DDU4C relies on a stable power supply to produce repeatable delays wi | |||
| 7F1 | (9) | NS | 07+ | NOTES: 1. A12X is a NC for IDT70P248. 2. All VDD pins must be connected | |
| 7F2 | (4) | ST | BGA | DC/0938 | Fully static operation and Tri-state outputs TTL compatibl |
| 7F3 | (2) | NOTES:2606 tbl 01 1. Stresses greater than those listed under ABSOLUTE M | |||
| 7F5 | (3) | PHILIPS | O7+ | Precision Optical Performance AlInGaP II (aluminum indium gallium phosph | |
| 7F6 | (1) | The ISD1740A/50A/60A devices also support an optional vAlert (voiceAlert) | |||
| 7F7 | (3) | INTERSIL | 00+ | (4) The products and product specifications described in this material ar | |
| 7FD | (1) | STM | SOP-20 | 04+ | Insulation Resistance C Insulation Resistance is the resis- tance measure |
| 7FF | (1) | • Three-phase bipolar PWM drive (high and low side n-channe | |||
| 7FI | (4) | 模块 | 05+ | (5) Array Lag is defined as: (Vaverage 0µW 1 Vaverage 0µW2) / | |
| 7FL | (24) | ST | N/A | Automotive: Backlighting in dashboards and switches Telecommunication: | |
| 7FM | (7) | ST | QFP | 07+ | Since G6 and G7 are input only pins any attempt by the user to configure |
| 7FS | (3) | ST | 05+ | SOP-24 | Both circuits have three binary select inputs (A0, A1 and A2) that can b |
| 7G- | (1) | R1 (pin 2) One of the two resistance input pins. A temperatu | |||
| 7G0 | (1) | PANASONIC | BGA | The Freescale manuals are available on the Freescale Semiconductors Web s | |
| 7G1 | (1) | Hynix HYMD264646A(L)8-M/K/H/L series is unbuffered 184-pin double data rat | |||
| 7G9 | (1) | N/A | 02+ | dresses are stable, the address access time (tAVQV) is equal to the del | |
| 7GB | (2) | PLCC | 04+ | For battery based applications, power consumption is a key issue, therefor | |
| 7H0 | (1) | In the receive direction, the XRT73L03 can perform Equalization on inco | |||
| 7H1 | (1) | The CY7C1350G is a 3.3V, 128K x 36 synchronous-pipelined Burst SRAM desig | |||
| 7H3 | (3) | Current-mode PWM Controller High-current output drive suitable for Power | |||
| 7H4 | (2) | S0P-8 | Designed to meet VRM 9.0 specification for next generation microprocessor | ||
| 7H5 | (1) | Different steering arrangements may be used to select independently the gu | |||
| 7HC | (4) | T | SOP20M | 2007+ | The device is available with an access time of 55, 60, 70, or 90 ns and |
| 7HU | (2) | STM | QFP-64 | 02+ | The 74ALVCH16841 has two 10-bit D-type latch featuring separate D-type i |
| 7I4 | (1) | FIN and OSC IN input level Max. operating frequency, fFIN and fosc Propa | |||
| 7ID | (1) | 1.1 Scope. This specification covers the performance requirements | |||
| 7IE | (1) | MAX 7000 devices use CMOS EEPROM cells to implement logic functions. The | |||
| 7IF | (1) | Address Latch-Enable Output. This pin functions as a clock to latch the e | |||
| 7J0 | (1) | Increased interconnection bandwidth can be achieved by using TC9208Ms tru | |||
| 7J1 | (2) | * | 14P | regarding media compatibility in your application. Figure 3 shows | |
| 7JB | (2) | Diagnostic outputs can be continuously monitored to protect the d | |||
| 7JM | (2) | C 16-bit CPU with 4-stage pipeline C 31.25ns instruction cycl | |||
| 7JS | (1) | PAN | Channel 0 Sync-On-Green-Input. A high impedance analog input. The video | ||
| 7K1 | (1) | inputs and outputs and 0 to 7V can be accepted on inputs with no regard | |||
| 7K9 | (1) | JAT | 3225 | 05+ | The coupler consists of a AlGaAs LED that is optically coupled to a diele |
| 7KC | (2) | Typical Applications • Vibration Monitoring and Recording • | |||
| 7L0 | (1) | The HC174 and HCT174 are edge triggered flip-flops which utilize silicon | |||
| 7L1 | (2) | TXL | QFP-64 | 00+ | The DS1809 will also support a command-initiated wiper storage operation |
| 7L3 | (1) | ST | BGA | 00+ | • CASE: Void-free transfer molded thermosetting epoxy body |
| 7L6 | (2) | The ICS601-01 is a low-cost, low phase noise, high-performance clock sy | |||
| 7L8 | (1) | TI | SOP8 | There are 2 types of data which should be accessed through the serial data | |
| 7LB | (8) | TI | SOP8 | Description Agilents MGA-71543 is an economical, easy-to-use GaAs MMIC | |
| 7LE | (2) | ST | SOP-28P | 07+ | The UCC381 family of low dropout linear (LDO) regula- tors provide a re |
| 7LF | (2) | ST | 01+ | 4.4.4 Group E inspection. Group E inspection shall be conducted in | |
| 7LL | (2) | ST | 01+ | Conventional antenna switch modules used in GSM terminals and other prod | |
| 7LS | (1) | The DS1330 devices execute a write cycle whenever the WE and CE signals ar | |||
| 7LU | (4) | 01+ | SOP-28 | Port 1 also provides special functions as described below. A0/WRH | |
| 7LV | (3) | The Hitachi HM62V16256CBP Series is 4-Mbit static RAM organized 262,144-w | |||
| 7-M | (1) | ||||
| 7M0 | (2) | FAI | TO-3P | 05+ | • Industry Standard Size • Industry Standard Pinout |
| 7M1 | (2) | Control Register A password protected read or write array command at ad | |||
| 7M2 | (2) | 08+ | With reference to Figure 4, assume that VDD is rising slowly from zero t | ||
| 7M3 | (6) | 08+ | Preliminary markings removed Section 7: Electrical and timing tables ch | ||
| 7M4 | (2) | TQS | QFN | 95+ | Fast synchronization. When asserted high, the transmitter substitutes the |
| 7M5 | (1) | TQS | QFN | 0606+ | The HRPG series is a family of miniature panel mount optical encoders, |
| 7M9 | (2) | 100 | 天龙伟业 | 靳先生 | Parameter Collector-base breakdown voltage Collector-emitter b |
| 7MB | (493) | FUJI | The information provided herein is believed to be reliable; however, BURR | ||
| 7MC | (1) | Notes: 1. Operation of this device above any one of these paramet | |||
| 7MM | (7) | AMKOR | BGA | 00+ | The Am29LV652D offers access times of 90 and 120 ns and is offered in a 6 |
| 7MN | (1) | MODULE | MODULE | 08+ | Write All (WRALL) The WRALL instruction is valid only when the Protect R |
| 7MP | (12) | IDT | SSOP24 | 2007+ | GHz TECHNOLOGY, INC. RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER N |
| 7MR | (1) | Implementation of the equivalent ECU block as HDL in a programmable logic | |||
| 7MY | (1) | Refresh and Test Mode Capability. ∗ 512 refresh cycles per | |||
| 7-N | (1) | Recommended operating conditions unless otherwise noted. Refer to Block Di | |||
| 7N0 | (6) | SMD-8 | 05+ | Intrinsic deterministic device jitter is a measurement of the determinist | |
| 7N1 | (3) | TRAIT | 00+ | TO3P-5P | • Pin- and function-compatible with CY7C1021BV33 • High speed |
| 7N2 | (10) | M/A-COM | 04+ | Added 32-Mbit density Added 98H as a reserved command (Table 4) A1CA20 | |
| 7N4 | (3) | JVR | DIP-47V | 8.1 DVSI warrants the Voice Codec to be free from defects in materials an | |
| 7N5 | (2) | IR | TO-220F | 04+ | ICSI reserves the right to make changes to its products at any time witho |
| 7N6 | (4) | AAT | TO-220/F | 08+ | • The use of twin crossbar contacts en- sures high contact reliabil |
| 7N8 | (1) | FSC | TO-220 | 06+ | The charging sequence consists of four stages. The application of current |
| 7N9 | (1) | TO-3P | 02+ | 80K Words of On-Chip RAM on P0, Configured as 64K Words On-Chip 1 | |
| 7NB | (2) | ST | 01+ | The B9946 is capable of generating 1X and 1/2X signals from a 1X source. | |
| 7NC | (2) | ST | SOP | 6. Automatic insertion To maintain the internal function of the relay, | |
| 7NF | (1) | n 20 to 75 MHz shift clock support n 50% duty cycle on receiver output | |||
| 7NL | (1) | THERMAL PERFORMANCE The 24-lead SO package is a molded plastic package w | |||
| 7NQ | (1) | PH | TO-220F | The DDU4C-series device is a 5-tap digitally buffered delay line. The sig | |
| 7NV | (2) | ST | SMD-8 | Ring Synchronization Input - A TTL-compatible clock input. The clock shou | |
| 7P0 | (3) | CTSS | 2008 | The CMOS bq3285E/L is a low- power microprocessor peripheral providing a | |
| 7P2 | (1) | Note 3: When the input voltage at any pin exceeds the power supplies (tha | |||
| 7P3 | (1) | ST | TQFP64 | 2007+ | NOTES:1. Complete part number includes a suffix to identify operating tem |
| 7P5 | (1) | ST | 01+ | 11 | tsk(p)Pulse skew‡See Figure 350 † All typical values a |
| 7PA | (1) | The HT99C810 is an 8-bit high performance RISC-like microcontroller whi | |||
| 7PI | (3) | When using the internal oscillator, the stability may be enhanced | |||
| 7PK | (8) | N/A | The write enable input is active LOW and controls read and write operation | ||
| 7PL | (2) | ST | SOP | 07+ | Addresses and data needed for the programming and erase operations are |
| 7PS | (2) | N/A | 4X4可调 | The HV256 operates on a 300V supply and two low voltage supplies, 8.0V | |
| 7PU | (1) | The CY7C373i is an In-System Reprogrammable Complex Programmable Logic De | |||
| 7Q1 | (1) | ||||
| 7R1 | (24) | Active-Low. Reset is asserted when VCC drops below VTH and remains asserte | |||
| 7R2 | (1) | B. Panasonic is endeavoring to continually improve the quality and reliab | |||
| 7R6 | (1) | Reflects the current value of the internal PCI_STP# function when read. In | |||
| 7RA | (1) | PHILIPS | SOP16 | 07+ | calls, and loops on the 24-bit program counter (PC). In direct addressin |
| 7RC | (2) | Four different schemes are shown in Figures 2, 3, 4, and 5. Note that th | |||
| 7RT | (4) | Magnitude of Common Emitter Small-Signal Short-Circuit Forward Current | |||
| 7S0 | (13) | 2008 | The HY62UF08401C is a high speed, super low power and 4Mbit full C | ||
| 7S1 | (9) | HR150 converters are designed to operate between C40C and +85C case and | |||
| 7S2 | (1) | Motorola has developed a low cost, high volume, miniature pressure | |||
| 7S3 | (5) | NC7S32M5X | Fairchild | SOT23-5 | The RC2207 is a monolithic voltage-controlled oscillator (VCO) integrate |
| 7S8 | (5) | ELM | SOT-25 | 1 | Note 8: Maximum output current is tested with a load of 3 mH, VCC1 = +15V |
| 7S9 | (1) | The 74ALVC245 is an octal transceiver featuring non-inverting 3-state b | |||
| 7SB | (2) | NSC | ANADIGICS, Inc. reserves the right to make changes to its products or to | ||
| 7SC | (10) | ST | QFP | 06+ | Also See: • HEDS-9000/HEDS-9100 Encoder Module Data Sheet |
| 7SD | (1) | NSC | O7+ | The communications interface allows the host to observe and control the c | |
| 7SE | (5) | N/A | 03 | Stresses above those listed under "Absolute Maximum Ratings" ma | |
| 7SF | (1) | Please read the General Operating Considerations sec- tion, | |||
| 7SH | (4) | The FDC10 (W) series required a minimum 10% loading on the output to maint | |||
| 7SN | (1) | The CM3002 family of regulators is fully protected, offering both overl | |||
| 7SP | (1) | SOT-23-5 | 10-Year Minimum Data Retention in the Absence of External Power Data is | ||
| 7ST | (2) | High Power Switching Regulator Controller for DDR Memory Termination VOU | |||
| 7SZ | (12) | N/A | 03 | Moving data from two groups of registers to four common output buses is | |
| 7T0 | (1) | Programming support is available from Cypress as well as from a number of | |||
| 7T2 | (1) | 35 | ST | 01+ | KS7333 is a product used in video camera systems, such as camcorders and |
| 7T3 | (1) | 38354 | QFP | LSI Logic Corporation reserves the right to make changes to any products | |
| 7T5 | (3) | 260 | BI | 96+/00+ | The maximum power package dissipation is the power dissipation le |
| 7T6 | (1) | PHILIPS | SOP8 | Note 9: ROUT is measured from the output pin to ground. This value repres | |
| 7T9 | (1) | TSSOP | 05+ | The SC16C654B/654DB is pin compatible with the ST16C654 and TL16C754 and | |
| 7U2 | (17) | Typicals and limits appearing in normal type apply for TJ = 25˚C. L | |||
| 7U4 | (1) | Serial Clock (SCK) The Serial Clock controls the serial bus timing for d | |||
| 7-V | (4) | TAIYO YUDEN | N/A | DMS (Data Management Software) allows systems to easily take advantage o | |
| 7V1 | (1) | HITACH | System operation has been enhanced by the addition of common asynchronou | ||
| 7V2 | (4) | HITACH | DESCRIPTION Input reference frequency, 5V tolerant input Buffered clock | ||
| 7VB | (1) | HF | 00+ | N/A | |
| 7VT | (1) | PHI | SSOP20 | 2007+ | Product Description/Features: • Low skew, low jitter PLL clock dri |
| 7VZ | (1) | high-frequency tube | TOS | 04+ | The RC2798 is an integrated solution for the down- conversion of QAM IF |
| 7W0 | (14) | BB | SMD | 03+/04+ | Flexible serial port communication combinations 2 integrated USARTs 2 in |
| 7W1 | (9) | SMD | STATUS: is active during T4, T1 and T2 and is returned to the passive sta | ||
| 7W2 | (6) | MOTO | SMD | SMD | Four waveforms are readily obtainable from this basic gener- ator circui |
| 7W3 | (5) | TOS | SSOP8 | • OFFERS THE EASE OF USE AND FAST SYSTEM SPEED OF PLDs WITH | |
| 7W4 | (1) | The HT93LC66 is accessed via a three-wire serial com- munication interfac | |||
| 7W5 | (2) | TOS | SOP-8 | 04+ | Port 0 (AD0C7) C I/O. Port 0 is an openCdrain 8Cbit biCdirectional I/O po |
| 7W6 | (1) | SSOP80 | The Hynix HYM7V73A1601B F-Series are 16Mx72bits ECC Synchronous DRAM Modul | ||
| 7W7 | (2) | TOSHIBA | SSOP8 | 04+ | 7W74 PLL clock device is developed for SSTL_DDR SDRAM applications. This |
| 7WI | (1) | 05+ | SMD | - 23-bit program memory space and 23-bit data memory space - linea | |
| 7WU | (4) | SOP8 | 00+ | • Eight Independent Channel 12-Bit DACs with Output Amplifie | |
| 7X0 | (1) | Absolute Maximum Ratings indicate limits beyond which damage to the devic | |||
| 7X7 | (3) | N/A | MLFP | 07+ | Thermocompression bonding is recommended. Welding or conductive epoxy ma |
| 7Y0 | (1) | 00+ | BGA | High Efficiency: Up to 95% Very Low Quiescent Current: Only 40µA 2 | |
| 7Y1 | (2) | N/A | Receive filter output. The output signal has an amplitude of 2.0 VPP abov | ||
| 7Y2 | (1) | The LTC2439-1 accepts any external differential reference voltage from 0. | |||
| 7Y4 | (1) | • Indicates the presence or absence of synchronizing-signal input an | |||
| 7YS | (3) | Select Word 0 (D18 = 0) BitFunction D0Bridge 1 blank time LSB D1Bridge | |||
| 7Z0 | (12) | FSC | 04+ | SOT | VOUT = 3.3 V, IOUT = 300 mA Current−Mode PWM Control Automatic PWM |
| 7Z1 | (2) | 94 | SOT5 | The 356 x 292 pixel sensors have an on-chip 8-bit analogue to digital con | |
| 7Z2 | (6) | SOT5 | The US member body, Canada and some other member bodies have expressed th | ||
| 7Z3 | (4) | N/A | NOTES: 1. See Test Conditions under TEST CIRCUITS AND WAVEFORMS. 2. Thi | ||
| 7Z6 | (3) | 2008 | 1. Life support devices or systems are devices or systems which, | ||
| 7Z8 | (1) | SOT5 | Please be aware that an important notice concerning availability, |
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