| Mfg | pack | D/C | Descrpion | ||
| A.1 | (1) | T | 03+ | The ZL10037 is a fully integrated direct conversion tuner for digital sat | |
| A/1 | (1) | ||||
| A/4 | (1) | ||||
| A/G | (1) | ||||
| A/M | (1) | ||||
| A/N | (1) | ||||
| A/Q | (1) | ||||
| A/S | (1) | ||||
| A/V | (1) | ||||
| A-0 | (3) | Notes: 1. Repetitive Rating : Pulse width limited by maximum junction tem | |||
| A00 | (49) | 96 | These edge-triggered multivibrators feature output pulse-duration contr | ||
| A01 | (54) | National | 2008 | Dual Regulated Outputs: One Switching Regulator and One Linear Regulator | |
| A02 | (151) | C Thirty-one 32K Word (64K Byte) Sectors with Individual Write Loc | |||
| A03 | (419) | ARESON | DIP-16 | 0316+ | Notes: 2. The Fmin values are based on a set of 16 noise figure measureme |
| A04 | (26) | HARRIS | PLCC | 00+ | Note 2: Absolute Maximum continuous ratings are those values beyond which |
| A05 | (44) | MORNSUN | 08+ | Note 2: The algebraic convention, where the most negative value is a minim | |
| A06 | (298) | N/A | N/A | characteristics are guaranteed over the temperature range of b 40 C to a | |
| A07 | (105) | 3M | 01+ | 405 | Serial Data (SDA) SDA is a bidirectional pin used to transfer data into |
| A08 | (72) | 01 | hold the output low (Figure 2). This resistor value, though not critical | ||
| A09 | (26) | NSC | O7+ | Input reflected-ripple current is measured with a inductor Lin (4 | |
| A0F | (1) | Most connections between the FPGA device and the Serial EEPROM are simp | |||
| A0L | (3) | N/A | CMOS compatibility The XTI pad low and high levels are CMOS compatible; | ||
| A0W | (1) | (4) The products described in this material are intended to be used for s | |||
| A-1 | (32) | MAUM | SOP-8 | To obtain the lowest jitter clock drive, a low-phase-noise sine-wave sour | |
| A1- | (53) | HARRIS | DIP | This pin provides soft-start for the switching regulator. An internal curr | |
| A10 | (320) | ACTEL | QFP | Through the product term allocator, software automatically distributes pr | |
| A11 | (266) | SONY | SOP-16 | 08+ | NOTES: (1) Long-Term Input Offset Voltage Stability refers to the average |
| A12 | (440) | MORNSUN | 08+ | ICS91309 comes in a 16-pin 150 mil SOIC, SSOP or 4.40mm TSSOP package. I | |
| A13 | (165) | 三极管 | Charge in Li-Ion and Li-Polymer Batteries Supports the Smart Battery Spec | ||
| A14 | (188) | ACTEL | • ispDesignEXPERT™ C LOGIC COMPILER AND COM- PLETE ISP | ||
| A15 | (71) | SOP8 | The e1217X contains two push-pull output buffers for driving bipolar step | ||
| A16 | (137) | Input Data Mask: DM(0~3) is an input mask signal for write data. Input dat | |||
| A17 | (104) | 95 | NOTE: Device will meet the specifications after thermal equilibrium has b | ||
| A18 | (88) | ANALOGIC | 2001 | SOT-3 | FEATURES Single-Channel, 24-Bit - ADC Pin Configurable (No Programmable |
| A19 | (41) | SONY | QFP | 01+ | Valid combinations list configurations planned to be sup- ported i |
| A1A | (8) | NEC | TO92S | A 2.85V output version is suitable for SCSI-2 active termination. Unlik | |
| A1B | (2) | • Compatible with Popular Fiber Optic Module Specifications | |||
| A1C | (3) | ANALOE | The A1C1526-0CS-CS568J6 and A1C1526-0CS-CS568J6 3-STATE buffers utilize | ||
| A1D | (1) | FAIRCHILD | QFN | 05+ | embedded web servers Wireless LAN and Bluetooth access poin |
| A1E | (1) | The unique differential input sample-and-hold can acquire single-ended or | |||
| A1F | (3) | NEC | TO92S | 128K x 36, 256K x 18 memory configurations Supports high performance syst | |
| A1G | (1) | JAPAN | QFP48 | 07+ | Power Diode Module DD60GB series are designed for various rectifier circu |
| A1L | (4) | NEC | The P82B96 offers many different ways in which it can be used as a bus i | ||
| A1M | (3) | ON | 01+ | SOP-8 | Bidirectional Bus Transceivers in High-Density 20-Pin Packages True Logi |
| A1P | (4) | AMPHENOL | new/original | 07/08+ | |
| A1R | (1) | FAIRCHILD | QFN | 05+ | Sector Tag/Sync Bytes The first byte of each sector is pre-programmed du |
| A1T | (1) | FAIRCHILD | QFN | 05+ | The AT8xEB5114 has 3 software-selectable modes of reduced activity for fu |
| A1U | (1) | FAIRCHILD | QFN | 05+ | INPUT LO: Direct output mode where CE/LD, HBEN, MBEN and LBEN act as inpu |
| A1Z | (1) | PerkinElmer lamps are available in lengths from 5 ½ inches to ov | |||
| A-2 | (13) | BI | SOP- 8 | Inputs capable of generating interrupts with either edge sensitivi | |
| A2- | (33) | GT | QFN | 05+ | The EB1175 evaluation board is available to aid designers in demonstrati |
| A2. | (2) | In addition, the ISD1000A Series has an internal VCC detect circuit to ma | |||
| A20 | (120) | QFP | 6+ | The PS-R11 photo switches are composed of a modulated infrared emitting d | |
| A21 | (50) | DIP | 102 | - | The TMS320C67x DSPs are the floating-point DSP family in the TMS320C6000& |
| A22 | (118) | Test mode with PLL disabled. CCLK is substituted for the internal VCO out | |||
| A23 | (55) | AVID | QFP | N/A | The L Family is a Low Power version of the CH1817 DAA. When Off-Hook, thi |
| A24 | (88) | TI | SOP8 | 96+ | The MAX6806/MAX6807/MAX6808 precision voltage detectors are ideal for acc |
| A25 | (164) | SONY | QFP-40 | The amount of deadtime required is based on the propagation delay of the | |
| A26 | (87) | TI | 02+ | In environments that are particularly noisy it may be neces- sary to add | |
| A27 | (70) | RFT | IC | The relay is driven by a pulsed signal instead of a continuous signal. Co | |
| A28 | (25) | FUJ | DIP-14 | 08+ | The LTC ®1698 is a precision secondary-side forward converter control |
| A29 | (153) | ALLEGRO | SIP-12 | 00+ | ColdFire version 2 variable-length RISC processor Static operation |
| A2A | (1) | Within the logic allocator, product terms are allocated to macrocells in | |||
| A2B | (1) | Note 1: This value is kept on the internal data bus latch. If external me | |||
| A2C | (87) | MOT | PLCC52 | 06+ | The MAU400 series has limitation of maximum connected capacitance |
| A2D | (1) | 126 | DENSO | Any offset and/or gain calibration procedures should not be implemented | |
| A2K | (1) | 1. Super low consumption current 2. Super low consumption current (when o | |||
| A2M | (6) | ON | SOP-8 | DESCRIPTION The ACS120 belongs to the AC line switch family built aroun | |
| A2P | (3) | 00 | The CY29946 is capable of generating 1 and 1/2 signals from a 1 source. T | ||
| A2S | (3) | OTI | TSOP | 05+ | An on chip resistor is provided which can be used to drop the sup |
| A2T | (1) | QFP | 01+ | ||
| A2U | (1) | High-speed ADC Family Companion Chip Selectable 1:2 or 1:4 DMUX Ratio Po | |||
| A2V | (19) | PSC | TSOP | dc/0631 | The TLV2262/4 also makes great upgrades to the TLV2332/4 in standard desi |
| A2X | (1) | TI | O7+ | The THS4513 is a wideband, fully differential op amp designed for 3.3C5 | |
| A-3 | (11) | PARA LIGHT | Reading from the device is accomplished by taking Chip En- able 1 (CE1) | ||
| A3- | (56) | HAR | DIP | 06+ | Additional features of the Cypress PALCE22V10 include a synchronous prese |
| A3. | (1) | The PSOTxxLC Series are low capacitance TVS arrays designed to protect I/ | |||
| A30 | (117) | SONY | QFP-48 | The differential inputs provide a full scale differential input swing eq | |
| A31 | (132) | AGILENT | PDIP8 | 02+ | PAGE WRITE: The page write operation of the AT28C010-12DK allows 1 to 128 |
| A32 | (225) | ALLEGRO | SOT23W | 08+ | Sync detect C Output to signal when the link is active or inactive. The l |
| A33 | (38) | ALLEGRO | The XB1117 series is a 1A low dropout positive voltage regulator. Output | ||
| A34 | (29) | ALLEGRO | SOP24 | 03+ | • High-speed switching (tstg: storage time/tf: fall time is short) & |
| A35 | (51) | 00+ | QFP | Notes: 1. ZZZZ or ZZZ denotes the assigned product dash number. Th | |
| A36 | (14) | SOP16W | 2007+ | The IC80C51/31 is designed with 4K x 8 ROM (IC80C51 only); 128 x 8 RAM; | |
| A37 | (29) | AGILENT | DIP-8 | 6+ | The UCC5630A is used in multi-mode active termination applications, whe |
| A38 | (26) | AUSTEK | QFP | 9118 | The Run-Time Mode provides a standard JTAG interface for on-chip |
| A39 | (310) | N/A | N/A | N/A | Dallastats interpret input pulse widths as the means of controlling wip |
| A3A | (2) | SOT353 | 06+ | Note 3: The Absolute Maximum Ratings are those values beyond which the sa | |
| A3B | (8) | HARRIS | 2008 | Each flip-flop can be triggered on either the rising or falling clock ed | |
| A3C | (5) | N/A | QFP-32 | VDD (Pin 2): Gate Drive Supply Pin. This is the supply pin for the gate | |
| A3D | (11) | * Antiparallel diode for high frequency switching devices * Antis | |||
| A3F | (3) | Genesis Microchip Inc. reserves the right to change or modify the informat | |||
| A3G | (2) | Aeroflex / KDI | 08+ | 5 | B29152/53 are adjustable regulators and maybe programmed for any value |
| A3M | (4) | The two voltage-controlled amplifiers are full Class A current in/curren | |||
| A3P | (29) | ACTEL | 06+ | • Dual Outputs (Independantly Regulated) • Power-up/D | |
| A3R | (4) | N/A | Low-power dissipation Operating: 9.9 mW/MHz (typical) Single power suppl | ||
| A3S | (5) | where frequency is in Hz, resistance in Ohms, and capacitance in Farads. | |||
| A3W | (2) | TAKAMISA | RELAY | 06+ | Drain-to-Source Breakdown Voltage Gate Threshold Voltage Ga |
| A3X | (1) | *Notice: Stresses above those listed under Maximum rat- ings may cause pe | |||
| A3Z | (1) | Maximum Ratings are those values beyond which damage to the device | |||
| A-4 | (12) | NEC | 03+ | The circuit design used in the AMS2907 series requires the use of an out | |
| A4- | (5) | SANYO | 08+ | The A128 devices have a 10-bit-resolution sample-and-hold MibADC. The Mib | |
| A4. | (4) | TAKAMISAWA | Relay(DZ) | *0516B | mum value of external capacitance, CX, is 100µF. Fig.9 shows time |
| A4/ | (1) | ||||
| A40 | (122) | 132 | ACTEL | O3 | Drain-Source On-State Resistance Forward Trans-Conductance(1) Input Capa |
| A41 | (29) | AGILENT | PDIP8 | 02+/03+ | The FM1233A features a highly accurate voltage reference to which VCC is |
| A42 | (176) | ACTEL | QFP | The analog input range is equal to a 2V spread. The voltage on VT-VB wi | |
| A43 | (40) | ASTEC | 9646 | • Fully static operation and Tri-state output • TTL compatibl | |
| A44 | (40) | TI | 01+ | ISSI reserves the right to make changes to its products at any time witho | |
| A45 | (88) | AGILENT | SOP8 | 04+ | slope going through 0 at the sampling point. This, expanded out gives u |
| A46 | (29) | AGILENT | DIP-8 | 6+ | † This device is Product Preview. The TPS76801 is programmable us |
| A47 | (34) | AGILENT | PDIP8 | 00+ | Hynix HYMD232G726(L)8-K/H/L series is registered 184-pin double data rate |
| A48 | (14) | The FAN2500/01 family of micropower low-dropout voltage regulators utili | |||
| A49 | (18) | DIP24 | Correcting package pin numbers in Table 2-2, PhaseA0 changed from 38 to 5 | ||
| A4A | (1) | Stresses beyond those listed under absolute maximum ratings may cause pe | |||
| A4B | (2) | Low Loss Replacement for ORing Diode in Multiple Sourced Power Supplies | |||
| A4C | (1) | † Stresses beyond those listed under absolute maximum ratings may c | |||
| A4D | (1) | A LOW signal on SR overrides the Select inputs and allows the flip-flops | |||
| A4G | (4) | N/A | DIP | 07+ | Optional Asynchronous JTAG reset. Can be used to reset the TAP co ntroller |
| A4M | (5) | The address inputs are used to set the least significant 4 bits of | |||
| A4N | (6) | AGILENT | PDIP6 | 02+ | Second stage input bias. This pin requires a regulated supply to main- t |
| A4P | (1) | ESD damage can range from subtle performance degrada- tion to complete d | |||
| A4R | (1) | 05+ | 超微 | The time periods t1 (low) and t2 (high) are values that are easily read b | |
| A4S | (8) | The encoder has an enable function for use in multiplexer applications. E | |||
| A4T | (1) | VISHAY | SOT-25 | 6+ | FEATURES D 11-Bit Resolution D 65-MSPS Maximum Sample Rate D 2-Vpp Diff |
| A4Y | (1) | s Wide supply voltage range from 0.8 V to 3.6 V s High noise immunity s | |||
| A4Z | (5) | The A4ZX03416 series supports self-powered or bus-powered applications. P | |||
| A-5 | (8) | NS | O7+ | Available inputs are +12V 5% and +5V 5%. Either one or both of these inpu | |
| A5- | (3) | N/A | 8/SOT23 | 05&06 | Quad-Port Solutions: The H1036L, H1044, H1053, H1060, H1062, H1071, and H |
| A50 | (242) | FUJ | The AUP family is TI's premier solution to the industry's low-power needs | ||
| A51 | (28) | SONY | 04+ | † Design targets only. Not tested in production.. NOTES: 5. Both | |
| A52 | (33) | PHI | 06+ | The A5204A has sufficient phase margin when compensated for unity | |
| A53 | (48) | IR | DIP | 00+ | The device incorporates auto-calibration and built in self test (BIST) ro |
| A54 | (146) | ACTEL | 04+ | QFP/208 | n Sector Protection C Any combination of sectors may be l |
| A55 | (36) | HITACHI | CAN3 | Space saving POWR-T™ fuses are the most compact fuses available i | |
| A56 | (14) | LQFP64 | Die Attach The die attach process mechanically attaches the die to the c | ||
| A57 | (23) | DIP | 07+ | Total Input Noise vs. Source Resistance In order to determine maximum si | |
| A58 | (24) | QFP-44 | 2003+ | The SiP5630 has nine (9) output channels (T1-T9). Each output channel p | |
| A59 | (5) | Vcc = 5.0V 10%, TA = 0C to 70C (Normal) unless otherwise specified | |||
| A5A | (2) | The conditions at the binary-select inputs and the three enable inputs se | |||
| A5B | (4) | The TS302x comparators are featuring high speed response time with Rail | |||
| A5C | (8) | 05+ | SMD | a8255 MegaCore function implementing a programmable peripheral interface | |
| A5E | (6) | AMIS | 06+ | • High Reliability - NEL HALT/HASS qualified for crystal osc | |
| A5M | (1) | - Wiper Movement Control. This input provides for wiper position ch | |||
| A5N | (1) | TO-220 | 05+ | The TMS320C62x DSPs include an on-chip memory, with the C6203 device offe | |
| A5P | (6) | (LX)high-frequency | VIN (Pin 4): Input Power Supply. This pin supplies power to the boosted s | ||
| A5Q | (2) | MOT | PLCC52 | 05+ | Literature Distribution Centers: USA: Motorola Literature Distribution; |
| A5R | (1) | DESCRIPTION This Power MOSFET is the latest development of STMicroelect | |||
| A5S | (1) | The MAX4729/MAX4730 are available in small 6-pin SC70 and 6-pin µDF | |||
| A5T | (2) | N/A | 04+ | 1.High isolation voltage between input and output (Viso=5000 Vrms). 2.Co | |
| A5V | (1) | KEMENT | † Stresses beyond those listed under absolute maximum ratings may c | ||
| A5W | (5) | TAKAMISA | DIP-10 | 07+ | Note 6: This parameter is guaranteed by design but is not tested. The bus |
| A5X | (2) | ||||
| A5Y | (1) | Thermocouple: 0.5% of indicated value or 1_C, whichever greater, 1 digit | |||
| A-6 | (8) | These electrically erasable programmable memo- ry (EEPROM) devices are | |||
| A6. | (3) | ♦ Low Power: 511mW (fCLK = 100MHz) ♦ User Programmable | |||
| A60 | (59) | TI | PLCC | 07+ | The delay in this mode is dependent only on the combination of source and |
| A61 | (52) | Internal, dual, high-performance phase locked loop (PLL) synthesizers/VCOs | |||
| A62 | (126) | N/A | QFP | 2001 | If this pin is connected to a LLC driver pin for setting Bus Manage |
| A63 | (71) | N/A | QFP | 1998 | SECTOR LOCKDOWN DETECTION: A software method is available to determine if |
| A64 | (20) | 99 | The MAX7314 I2C™-compatible serial interfaced periph- eral provide | ||
| A65 | (98) | BB | SMD | 07+ | This output configuration enables a simple matching to any kind of antenn |
| A66 | (63) | Allegro | PLCC | 01+ | •Program decode controller (PDC) •Program addr |
| A67 | (13) | PHILIPS | 圆柱/1206 | Europe, Middle East, and Africa: Freescale Halbleiter Deutschland GmbH | |
| A68 | (108) | ALLEGRO | 07+ | TSOP | DESCRIPTION The 74LVX16373 is a low voltage CMOS 16 BIT D-TYPE LATCH w |
| A69 | (17) | N/A | SOP3.9mm | 2006 | The SN74AVC20T245 is designed for asynchronous communication between data |
| A6A | (15) | OMRON | 原装 | 08+ | Hynix HYMP112S64MP8 series is unbuffered 200-pin double data rate 2 Synchr |
| A6B | (12) | ATMEL 96 | Connecting the inhibit input (Pin 2) to input common (Pin 10) will cause | ||
| A6C | (10) | OMRON | 原装 | 08+ | The LVTH162245 data inputs include bushold, eliminating the need for ex |
| A6D | (22) | OMRON | 原装 | 08+ | The A6D-01007 (see A6D-01007/288A datasheet) trans- mitter converts 28 |
| A6E | (15) | N/A | OMRON | 05+ | Notes: 1. Test conditions assume signal transition times of 5 ns or less |
| A6H | (4) | OMRON | 原装 | 08+ | While monitoring SR1 and SR2 for charge and discharge currents, the bq206 |
| A6I | (1) | 02+ | The 2 series of decoders are capable of decod- ing informations that con | ||
| A6M | (2) | SOP-8 | NOTES: (1) Spurious-Free Dynamic Range refers to the magnitude of the lar | ||
| A6N | (8) | 05+ | DIP | Notes: 9. No input may exceed VCC + 0.3V. 10. Device is continuo | |
| A6P | (6) | JEL | SIP-4 | N/A | FR-4 PCB, 2 oz. Copper, minimum recommended pad layout per http://www.dio |
| A6R | (18) | OMRON | 原装 | 08+ | Low-power, high-speed CMOS EPROM technology Fully static design Wide-o |
| A6S | (4) | 05+ | The Z86E30/E31/E40 8-Bit One-Time Programmable (OTP) Microcontrollers a | ||
| A6T | (8) | N/A | OMRON | 05+ | Stanford Microdevices A6T-1104 amplifier is a high efficiency GaAs Hetero |
| A6W | (1) | TAKAMISAWA | DIP-10 | 08+ | The flags are synchronous, i.e., they change state relative to either th |
| A6Z | (1) | The CopperWing12 ADSL Chipset family targets a complete set of solution | |||
| A-7 | (1) | such as a gaussian, or a rectangular pulse then the odd nature of (t-t0 | |||
| A7- | (64) | HARRIS | O7+ | Power supply voltage Power supply current (including analog outputs)1 | |
| A7. | (70) | HARRIS | CDIP8 | 04+ | ER (error signal) is low when normal operation is disturbed by line fault |
| A70 | (102) | KEMET | 2V330UF PB-FREE | 06+ | Two on-chip low-dropout voltage regulators (LDO) are provided to minimize |
| A71 | (36) | 05+ | SMD | Floppy Disk Controller (FDC) Software compatible with the PC8477 (the P | |
| A72 | (25) | N/A | TO-92 | N/A | The power supply operating range of the EL2245 and EL2445 is from 18V d |
| A73 | (14) | SSOP-16 | 05+ | MM74HCT640 transfers inverted data from one bus to the other The MM54HCT | |
| A74 | (13) | CAN3 | N/A | the part number LM26CIM5-TPA has TOS = 85˚C, and programmed a | |
| A75 | (28) | 安捷伦 | SOP | SOP | Chrominance Output A 75 Ω termination resistor with short traces sh |
| A76 | (20) | NSC | O7+ | Stanford Microdevices A760021BFKC055 series is a high performance GaAs He | |
| A77 | (30) | 安捷伦 | SOP | SOP | FEATURES 64 Positions OTP (One-Time-Programmable)1 Set-and-Forget |
| A78 | (42) | AGILENT | DIP-8 | 6+ | • NPT IGBT technology • low saturation voltage • low |
| A79 | (14) | SANYO | SSOP | 07+ | The 74HC/A79106N are dual edge-triggered 4-bit static shift registers ( |
| A7A | (13) | 11 | MICROCHIP | 96/98+ | Parameter VDD to GND VA, VB, VW to GND Maximum Current IWB, IWA |
| A7B | (5) | Notes: 1. The luminous intensity lV, is measured at the mechanical axis | |||
| A7C | (6) | ATMEL | MQFP | 1998 | The LVT574 and LVTH574 are high-speed, low-power octal D-type flip-flop |
| A7D | (3) | ||||
| A7G | (2) | VISHAY | SOT-25 | 6+ | The transceiver provides an internal loopback capability for self-test pu |
| A7K | (1) | CANON | QFP | 97 | 1. Set the heater block temperature to 260C +/- 10C. 2. Use pre-stressed |
| A7L | (1) | While the busy signal is asserted, the host processor is free to perform | |||
| A7M | (3) | The pre-emphasis is used to compensate for long or lossy transmission m | |||
| A7P | (5) | The UCC381 family of low dropout linear (LDO) regula- tors provide a re | |||
| A7T | (1) | Read cycle time Address access time Byte control 1 access time Byte | |||
| A7Z | (1) | † Stresses beyond those listed under absolute maximum ratings may c | |||
| A-8 | (6) | TOREX | 03+ | Source code: ◊ VHDL Source Code or/and ◊ VERILOG Source Code | |
| A8. | (1) | LSI Logic Corporation reserves the right to make changes to any products | |||
| A80 | (421) | INTEL | PGA | N/A | DPL 4519G Programming Interface User Registers Overview Description o |
| A81 | (61) | N/A | 03+ | SOP-8 | Japan Wide 100k/200k L L H H Dont care Dont care Dont |
| A82 | (127) | INTEL | SOP | The Hynix HYM71V16M655HC(L)T6 Series are 16Mx64bits Synchronous DRAM Modul | |
| A83 | (20) | 00 | The parallel I/O interface may be configured for numerous forms of clocki | ||
| A84 | (52) | N/A | SOT-23-6 | 2003 | • High-speed switching (tstg: storage time/tf: fall time is short) & |
| A85 | (17) | PHILIPS | 4532 | 05+ | 1/ Parameter guaranteed by line and load regulation tests. 2/ Bandwidth |
| A86 | (7) | ZILOG | 9917+ | The Xilinx ACE Flash memory card is a CompactFlash solid-state storage | |
| A87 | (13) | 97 | O1+ | can support 4-color display as well as 4-level gray scale display. It di | |
| A88 | (17) | N/A | SOT-89 | The TTL level LOOP pin is used to perform loop-back testing. When LOOP | |
| A89 | (65) | ALLEGRO | PLCC-44 | 07+ | The 318 encoders are a series of CMOS LSIs for remote control system app |
| A8A | (4) | 05+ | SMD | Note: The remote sense feature is not designed to compensate for the for | |
| A8C | (7) | SCM | 9312 | The output stage of the MD1810 has separate power connections enabling th | |
| A8D | (1) | This device contains four independent gates each of which performs the l | |||
| A8E | (1) | PGA | The Si9167 can operate in either fixed-frequency PWM mode or fixed on-ti | ||
| A8I | (1) | Circuit diagrams and other information relating to SMSC products are inclu | |||
| A8L | (3) | 06+ | Receiver Differential Input. Input accepts AC differential signals as smal | ||
| A8M | (1) | Bursts can be initiated with either ADSP (Address Status Processor) or | |||
| A8R | (1) | monitors the RXK and TX. When the two mirror each other there is no fau | |||
| A-9 | (3) | SONY | Current Output, Sourcing Current Output, Sinking Closed-Loop Output I | ||
| A9. | (2) | NOTE: 1. Stresses beyond those listed under ABSOLUTE MAXIMUM RATINGS may | |||
| A90 | (19) | AGILENT | . | This method of determining odd / even field information provides for supe | |
| A91 | (63) | • Low VCE (on) Non Punch Through IGBT Technology. • Low Diod | |||
| A92 | (46) | FAIRCHILD | TO-92 | 2004+ | These 4-bit magnitude comparators perform comparison of straight binary |
| A93 | (28) | † Stresses beyond those listed under absolute maximum ratings may c | |||
| A94 | (15) | FSC | TO-220 | 05+ | The UCC384-ADJ can be programmed for any output voltage between C1.25 V a |
| A95 | (11) | 三极管 | The HT70XX series is a set of three-terminal low power voltage detectors | ||
| A96 | (14) | 5D18 | • High electrical noise immunity • High switching capacity in | ||
| A97 | (8) | TOSHIBA | TO-92 | 04+ | A/D converters are calibrated by positioning their digital outputs exact |
| A98 | (13) | AD | SOP | 05+ | The SMA ZenBlock™ is designed to protect the MOSFET in flyback co |
| A99 | (9) | N/A | DB318C | Soldering/Cleaning Cleaning agents from the ketone family (acetone, me | |
| A9C | (1) | TAOperating free-air temperatureC4085C NOTE 4: All unused inputs o | |||
| A9D | (1) | SCM | 2007 | 4.4.4 Group E Inspection. Group E inspection shall be conducted in | |
| A9E | (1) | A variety of packaging options are available. Dependingonapplicationandp | |||
| A9F | (1) | Data transmission for the DPSK mode requires that data ultimately be tran | |||
| A9P | (4) | HARRIS | SOP-14 | 01+ | Address Inputs for 32M x 64 modules Bank Selects Data Input/Output Row |
| A9S | (1) | • Scanner and Video Control − CIS or CCD scanners suppo | |||
| A9T | (1) | 1 Of the output Power MOS transistors. 2 For a high side switch, the load | |||
| A9W | (1) | Port 2 Port 2 is an 8-bit bidirectional I O port with internal pullups Po | |||
| A-A | (2) | FOCI | na | Once the chemistry is determined, the bq2000 completes the fast charge wi | |
| AA- | (13) | 93 | By combining a conventional thin-film R-2R ladder DAC, a digital offset | ||
| AA0 | (106) | OKI | DIP/64 | After FIR filtering, data can be routed directly to the two external 16- | |
| AA1 | (181) | ASTEC | DC电源模块 | 2007+ | The block diagram on page 1 shows the relationships among the major contr |
| AA2 | (120) | ALPHA | SMD-16 | 02+ | Note 4: All characteristics are measured with a 0.22 µF capacitor f |
| AA3 | (43) | OKT | 原装 | 08+ | The CP3BT10 connectivity processor combines high perfor- mance with the |
| AA4 | (24) | 06+ | These Renesas MultiMediaCards support a second interface operation mode t | ||
| AA5 | (6) | AGAMEM | SSOP | 05+ | NOTES : 1. In case of 40MHz Frequency, CL1 can be supported. 2. Samsung |
| AA6 | (5) | N/A | N/A | N/A | 3.5 nV//Hz Unity-Gain Bandwidth . . . 10 MHz Typ Common-Mode Rejection R |
| AA7 | (13) | ASTEC | SOP | When pin 23 (FIFO/DIR) has a logic "1" applied, the FIFO is in | |
| AA8 | (30) | AGAMEM | TSSOP-8L | 06+ | Seven 22uF/6V X5R ceramic capacitors are used for input bypassing to hand |
| AA9 | (9) | 05+ | PLCC | Provides low speed control functions 30 Mhz execution speed at 4 cycles | |
| AAA | (172) | N/A | 05+ | Ring Command - A low active TTL - Compatible logic input. When enabled, t | |
| AAB | (33) | KOA | SSOP | 04+ | With reference to Figure 4, assume that VDD is rising slowly from zero t |
| AAC | (4) | advantage series | SOT6 | original stock | <Mobile SDRAM> • Power Supply Voltage : 1.7~1.95V • L |
| AAD | (13) | JPC | DIP4+4 | 08+ | Note 1: Absolute Maximum Ratings indicate limits beyond which damage to t |
| AAE | (5) | MAXIM | O7+ | The E-Series DC tachometer generator is the smallest tach generator amo | |
| AAF | (21) | 2008 | In this mode, CS is inactive (high) between serial I/O CLOCK transfers an | ||
| AAG | (4) | MAXIM | 43 | 2005 | Eight 8-bit registers are provided for control, option select, and status |
| AAH | (10) | SOT5 | |||
| AAI | (24) | 66.66MHz clock output for AGP support. AGP-PCI should be aligned with a | |||
| AAJ | (8) | MAXIM | 00+ | Note 1: For the following (Enhanced Plastic) version, check for availabili | |
| AAK | (1) | The signal inputs Yl0-YI7 and UVI0-UVI7 and the back-channel signal input | |||
| AAL | (15) | N/A | N/A | N/A | Supports UXGA Resolution (Output Pixel Rates Up to 165 MHz) Digital Visu |
| AAM | (3) | CMD | 00+ | USOP-8P | The TMP86FM29 is the high-speed, high-performance and low power co |
| AAO | (8) | 2008 | The X76F102 memory array consists of fourteen 8-byte sectors. Read or w | ||
| AAP | (14) | 05+ | QFP | SmartVoltage technology provides a choice of VCC and VPP combinations, | |
| AAQ | (4) | CMD | 00+ | USOP-8P | Stresses beyond those listed under absolute maximum ratings may cause per |
| AAR | (1) | STANLEY | Write-only control and status Read multiple command for data transfer U | ||
| AAS | (3) | AMIS | SMD | AMDs Flash technology combines years of Flash memory manufacturing experi | |
| AAT | (685) | 97 | TSOP | NOTES 1See Figure 1. 2Guaranteed by design and characterization; not pr | |
| AAU | (4) | TSOP8S | 2007+ | The AC16543 are 16-bit registered transceivers that contain two sets of | |
| AAV | (9) | CMD | USOP-8P | 6+ | Both the The MMC2080/2075 are members of the low-power, high-performance |
| AAW | (5) | CMD | USOP-8P | 6+ | High performance 32-bit/40-bit floating point processor optimized |
| AAX | (5) | CMD | 00+ | USOP-8P | A homogeneous film of metal alloy is deposited on a high grade ceramic |
| AAY | (2) | DSI | n/a | 2-channel, 250 kSPS, 10-/12-bit ADCs in TSOT package. Low power consumpt | |
| AAZ | (7) | ph | n/a | Note 11: Two on-chip diodes are tied to each analog input. They will forw | |
| A-B | (1) | Watchdog Adjustable Over- and Undervoltage Detection of Vcc = 5 V Standb | |||
| AB- | (13) | ACEX 1K devices are configured at system power-up with data stored in an | |||
| AB0 | (35) | Alpha Industries | SMD | 07+ | Pixel Clock Output The CH7003, operating in master mode, provides a pixel |
| AB1 | (43) | 05+ | DIP | Register oriented 8/16 bit CORE with RUN, WFI, SLOW, HALT and STOP mode | |
| AB2 | (55) | 04+ | SMD | The ISL6522 provides complete control and protection for a DC-DC convert | |
| AB3 | (15) | TO-92 | 98+ | The two address buses (PMA and DMA) share a single external address bus, | |
| AB4 | (14) | AD | QFP-48 | 05+ | The ST-BUS architecture can be used both in software-controlled di |
| AB5 | (33) | DIP-4 | 04+ | In the interest of memory transfer operation applications, the IS93C56-3 | |
| AB6 | (14) | TI | SSOP20 | 06+ | The Hynix HYM7V651601B F-Series are 16Mx64bits Synchronous DRAM Modules. |
| AB7 | (9) | AD | QFP-48 | 05+ | Important Information and Disclaimer: Information provided by CEL on its |
| AB8 | (29) | M | SMD | 05+ | Apply to pins: SSB, SDI, SCLK, MODE0, MODE1 Input High Voltage (VIH) I |
| AB9 | (8) | ST | 99+ | Switching behavior is most easily modeled and predicted by recogn | |
| ABA | (52) | SSOP | 2001 | These Hall-effect switches are monolithic integrated circuits with | |
| ABB | (15) | MITSUBISHI | PRODUCT PREVIEW information concerns products in the forma- tive or desi | ||
| ABC | (27) | Description The ACPM-7813 is a fully matched CDMA Power amplifier modul | |||
| ABD | (18) | A0-A11 are address inputs sampled during the ACTIVE (row-address A0-A11 | |||
| ABE | (9) | TO-223 | Write accesses to the RTICNTR register will clear the CNTR (21 bit counte | ||
| ABF | (3) | AD | SOT-223 | 05+ | Common mode transient immunity in logic high level is the maximum |
| ABG | (1) | Fabricated in high-density CMOS with 5V-tolerant, TTL-compatible digital | |||
| ABH | (2) | SOP20 | 06+ | Overvoltage Sense. When VOUT is greater than 38V (typ), the internal n-ch | |
| ABI | (1) | SCLK is the clock for the SD serial bus.The data on SD is clocked at the | |||
| ABJ | (2) | Note 1: Absolute maximum ratings are DC values beyond which the device m | |||
| ABK | (10) | CMD | 00+ | USOP-8P | Some data sheets will contain a combination of products with different de |
| ABL | (53) | ABRACON | 2007+PB | The device integrates preamps for stereo differential mics, and includes | |
| ABM | (26) | ABRACON | 2007+PB | The MC68307 (shown in Figure 1) contains a static EC000 core processor, m | |
| ABN | (4) | MIC | Gain Bandwidth Product (G +20) Gain Peaking 0.1dB Gain Flatness Bandw | ||
| ABO | (3) | ATMEL | 06+ | 20000 | Notes: 1. Functional operation under any of these conditions is NOT impl |
| ABP | (2) | ST | QFP | 07+ | Pixel select C Selects between one or two pixels per clock output modes. |
| ABQ | (2) | 2007 | The SMJ320C62x DSP offers cost-effective solutions to high-perfor | ||
| ABR | (5) | PCS | 2008 | Note 15: Skew is defined as the absolute value of the difference between | |
| ABS | (14) | ABRACON | 2007+PB | ³7KLV GRFXPHQW VWDWHV WKH FXUUHQW WHFKQLFDO VSHFLILFDWLRQV UHJDUGLQJ | |
| ABT | (208) | TI | SOP56W | 2007+ | ON Semiconductor andare trademarks of Semiconductor Components Industries |
| ABV | (5) | TOS | 99 | CE1, CE2 Chip Enable Inputs CE1 is active LOW and CE2 is active HIGH. Bo | |
| ABY | (2) | MAXIM | SOT-223 | The change in output voltage due to a specified change in load current. | |
| ABZ | (9) | 05+ | SMD | In addition, the MX93000 supports switches and control registers so tha | |
| A-C | (19) | IBM | LBGA | ||
| AC- | (51) | SONY | 9V电源 | FIFO status flags monitor the extent to which each FIFO buffer h | |
| AC. | (1) | All part numbers end with a place code (not shown), designating the silic | |||
| AC/ | (1) | • Low amperage, E-Rated medium voltage fuses are general pu | |||
| AC0 | (146) | SOP14 | 06+ | Fujitsu resonators C4 series (G type) feature originally developed single | |
| AC1 | (515) | TRIOUINT | 06+ | 7006 | Conventional antenna switch modules used in GSM terminals and other prod |
| AC2 | (235) | N/A | QFN | 04+ | This document is a general product description and is subject to change wi |
| AC3 | (43) | OKT | 原装 | 08+ | Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V |
| AC4 | (48) | TI | QFP | QFP | When using R2 location for a dc current-shunt, please note that the pc- b |
| AC5 | (53) | AT | SOT-163 | 05+ | • RAM expandable externally to 64 kbytes • PLCC and LQFP packa |
| AC6 | (17) | ALPHA | [CAUTION] The specifications on this data book are only given for | ||
| AC7 | (35) | ALPHA | QFN | 0220+ | _a![1]13:30 o_a! SEL |
| AC8 | (35) | The bq2014 recognizes a valid battery whenever VSB is greater than 0.1V t | |||
| AC9 | (14) | AD | SSOP28 | 0322+ | The current consumption of the VCAs will be directly pro- portional to I |
| ACA | (66) | ARTCOM | 97 | The information contained herein is the exclusive property of Prime View | |
| ACB | (124) | N/A | 0805BEAD | The test circuit of Figure 5 is shown with a positive pulse input. For | |
| ACC | (111) | ACCMICRO | PQFP | 1993 | When multiple inputs are programmed to be connected to the same output, |
| ACD | (38) | MICROCHIP | SOP-7.2-18P | 6+ | NOTES: (1) Does not include errors from external gain setting resistors ( |
| ACE | (93) | FAIRCHILD | 05/06+ | Atmel Colorado Springs, USA Atmel Nantes, France Atmel Colorado Springs, | |
| ACF | (220) | 2008 | One bank of five outputs and one bank of four outputs provide nine low-s | ||
| ACG | (17) | 04+ | SMD | Cell phones, for example, often face ASIC functionality limitations. Th | |
| ACH | (286) | ABRACON | 2007+PB | The device is designed for dual power supply operation. Sup- ply pin VDD | |
| ACI | (84) | AMIS | PQFP100 | The ACI1 is a high performance , very low power CMOS Static Random Access | |
| ACJ | (9) | NAIS | 继电器 | 30630 | But, 5 V VCC provides the highest read performance. VPP at 2.7 V, 3.3 V |
| ACK | (7) | VELIO | 02+ | BGA | s Bluetooth controller including scrambling, CRC generation and checking, |
| ACL | (324) | N/A | N/A | This family is a 16M bit dynamic RAM organized 2,097,152 x 8-bit configura | |
| ACM | (305) | N/A | Includes RxPGA, ADC pipeline, and ADIO bus delay relative to fADC. | ||
| ACN | (24) | 0603X2 | This family of CMOS analog switches offers low resistance switching per | ||
| ACO | (34) | ABRACON | 2007+PB | Enhanced N channel FET with no inherent diode to Vcc 5Ω bidirectio | |
| ACP | (342) | AGILENT | 08+ | When WEN2/LD is held LOW during Reset, this pin is the load (LD) enable | |
| ACQ | (2) | NIE | 02+ | Electrostatic discharge can cause damage ranging from perfor- mance degr | |
| ACR | (54) | ACR | H - High-Terminal Potentiometer. This is the high terminal of the potenti | ||
| ACS | (375) | ST | DIP-20/TUBE | 04+ | The device also includes a 1 volt regulator capable of sourcing u |
| ACT | (709) | 132500 | 0137+ | NOTE: In the Fixed/ADJ version, the adjustable output voltage VO2 is desi | |
| ACU | (62) | HITACHI | 02+ | QFP | When LE is LOW, the state of the segment outputs (Qa to Qg) is determine |
| ACV | (58) | NAIS | 继电器 | -0.5V. During voltage transitions, A9, OE and RESET may o | |
| ACW | (6) | Infrared mode enable (active high). This pin is sampled during power up, | |||
| ACX | (14) | TI | 03/04+ | When the receiver is placed in the power-down (sleep) mode, the output im | |
| ACY | (26) | MOTOROLA | CAN3 | 02+ | Stresses beyond those listed under Absolute Maximum Ratings may cause per |
| ACZ | (20) | N/A | 6. Multifunctional, high-precision analog-to-digital converter The | ||
| AD | (1) | BNC connector sockets allow connection to test instruments via 50 cables | |||
| AD- | (40) | AD | QFP | 03+ | In addition to the four local-bus connections, a cell receives two input |
| AD. | (2) | N/A | DIP | 94 | t18 NOTES 1. OUTPUT DELAY MEASURED FROM THE 50% POINT OF THE RIS |
| AD/ | (50) | N/A | N/A | N/A | Notes: 1. With 50% of the outputs simultaneously sinking 12 mA, up to a |
| AD0 | (286) | DIP | Stresses beyond those listed under absolute maximum ratings may cause pe | ||
| AD1 | (2617) | AD | SSOP | 05+ | Important Information and Disclaimer:The information provided on this pag |
| AD2 | (1010) | AD | DIP | 97 | The ISSI IS62LV12816LL is a high-speed, 2,097,152-bit static RAM organiz |
| AD3 | (405) | The T0800 is a laser diode driver for the operation of two different, gro | |||
| AD4 | (648) | The IDT70V3579 is a high-speed 32K x 36 bit synchronous Dual- Por | |||
| AD5 | (4332) | AD | 04+ | 3. "Maximum allowable voltage" is that value at maximum contact | |
| AD6 | (1951) | AD | Read cycle time Address access time Chip select access time Output enab | ||
| AD7 | (8135) | AD | QFP1420-100 | The TLE 4476 is a monolithic integrated voltage regulator providing two o | |
| AD8 | (4684) | AD | SOP8 | 00+ | The signature mode provides access to a binary code identifying the manuf |
| AD9 | (2935) | AD | AUCDIP | For safety, the bq24400 inhibits fast charge until the battery voltage | |
| ADA | (341) | ADI | 07+ | The CY74FCT16841T and CY74FCT162841T are 20-bit D-type latches designed | |
| ADB | (18) | SOP | Two-frame transmit and receive PCM slip buffers Clock rate adapter synth | ||
| ADC | (2023) | NS | SMD | 杂 | 8. Guaranteed by Design. 9. This parameter is guaranteed by design but |
| ADD | (198) | ADI | 06+ | 500 | † Typical values are at VCC = 5 V, TA = 25C. ¶ This parameter |
| ADE | (219) | MINI | 08+ | High speed instrumentation Scope and logic analyzer front ends Window c | |
| ADF | (445) | ADI | 07+ | • In the case of the MB89PV960, add the current consumed by the EPR | |
| ADG | (2044) | ADI | 07+ | current specifications. The correct current designation for a CSR part n | |
| ADH | (20) | AD | 05+ | SOP-3 | − Provide software confirmation of completion of program or |
| ADI | (63) | APPIAN | QFP100 | When the receiver is placed in the power-down (sleep) mode, the output im | |
| ADJ | (21) | AD | SSOP8 | These TTL encoders feature priority decoding of the inputs to ensure that | |
| ADK | (4) | SHARP | 06+ | • Wide frequency rangeC15.0MHz to 250.0MHz • User specified t | |
| ADL | (137) | TDK | 8Pin | 08+ | The SY89833L is a 3.3V, high-speed 2GHz differential Low Voltage |
| ADM | (3276) | AD | SSOP16 | 05+ | The LM78LXX is available in the plastic TO-92 (Z) package, the plastic |
| ADN | (248) | AD | new | • Programmable Switch Mode Controller module: - PWM and PSM | |
| ADO | (127) | The HYM72V32M736B(L)T6 Series are 32Mx72bits Synchronous DRAM Modules. The | |||
| ADP | (1855) | AD | STK | 2005+ | Programmable 28-bit serial number Programmable 64-bit encry |
| ADQ | (7) | MINI | 08+ | Sector data protection is afforded by methods that can disable any combin | |
| ADR | (692) | AD | SMD | 96+ | puts are controlled by an Output Enable (OEn) input. When OEn is LOW, th |
| ADS | (4447) | TI | 07+ | In order to improve the driving capability an external pull-up resistor | |
| ADT | (362) | AD | 08+ | A: The value of R JA is measured with the device mounted on 1in FR-4 boar | |
| ADU | (558) | ADI | 07+ | The DDU7C tolerances are guaranteed for input pulse widths and periods gr | |
| ADV | (661) | AD | PLCC | 04+ | |
| ADW | (13) | N/A | AD/PMI | 04+ | The major functional blocks of the PSD3XX include: • Two pr |
| ADX | (140) | MAX | SMD | 9826+ | • TOSHIBA is continually working to improve the quality and reliabil |
| ADY | (7) | AD | TSSOP | 03+ | (2) The technical information described in this material is limited to sh |
| ADZ | (35) | ADI | 07+ | Should the Buyer purchase or use a Samsung product for any such unintende | |
| AE- | (7) | QFP | 98+ | Reference level for the relative attenuation arel of the TFS 282 A is the | |
| AE0 | (10) | 95 | • Instruction set to optimize controller applications Rich | ||
| AE1 | (27) | OKI | . | 83+ | |
| AE2 | (48) | AE | 8 | Leads are Readily Solderable Lead and Mounting Surface Temperature for S | |
| AE3 | (13) | MOT | 04+ | Digital signal processing with the 16-bit RISC performance enables effect | |
| AE4 | (15) | 00 | The AMC5902 contains a direct PWM control system for spindle and two sl | ||
| AE5 | (27) | 06+ | 6 | RLOAD = 25 W to VDD connected to pin IOUT. Sink current is controlled by | |
| AE6 | (1) | ON | SOP-8 | 04+ | Typicals represent average readings at 25C, VDD = 5 V. R |
| AE7 | (14) | Chip-Rail | ★Original and new, Special price! | 07+ | INSTALLATION AND OPERATION - Unit shall be easily field connected to a 120 |
| AE8 | (3) | N/A | NEW | 93+ | UTC assumes no responsibility for equipment failures that result from usin |
| AE9 | (6) | The MSP430 has one active mode and five software selectable low-power mod | |||
| AEA | (26) | avago | 0 | 0 | As shown in figure 3, the input current is below 100 µA (at |
| AEB | (3) | SM6610 series is high-accuracy temperature sensor IC in the ultra small p | |||
| AEC | (8) | AAEON | new/original | 07/08+ | |
| AED | (89) | AGILENT | 08+ | All switchers are synchronized to the internal 1.2MHz clock, allowing the | |
| AEE | (66) | ASTEC | new/original | 07/08+ | Low cost Resolution better than 1milli-g at 1Hz Dual axis accelerometer |
| AEF | (4) | N/A | N/A | N/A | The ITI7004G2-LC hosts two of LSI Logics LSIFC929, 2 Gbit controll |
| AEH | (98) | ASTEC | new/original | 07/08+ | Certain I/O lines not being used by disabled peripherals can be reconfig |
| AEI | (97) | MITSUBUSHI | 00+ | The MAX1698 features digital soft-start and adjustable lossless LED curre | |
| AEJ | (2) | 138 | MAXIN | The ispGAL22LV10 has a product term for Asynchronous Reset (AR) and a p | |
| AEK | (2) | CMD | 00+ | USOP-8P | The MAX8597/MAX8598/MAX8599 voltage-mode PWM step-down controllers are de |
| AEL | (17) | CMD | 00+ | USOP-8P | Resistive Element Electrical Travel Resistance Range Stocked Range Sta |
| AEM | (1) | 22 | ST | 01+ | All Agilent data sheets report the creepage and clearance inherent to th |
| AEN | (1) | The Hynix HY5DU12422(L)T, HY5DU12822(L)T and HY5DU121622(L)T are a 536,870 | |||
| AEO | (170) | SOP20 | 06+ | These 8-bit latches feature 3-state outputs designed specifically for dri | |
| AEP | (2) | 06+ | SOP-5 | To get an accurate picture of power consumption for an AC system, we ne | |
| AEQ | (55) | ASTEC | A buffered output-enable (OE) input can be used to place the eight output | ||
| AER | (4) | SMD-14 | 05+ | After each 24-hour period has elapsed, the battery is connected to an inte | |
| AES | (13) | NEURO | 2006 | The MAX1698 features digital soft-start and adjustable lossless LED curre | |
| AET | (3) | PLCC | Specifications at TA +25C are guaranteed by production testing. Specifica | ||
| AEV | (16) | ASTEC | new/original | 07/08+ | • TOSHIBA is continually working to improve the quality and reliabil |
| AEW | (1) | MOT | PLCC44 | 07+ | The TMS320LF240xA and TMS320LC240xA devices, new members of the TMS320C24 |
| AEX | (2) | ALCATEL | BGA | N/A | In connection mode, the addresses of input source for all output channels |
| AF- | (8) | QFP | 04+ | Features < 3.3V DC / DC converter > ∙ Intended | |
| AF0 | (15) | AI | SOT23 | 05+ | This link option sets the voltage applied to the VDRIVE pin on the AD7472 |
| AF1 | (45) | NSC | 93 | The device is available with access times as fast as 70 ns. The devices a | |
| AF2 | (35) | Siemens AG | n/a | The AT49BV16X4(T) is 2.7 to 3.6 volt 16-megabit Flash memory organized as | |
| AF3 | (14) | AIC | N/A | 05+ | These Motorola accelerometers contain an onboard single-pole swit |
| AF4 | (26) | ADI | ZIP-18 | 08+ | Conexant products are not intended for use in medical, lifesaving or life |
| AF5 | (2) | 98+ | QFP | The IRU3004/IRU3005 series of controller ICs are spe- cifically designed | |
| AF6 | (4) | MOT | CAN | These Precision Optical Perform- ance AlInGaP LEDs provide superior ligh | |
| AF7 | (1) | PHIL | *The data output functions may be enabled or disabled by various signals | ||
| AF8 | (9) | INTEL | 2008 | Description Clock input Gate for outputs Q1 through Q5. When G1 is LOW | |
| AF9 | (12) | AC | SOP8 | 05+ | PFM: This is the programming pin for the PFM (pulse frequency modulation) |
| AFA | (2) | MAX | O7+ | The Philips Semiconductors FAST loads solve this problem by reducing the | |
| AFB | (84) | AGILENT | 08+ | This circuit consists of four independent, high gain, internally freque | |
| AFC | (98) | AGILENT | 08+ | Approvals • UL Recognized: File Number E76270 • CSA Certifi | |
| AFD | (3) | NULL | SOP | 223 | Stresses in excess of the absolute ratings may cause permanent damage. Fu |
| AFE | (77) | TI | 07+ | 2. MATERIAL: Units are encapsulated in a low thermal resistance molding | |
| AFF | (6) | BB | 00+ | Unless otherwise noted TC = 25C, CC = 18pF, RC = 2.2KΩ. DC input s | |
| AFG | (4) | MICROCHIP | QFN-8P小体 | 6+ | In a typical video application, the AFGA clamps the sync tip to a known v |
| AFH | (3) | MICROCHIP | QFN-8P | 07+ | The device is entirely command set compatible with the JEDEC single-powe |
| AFI | (2) | TI | TSSOP14 | 06+ | An easy-to-use simulation tool is available for download and can be used |
| AFK | (6) | (*) Typical temperature coefficient for all VDD value is 0.3 %/C. (1) In | |||
| AFL | (12) | high-frequency tube | SANYO | 04+ | test for dry air, and other media, are available from the factory. Conta |
| AFM | (20) | 7 | This device is similar in function to the LCX244 while pro- viding flow- | ||
| AFO | (5) | MSOP | 04+ | Glass passivated triacs in a plastic envelope, intended for use in app | |
| AFP | (2) | The information provided herein is believed to be reliable; however, BURR | |||
| AFQ | (1) | The Rambus ® RIMMTM module is a general purpose high-performa | |||
| AFR | (2) | 04+ | Note 1: Absolute maximum ratings indicate limits beyond which damage to t | ||
| AFS | (3) | TSOP28 | 02+ | Ultra Low Quiescent Current - 12mA for High Voltage Stage 110V Peak to P | |
| AFT | (4) | N/A | N/A | N/A | The EasyVoiceTM has a built-in RC oscillator which requires only one ext |
| AFV | (2) | 00+ | We reserve the right to make changes to improve technical design | ||
| AFX | (1) | N/A | CAN12 | 6. The Bypass Mode test conditions are required only for the production t | |
| AFY | (10) | sgs | n/a | In the MBM29DL16XTE/BE, a new design concept is implemented, so called Sl | |
| AFZ | (3) | 金属帽 | 2SO | A precision delta-sigma digitizer is used to make the measurement. An ov | |
| A-G | (1) | TOSHIBA | An RC network may be connected to this pin in order to hold the pin voltag | ||
| AG- | (2) | WJ | (LX)high-frequency | Note: These are stress ratings only. Stresses exceeding the range specifi | |
| AG0 | (18) | HIT | QFP | 02+ | The digital inputs are CMOS-compatible and equipped with a built-in pull- |
| AG1 | (27) | airgo | O7+ | Conclusion As digitizing systems increase in speed, aperture effects pl | |
| AG2 | (17) | WJ | SMT-86 | n Software selectable I/O options (TRI-STATE ® Output,Push-Pu | |
| AG3 | (14) | WJ | SOT363 | The OPA727 and OPA728 series op amps use a state-of-the-art 12V analog | |
| AG4 | (15) | WJ | SOT-86/89 | 03+ | CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RI |
| AG5 | (8) | WJ | SOT89 | 2006 | The AWL9224 is manufactured using advanced InGaP HBT technology that offe |
| AG6 | (18) | WJ | SOT-89 | 03+ | Information in this document is provided in connection with Intel products |
| AG7 | (2) | DETECT CIRCUITRY If an alarm condition is detected, the oscillato | |||
| AG8 | (14) | AMD | 550 | The bq29312A is a 2-, 3-, or 4-cell lithium-ion battery pack protection | |
| AG9 | (2) | TI | 00+ | These circuits perform a single function: they assert a reset signal when | |
| AGA | (2) | QFN | N/A | The CPU features two sets of functional units. Each set contains four uni | |
| AGB | (6) | ANADIGICS | O7+ | • True Dual-Ported memory cells which allow simulta- neous a | |
| AGC | (12) | TEMIC | 2008 | SYSTEM INTERFACE FEATURES Host Port with DMA Capability for Glueless 8- | |
| AGD | (4) | ALCATEL | 07+ | Controllable volume 12 keys Key options C Stop key: KEY12 C Random (on | |
| AGE | (16) | 06+ | DIP-28 | The bq2000 is a programmable, monolithic IC for fast-charge manage- ment | |
| AGF | (1) | BGA | Over-Current & Over-Temperature Protection: To protect against short | ||
| AGG | (2) | The FETKY family of co-packaged MOSFETs and Schottky diodes offers the d | |||
| AGI | (1) | ZILOG | DIP18 | 91+ | Single chip low power UHF transmitter 369.5 MHz to 395.9 MHz frequency o |
| AGK | (9) | NAIS | SMD-6P-3V | Revision Date Revision Description Mar, 20020.1Draft Apr, 20020.3Preli | |
| AGL | (4) | AGILENT | 05+ | Min Typ Max Min Typ Max UnitsTest Conditions 320 320VApplied drain-to- | |
| AGM | (3) | ALCATEL | 07+ | Pin-for-pin compatibility with the MC68EC000 in the plastic QFP and TQFP | |
| AGN | (42) | airgo | 0602+0608 | BGA | In addition to its masked-ROM versions, the H8/3048 Series has a ZTATT |
| AGO | (1) | In operation, the output transistor is OFF until the strength of t | |||
| AGP | (8) | Battery Life Logic Level Gate Drive − Can Be Driven by Logic ICs | |||
| AGQ | (34) | EMERSON | SOP | DETAILED FEATURES High Definition Programmable Features (720p/1080i) &n | |
| AGR | (52) | ST | 07+ | You can, however, measure the V-I demand of a motor (or any other load) | |
| AGS | (2) | 14 | MITEL | 01+ | Notes: 1. In-band EI 115.2 kb/s. 2. In-band EI 0.576 Mb/s. 3. Lo |
| AGT | (1) | (6) When designing your equipment, comply with the guaranteed values, in | |||
| AGU | (3) | PHI | TSOP14 | 8051 core, 12MHz operating frequency with double CPU clock option, 3.3V po | |
| AGW | (2) | Logic to logic isolator Programmable current level sensor Line receive | |||
| AGX | (24) | XTEC | QFP208 | n Supports high-efficiency PowerWise Technology Adaptive Voltage | |
| AGY | (1) | MAXIM | 04+ | QFN | This document is a general product description and is subject to change w |
| AGZ | (1) | ALCATEL | PLCC84 | 05+ | The LCX16373 contains sixteen non-inverting latches with 3-STATE outputs |
| A-H | (1) | The 256Mb SDRAM is a high-speed CMOS, dynamic random-access memor | |||
| AH- | (6) | ON | The ADC0832 multiplexer is software configured for single-ended or differ | ||
| AH0 | (57) | N/A | N/A | N/A | SDRAM read and write accesses are burst oriented starting at a selected |
| AH1 | (81) | 07+ | Note 1: Absolute Maximum Ratings are those values beyond which the life | ||
| AH2 | (36) | N/A | N/A | N/A | 1. High-performance CPU The ML66525 family devices include the hi |
| AH3 | (38) | AD | DIP | The HYM72V64756B(L)T8 H-series are high speed 3.3-Volt synchronous dynamic | |
| AH4 | (1) | AH | 2007+ | The maximum power that can be safely dissipated is limited by the | |
| AH5 | (12) | NS | DIP-14 | FREQUENCY RESPONSE 3dB Bandwidth TEMPERATURE OUTPUT Tout | |
| AH6 | (1) | MOTO | QFP | 9343 | One inter-integrated circuit (I2C) port Supports master and slave modes |
| AH7 | (3) | PANASONIC | DIP | 91 | The KS8721BL/SL automatically configures itself for 100Mbps or 10Mbps a |
| AH8 | (14) | TI | TSSOP | 99+ | − Glueless Interface to Asynchronous Memories: SRAM and EPRO |
| AHA | (42) | QFP | The MC623 is a 3.0 V solid-state, programmable temperature sensor | ||
| AHC | (172) | SOP20 | 06+ | When no data transfer is required, the power-down mode can be used. The s | |
| AHD | (2) | A 75 Ω termination resistor with short traces should be attached be | |||
| AHE | (4) | ADAVNCED | 02+ | The GS1545 is a high performance integrated Equalizing Receiver designed | |
| AHF | (2) | NAIS | *Stress above the listed absolute maximum rating may cause permanent damag | ||
| AHI | (6) | WATKINS | 01+ | In the EDO page mode, read (data out) and write (data in) cycles c | |
| AHJ | (1) | NOTES: 2. When the differential input voltage (VI+ C VIC) is less than or | |||
| AHK | (16) | AATI | SOT-23 | The Hyundai HYM71V75S3201 N-Series are 32Mx72bits ECC Synchronous DRAM Mod | |
| AHL | (8) | 98 | Multi-function Input One (1): If Mode = L (m68 mode), Read/Write* pin, | ||
| AHM | (3) | When the CAT24FC17 begins a READ mode, it trans- mits 8 bits of data, r | |||
| AHN | (12) | 95 | PLCC | It should be remembered that a watchdog timer cannot detect a fault insta | |
| AHP | (3) | N/A | WEN2-WEN2B, WEN3-WEN3B and WEN4-WEN4B are LVDS input pins with 100Ω | ||
| AHQ | (1) | N/A | SOT-3 | 08+ | The MAX3030ECMAX3033E family of quad RS-422 transmitters send digital dat |
| AHR | (8) | 1. Ultra-low current consumption 2. Low operating limit voltage 3. Outpu | |||
| AHT | (9) | PHILIPS | SSOP/TSSOP | 03+ | |
| AHW | (1) | MOTOROLA | (LX)high-frequency | Fairchild's RUF series of Insulated Gate Bipolar Transistors (IGBTs) prov | |
| AI- | (29) | HAR | DIP | 01+ | This package is fully binned by color and intensity, except for red c |
| AI. | (3) | HARRIS | CDIP | 04+ | *The maximum junction temperature rating of the power chips integrated wi |
| AI0 | (1) | 1. Hitachi neither warrants nor grants licenses of any rights of Hitachis | |||
| AI1 | (10) | A1PORS | SOP | 04+ | TX voice (Mic.) inputs, selectable by SW1 available for handsfree mic./ha |
| AI2 | (9) | A1PROS | Notes: 1. Repetitive Rating : Pulse width limited by maximum junction tem | ||
| AI3 | (4) | AIPROS | 00+ | 8-bit microcontroller ROMless, 128KByte and 256KByte ROM options 16 bit | |
| AI4 | (2) | A1PORS | QFP32 | 06+ | 1.1 Scope. This specification covers the detail requirements for m |
| AI5 | (6) | N/A | N/A | N/A | The A64 device also has an external clock prescaler (ECP) module that, wh |
| AI6 | (2) | Very Low Dropout Voltage 800 mA Output Current High Output Voltage Ac | |||
| AI8 | (1) | 1. Data patterns are to have maximum run lengths and DC balance shifts no | |||
| AIA | (4) | TKS | DIP | 2002 | Note: Stresses greater than those listed under MAXIMUM RATINGS may cau |
| AIC | (1961) | AIC | 99+ | TO252/2 | This product paves the way for a smaller, lighter, easier to produce, |
| AID | (1) | ||||
| AIE | (1) | Array Description The AIE-A0311Z is comprised of a resistor array (see F | |||
| AIF | (81) | N/A | N/A | N/A | VB: Supplies power to all circuits of the regulator except the output pow |
| AIH | (49) | ASTEC | •Program control unit (PCU) •DMA controller (w | ||
| AIK | (2) | 07+ | FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN | ||
| AIM | (15) | SMD-8 | 05+ | Abstract A two-stage 1.9GHz monolithic low-noise amplifier (LNA) with a m | |
| AIN | (2) | SHA | 07+ | 500 | The write operation is controlled by three clocks, SWCK, RSTW, and WE. Wri |
| AIP | (3) | QFP144 | The AIPCI-227A/AIPCI-227A/AIPCI-227A are low-on-resis- tance, low-voltage | ||
| AIQ | (1) | The LMH6714/6720/6722 series offer exceptional video per- formance with | |||
| AIR | (1) | ||||
| AIS | (17) | AMIS | 06+ | 500 | The SA2400A is a fully integrated single IC RF transceiver designed for |
| AIT | (32) | 00 | • TTL-Compatible 5-Bit Digital Output Voltage Selection - W | ||
| AIV | (2) | C-CUBE | 1999 | † Stresses beyond those listed under absolute maximum ratings may c | |
| AIY | (1) | RS-232 drivers must also supply output current for driving the input resi | |||
| AIZ | (1) | • CATV Systems Operating in the 40 to 870 MHz Frequency Range • | |||
| A-J | (1) | NOTES 1. TYPICAL - measured on characterization board. 2. Characterized | |||
| AJ- | (4) | The AJ-012-6-D-1/AJ-012-6-D-19 controllers provide a complete power-manag | |||
| AJ/ | (1) | This device contains circuitry to protect the inputs against damage due | |||
| AJ0 | (10) | 95 | After the switch-over mode the watchdog operates in short watchdog mode a | ||
| AJ1 | (12) | N/A | Data is shifted into an eight bit shift register The first bit of the da | ||
| AJ2 | (12) | TEM | 07+ | 10000 | 1A Peak Output Drive Capability 0.8V Reference Voltage Shuts off both dr |
| AJ3 | (13) | AGILENT | PDIP8 | 02+ | The demodulated chrominance signal and the luminance signal are passed t |
| AJ4 | (16) | SIMULA | 04+ | • Especially suitable for applications from 400 nm to 1100 | |
| AJ6 | (24) | N/A | SOP | N/A | Bidirectional 8-bit input/output port. Software instructions determine the |
| AJ7 | (6) | ADRS | Voltage Output Models Three settling times are specified to 0.01% of ful | ||
| AJ8 | (14) | N/A | Max. UnitsConditions CCCSVDS = 15V, ID = 3.8A 57ID = 3.8A | ||
| AJ9 | (5) | TI | TSSOP-24 | Device programming occurs by executing the program command sequence. This | |
| AJB | (1) | The DMA controller is a state-driven address and control signal generato | |||
| AJC | (1) | The result of the coercive field of the magnetic circuit With a di/dt of | |||
| AJE | (2) | MAT | TO-126 | 03+ | Compatible with Microsoft WinXP, WinME, Win2K SP3, Apple OS10, Softconnex |
| AJM | (1) | NAIS | NO继电器 | • AN765, Using Microchips Micropower LDOs, DS00765, Microchi | |
| AJR | (1) | The AD1833A has a very flexible serial data input port that allows gluel | |||
| AJS | (1) | Military temperature range Output skew 2.0 ns typical Input to outpu | |||
| AJV | (1) | Matsushita | 00209H | Input of current sense comparator, it is enabled only during operating mo | |
| AJW | (1) | MATSUSHITA | 07+/08+ | Where: CL is the load capacitance as specified by the crystal manufacture | |
| AJY | (1) | MAT | 5P | 07+/08+ | 150V Power Schottky rectifier are suited for switch Mode Power Supplies |
| AK- | (7) | Operating from a wide-input voltage range of 7 V to 36 V, the PTN78000 pr | |||
| AK0 | (56) | PERFORMANCE FEATURES 6.25 ns Instruction Cycle Time, for up to 160 MIPS | |||
| AK1 | (61) | alpha/sk.. | SOP | 06+ | • TOSHIBA is continually working to improve the quality and reliabi |
| AK2 | (161) | N/A | The CDC305 contains eight flip-flops designed to have low skew between ou | ||
| AK3 | (38) | MCL | SOP | 98+ | FF/IR and AF are synchronized to the port clock that writes data into i |
| AK4 | (441) | AK | QFP | diodes to protect the buffer and LED from a wide range of over- voltag | |
| AK5 | (178) | AKM | QFP | 0110+ | NOTE: 1. This parameter is warranted but not production tested. The prop |
| AK6 | (133) | N/A | This device features an internal 200KHz oscillator, un- der-voltage locko | ||
| AK7 | (36) | SOP-3.9-16P | 6+ | Transmit analog input and transmit level adjustment. AIN+ is a non-invert | |
| AK8 | (121) | N/A | N/A | N/A | Output voltage is set to a nominal value between 26V and 28V, by an inte |
| AK9 | (101) | ASTEC | |||
| AKA | (2) | ZILOG | DIP | N/A | |
| AKB | (3) | TO-223 | NOTES 1Typicals represent average readings at 25C and VDD = 5 V, VS | ||
| AKC | (1) | AKM | SOP | tions. For burst operations, the device additionally requires Power Sav | |
| AKD | (9) | ANADIGICS | 04+ | • On-chip elasticity buffer for PHY signal re-timing to the | |
| AKE | (1) | Piezo-resistive pressure sensors exhibit excellent sensitivity and reprodu | |||
| AKF | (8) | TO-223 | The UCC383 provides unique short circuit protection circuitry that redu | ||
| AKG | (1) | Similar To Industry Standard LT1084 Approved To DESC Standardized Milit | |||
| AKI | (1) | GIC | 06-07+ | ||
| AKJ | (2) | SOP16 | The Motorola accelerometer is a surface-microma- chined integrate | ||
| AKK | (2) | SONIX | SSOP20 | 04+ | A unique feature of the ISL6310 is the combined use of both DCR and rDS(O |
| AKL | (5) | NVE | QFN | 06+ | The NCP1050 through NCP1055 are monolithic high voltage regulator |
| AKM | (68) | AKM | SMD | Reliable sync pattern detection, sync signal protection and interpolation | |
| AKN | (10) | FRANKHN | O7+ | 3rd Order Intermodulation Distortion (VDD = 26 Vdc, Pout = 9.5 W | |
| AKO | (11) | DIP | 05+ | DISABLE (Disabled Low) Power Down Supply Current (+VS) Disable Time E | |
| AKP | (2) | AK | 08+ | NOTE: (1) Stresses above these ratings may cause permanent damage. Expos | |
| AKS | (3) | Total memory size is 128 Kbytes, equivalent to a total chip storage (trans | |||
| AKV | (1) | FAIRCHILD | DIP-8 | 06+ | Fully integrated DC/DC converter High efficiency over large |
| AKW | (1) | The Triple Clock and Reset module provides the clock sig- nals required | |||
| AKX | (1) | The LTC®1628-SYNC is a high performance dual step- down switching reg | |||
| AKZ | (23) | SOP | Near-Depleted Battery Preconditioning Monitors Battery Temperature Bui | ||
| AL- | (31) | 378 | HIT | 00+ | When the squelch is off, the transmission path is enabled and data is fed |
| AL0 | (66) | 05/06+ | The base timer is an 8-bit counter with a 1MHz clock source. The base time | ||
| AL1 | (74) | ALLAYER | QFP/208 | 00+ | This device is a low cost, high speed, JFET input operational amplifier w |
| AL2 | (37) | National | 2784 | 02+ | Note 6: Parameter measured at trip point of latch with Pin 2 at 0V. Note |
| AL3 | (18) | ALLAYER | QFP2828-208 | 00+ | Ground connection. For best performance, keep traces physically short an |
| AL4 | (26) | SOP | N/A | The adjustable version of the FAN2502/03 includes an input pin ADJ which | |
| AL5 | (13) | TOSHIBA | 05+ | DISCUSSION OF TILT APPLICATIONS AND RESOLUTION Tilt Applications: One of | |
| AL6 | (55) | A | Note 3 a) In addition the voltage between the V a pin and either input pin | ||
| AL7 | (9) | AVERLOGIC | QFP | 0503+ | *Note: An in-band optical signal is a pulse/sequence where the peak wavel |
| AL8 | (31) | altek | 5 | BGA | The OPA703 and OPA704 series are fully specified and guaranteed over the |
| AL9 | (10) | 2007 | When a valid DTMF signal burst is present, ESt or DStD will go high. The | ||
| ALA | (17) | infineon | 07+ | Fully pipelined 24-bit 24-bit parallel multiplier-accumulator (MAC) Bi | |
| ALB | (6) | TI. | 00+ | TSSOP | An external fine trim may be desired to set the output level to exactly |
| ALC | (152) | PLCC | Glass passivated junction. 500W Peak Pulse Power capability on 10/1000 | ||
| ALD | (163) | ALD | 02+ | The ADR370 is a low cost, 3-terminal (series) band-gap voltage reference | |
| ALE | (10) | NAIS | Relay(new original) | ||
| ALF | (11) | N/A | N/A | N/A | A memory cycle is initiated by bring RAS LOW and it is terminated by re |
| ALG | (33) | adv.logic | adv.logic | dc94 | Hynix HYMD264646B(L)8J-J series is designed for high speed of up to 166MHz |
| ALH | (49) | ascene | 2007 | AEC-Q100† Qualified for Automotive Applications Customer-Specific | |
| ALI | (11) | N/A | QFP | N/A | The HCPL-7800 high CMR isolation amplifier provides a unique combinat |
| ALK | (2) | NAIS | NOTE: Device will meet the specifications after thermal equilibrium has b | ||
| ALL | (7) | PHILIPS | SMD | 06+ | Control information and data are written into or read-back from COMBO I |
| ALM | (21) | AGILENT | 05+ | The eight latches of the BCT373 devices are transparent D-type latches. W | |
| ALN | (1) | Note 1: Absolute Maximum Ratings indicate limits beyond which damage to t | |||
| ALO | (186) | ASTEC | new/original | 07/08+ | Frequency, Channel#1/Channel#2 Modulation Frequency deviation Max. RF |
| ALP | (227) | • Undervoltage Lockout • Low Profile Package (12mm) • | |||
| ALQ | (131) | ASTEC | Warning: SSS and FSS must never be low at the same time. When both SSS an | ||
| ALS | (261) | SOP14M | 2007+ | The analog input RGB signals are first sampled by three channels of 8-bit | |
| ALT | (36) | ASTEC | new/original | 07/08+ | The memory controller produces the driving signals (RA, RB, WT, RE) and t |
| ALU | (9) | DIP | ‡ Stresses beyond those listed under absolute maximum ratings may c | ||
| ALV | (114) | SOP56 | 06+ | Information contained in this publication regarding device applications a | |
| ALZ | (5) | Panasonic | Relay(DZ) | *50225F | All communications must be terminated by a stop condi- tion. The stop c |
| AM- | (98) | NSC | SO-8 | 06+ | High-Performance Crossbar Switch. A high-performance crossbar switch acts |
| AM. | (1) | TI | SOP16S | 2007+ | Reading from the device is accomplished by taking Chip En- able (CE) an |
| AM0 | (24) | 07+ | The 10 MHz CD outputs are enabled for about 1 µs at approximately | ||
| AM1 | (435) | amd | amd | dc02 | The AM186EM33VCW is a highly integrated microcircuit incorpo- rating two |
| AM2 | (7243) | AMD | LCC18 | Following a START condition the bus master must output the address of t | |
| AM3 | (155) | AMD | DIP40 | 9251+ | Referenced to VCCA Voltage VCC Isolation Feature − If Either VCC In |
| AM4 | (264) | AMD | 05+ | Notes: 1. These are the values at the minimum cycle time. Since the curr | |
| AM5 | (152) | MOTOROLA | (LX)high-frequency | The SN74GTLPH1645 is a high-drive (100-mA), 16-bit bus transceiver partit | |
| AM6 | (117) | AMD | DIP-8 | 8509 | FEATURES D Integrated Drive Regulator (4 V to 14 V) D Adjus |
| AM7 | (1366) | AMD | DIP | 06+ | The high-current output drivers consist of MOSFET output devices, which s |
| AM8 | (376) | AMD | DIP | UC3874-1 is designed for logic level MOSFETs and has UVLO turn-on and t | |
| AM9 | (671) | AMD | Operating voltage range: 4.5V to 5.5V CMOS technology for | ||
| AMA | (32) | AMTEK | 04+ | SOP8 | 1. This document may, wholly or partially, be subject to change without n |
| AMB | (29) | IDT | BGA | 2006 | In this mode, CS is inactive (high) between serial I/O CLOCK transfers an |
| AMC | (359) | ADD | 0347 | Compatible with ADATâ Type I and II formats 4 stereo pairs as out | |
| AMD | (230) | AMD | 02+ | BGA3535 | Low crystal current oscillator Up to 40MHz operating frequency range (fu |
| AME | (512) | AME | 07+/08+ | Note 5: Maximum ambient temperature (TA-MAX) is dependent on the maximum | |
| AMF | (5) | SOT223 | A | 06+ | These JITO®-2 advantages yield increased user benefits, including: & |
| AMG | (3) | ESTCO | TO-92 | 00+ | Edition 07.96 This edition was realized using the software system FrameMa |
| AMH | (10) | MIC | SOT23-5 | 05+ | This is the Main output control pin. An opto isolated control signal fro |
| AMI | (398) | N/A | QFP | The LIN driver function LIN_IdleClock can check whether or not there is a | |
| AMK | (40) | SOP24 | With inputs consisting of sine waves at two frequencies, fa and fb, any | ||
| AML | (106) | amlogic | QFP-128 | 08+ | The enable input, Pin 9, is buffered for 1024Tosc2 during switching on a |
| AMM | (75) | AGILENT | 08+ | This document is a general product description and is subject to change wi | |
| AMN | (33) | PANASONIC | † Package drawings, standard packing quantities, thermal data, symb | ||
| AMO | (2) | ST | SOP-14P | 07+ | suspend feature while erasing a sector when you want to read data from |
| AMP | (312) | AMD | 85+ | DIP20陶瓷 | 1 ms instruction cycle time Three multi-source vectored interrupts servi |
| AMR | (10) | AMRISC | QFP | 6+ | The input/output pins (I/O1 through I/O16) are placed in a high-impedan |
| AMS | (355) | AMS | having interchangeable CLOCK and ENABLE lines for incrementing on eithe | ||
| AMT | (24) | MITEL | 00+ | HIGH SPEED: tPD = 13ns (TYP.) at VCC = 6V LOW POWER DISSIPATION: ICC | |
| AMU | (11) | N/A | N/A | N/A | Testing of the switching parameters is modeled after testing methods spec |
| AMV | (4) | TOREX | 2008 | 2. JC is measured in free air with the component mounted on a high effect | |
| AMW | (2) | The IOB, CLB, block SelectRAM, multiplier, and DCM ele- ments all use t | |||
| AMX | (16) | MAXIM | SMD | 01+ | The response is thus a logarithmic curve; each doubling of Cs increases |
| AMY | (1) | RHOMBUS | Information in this document is provided in connection with Intel product | ||
| AMZ | (20) | AMD | 82 | DIP镀金中片 | Designed for broadband commercial and industrial applications with |
| A-N | (1) | Master Clock. Master clock provides the clock for DSP. In MPI mode, it | |||
| AN- | (3) | AD | new | HIGH SPEED: tPD = 13ns (TYP.) at VCC = 6V LOW POWER DISSIPATION: ICC | |
| AN/ | (1) | Nat | DIP | The APA4863 is a stereo bridge-tied audio power am- plifier in various po | |
| AN0 | (41) | 01+ | Write All (WRALL) The WRALL instruction is valid only when the Protect R | ||
| AN1 | (303) | PAN | The MAX8758 includes a high-performance step-up regu- lator, a high-speed | ||
| AN2 | (402) | Pan | SSOP | tLOW Low Period of SCL Clock tHIGH High Period of SCL Clock tSU;STA Setu | |
| AN3 | (584) | SOP | CS falling edge to first DCLK rising edge DCLK high pulse width DCLK lo | ||
| AN4 | (95) | PAN | SOT-353 | 05+ | No license, express or implied, by estoppel or otherwise, to any intellec |
| AN5 | (555) | 97 | Normally the signal source for the LM1881 is assumed to be clean and re | ||
| AN6 | (748) | PANASONIC | DIP | 06+PBF | 1. 60 second maximum above 183C. 2. −5C/+0C allowable conditions. |
| AN7 | (818) | 93 | Deadtime control input. The deadtime control comparator has an effective | ||
| AN8 | (805) | PAN | SSOP | The Hynix HYM71V16M655HC(L)T8 Series are Dual In-line Memory Module | |
| AN9 | (88) | PANASONI | 03/04+ | come high impedance and the VAG Ref pin is pulled to the VDD power supp | |
| ANA | (42) | NDK | 3 | Important Information and Disclaimer: Information provided by CEL on its | |
| ANB | (6) | N/A | • Hole-less clip/pressure mount package compatible with TO- | ||
| ANC | (28) | murata | Notes: 1. Junction capacitance is determined by measuring total device ca | ||
| AND | (79) | AND | SSOP22 | 03+/04+ | Supports Interrupt on change, eliminates management polling Flexible bui |
| ANE | (4) | N/A | N/A | N/A | Parameter VDD to GND RFB, ROFS, R1, RCOM, and VREF to GND Logic Inputs |
| ANF | (1) | MIC | Input offset voltage is trimmed to less than 35µV. The low drift an | ||
| ANG | (3) | ST | DIP | 02+ | Description Thermopile detector with on-chip PTC thermistor, floating th |
| ANI | (6) | PROTEK | 3.9mm | 03+ | NOTES: 1. Typical values are at VCC = 3.3V, +25C ambient. 2. The increa |
| ANJ | (2) | MIC | Notes: 1. Test conditions assume signal transition times of 5 ns or less | ||
| ANK | (2) | The DAA can be soldered directly to the host circuit card or installed in | |||
| ANL | (6) | N/A | 0402L | DESCRIPTION The SLIC KIT (L3000N/L3092) is a set of solid state devices | |
| ANM | (8) | AMD | 06+ | A group of three high speed timers provide processor inde- pendent PWM s | |
| ANN | (14) | MINI | 08+ | Note 1: All units are 100% production tested at TA = +25C. Limits over the | |
| ANO | (3) | NOTE: 10EP circuits are designed to meet the DC specifications shown in t | |||
| ANP | (21) | PANASONIC | 05+ | TSSOP | The buffers have high slew rate, 10 mA continuous output current, and hi |
| ANR | (8) | SC | QFN | 04+ | The ANR4AW/ANR4AW low-power, 3.5- and 4.5-digit, analog-to-digital conver |
| ANS | (11) | 03+ | SOT223 | 2.0V to 6.3V operation Three switch inputs: S2, S1, S0 C seven function | |
| ANT | (79) | Available in the Texas Instruments NanoStar™ and NanoFree™ Pa | |||
| ANV | (5) | ||||
| ANW | (1) | TOREX | 2008 | Reduced Threshold Voltages for LVTTL on Control Pine ♦ Eliminates | |
| ANX | (9) | ` | ` | ` | RXD_14[0]CRSDV_14TXEN_14TXD_14[0]TXD_14[1]RXD_13[1]RXD_13[0]GNDVccCRSDV_13 |
| ANY | (1) | Two fully-programmable operation modes, Mode0 and Mode1, allow extremely | |||
| AO- | (2) | 2008 | † Stresses beyond those listed under absolute maximum ratings may c | ||
| AO0 | (4) | AOS | SOT-23 | Line preamplifier input Line receiver signals are input through a capaci | |
| AO1 | (14) | AO | SMD-8 | 07+ | Hynix HYMD564M646(L)6-K/H/L series is unbuffered 200-pin double data rate |
| AO2 | (11) | MITSUBISHI | stock | The SN74CBT3125C is a high-speed TTL-compatible FET bus switch with low O | |
| AO3 | (73) | ALPHA | SOT-23 | 08+ | The LT ®3027 is a dual, micropower, low noise, low drop- out regulat |
| AO4 | (283) | AOS | SOP-8 | 06+ | The IXDP610 Digital Pulse Width Modulator (DPWM) is a programmable CMOS |
| AO5 | (3) | FUJITSU | PLCC | 03+/04+ | • Untinted non diffused lens • Utilizing ultrabright AllnGa |
| AO6 | (65) | Constructed with the Intersil Rad-hard Silicon Gate (RSG) dielectrically | |||
| AO7 | (25) | Hynix HYMD132G725A(L)4-K/H/L series is designed for high speed of up to 13 | |||
| AO8 | (24) | AOS | TSSOP-8 | 06+ | For any given circuit board, there will be a group of control set |
| AO9 | (5) | AOS | SO-8 | 06+ | As shown in Figure 6, a resistor voltage-divider between the battery pack |
| AOA | (2) | Notes: 7. Tested initially and after any design or process changes | |||
| AOB | (14) | AOS | TO-252 | 06+ | ‡ Stresses beyond those listed under absolute maximum ratings may c |
| AOC | (2) | DIP40 | 08+ | The HCPL-7800 high CMR isolation amplifier provides a unique combinat | |
| AOD | (74) | AOS | TO-252 | 06+ | driven from internal selectable clock (oscillator or CPU cl |
| AOI | (2) | ARLITECH | 0402-9N | 05+ | Parameter VDD to GND VA, VB, VW to GND PU, PD, PRE Voltage to GND Maxi |
| AOJ | (1) | Operating voltage: 3.6V~5.0V Directly drives an external transistor Low | |||
| AOL | (20) | AO | 07+/08+ | (2) The technical information described in this material is limited to sh | |
| AOM | (3) | AOM | SOP-8P | 0546+ | A logic low on the CHIP ENABLE input will prevent the drivers fr |
| AON | (18) | 1.5 LAN feature set 1 Ethernet 10/100 MII (HPNA compatible) 2 UARTs, | |||
| AOO | (3) | MAXIM | SOT-23 | 07+ | State-of-the-Art Advanced BiCMOS Technology (ABT) Design for 3.3-V Opera |
| AOP | (13) | 2005 | 256-byte SecSi™ (Secured Silicon) Sector Factory locked and | ||
| AOR | (1) | Vcc = 5V 10%, TA = 0C to 70C (Normal), unless otherwise specified. Symbol | |||
| AOS | (2) | AD | QFP | Built-in H and V drivers (built-in input level conversion circuit, TTL dr | |
| AOT | (48) | AOT | 04+ | A negative switch is a device where both the operate and release | |
| AOU | (19) | AOS | TO-251 | 06+ | 1. 1-channel (Form A) in super minia- ture design The device comes in a |
| AOV | (1) | These devices do not normally require heat sinks, however, standard prec | |||
| AOW | (2) | NAIS | SOP-8 | • These diodes are also available in other case styles and | |
| AOY | (1) | Internal registers include available charge, temperature, capacity, bat- | |||
| AOZ | (11) | AO* | SOP-8 | 10000 | 1. Absolute maximum continuous ratings are those values beyond which dama |
| AP- | (31) | DATATRONICLIMITED | SOP | 07+ | TIA/EIA-644 Standard Low-Voltage Differential Signaling With Typical Out |
| AP0 | (69) | APEC | 04+ | IDT70261 easily expands data bus width to 32 bits or more using the Maste | |
| AP1 | (587) | DIODES | 8000 | The product term allocator is a dynamic, configurable resource that shift | |
| AP2 | (129) | INTEL | DIP | 03+ | ICS has been shipping motherboard frequency generators since April 1990, |
| AP3 | (157) | ST | QFN | 06+ | Analog Overvoltage input. When OV is pulled above the 1.223V threshold, an |
| AP4 | (312) | BCD | 06+ | The 3D7205 5-Tap Delay Line product family consists of fixed-delay CMOS i | |
| AP5 | (22) | PHILIPS | 05+ | QFP | The fixed, low, logic levels used at Sx imply a restriction that the bus |
| AP6 | (64) | PLCC68 | The REF_SEL input determines whether the single-ended CMOS reference input | ||
| AP7 | (48) | ValenceTech | 08+ | Stresses above the ratings listed below can cause permanent damage to the | |
| AP8 | (94) | SMD-14 | 99 | 7KH 6LPXOWDQHRXV 5HDG:ULWH DUFKLWHFWXUH SURYLGHV VLPXOWDQHRXV RSHUDWLRQ | |
| AP9 | (241) | ACT | 99+ | DIP-8 | access for a read or program can begin. The typical num- ber of program |
| APA | (208) | ATMEL | TQFP-M44P | 07+ | The Clock Generator provides the switching frequency of the device that i |
| APB | (17) | MIC | Notes: 1. Repetitive Rating : Pulse width limited by maximum junction tem | ||
| APC | (349) | SOP | 2001 | The Clock Generator provides the switching frequency of the device that i | |
| APD | (31) | SKY | 05+ | The NCP1575 is a low voltage buck controller. It provides the con | |
| APE | (14) | Panasonic | Relay(DZ) | *20806L | • Fast Sector Erase and Word Program: - Sector Erase Time: |
| APF | (2) | Note 2: Absolute Maximum continuous ratings are those values beyond which | |||
| APG | (6) | FDS | TSSOP | In contrast to the BTS 7710 G, which consists of the same chips in an P-D | |
| APH | (11) | 0603LED | With a low output impedance (12Ω), in both the HIGH and LOW | ||
| API | (26) | N/A | Circuit diagrams and other information relating to SMSC products are inclu | ||
| APJ | (3) | † Stresses beyond those listed under absolute maximum ratings may c | |||
| APK | (8) | N/A | Generally the third order filter configuration shown in Fig.7 giv | ||
| APL | (239) | APL | INTERFACE TIMING CHARACTERISTICS applies to all parts(Notes 6,12) SCL Cl | ||
| APM | (319) | ANPEC | TO-252 | 07+ | The register can be asynchronously set or asynchronously reset at the l |
| APN | (5) | MIC | Chrontels CH7006 digital PC to TV encoder is a stand- alone integrated | ||
| APO | (5) | AT&T | Most functions of the FM25L16 either are controlled by the SPI interfac | ||
| APP | (15) | The ISP1181 is a Universal Serial Bus (USB) interface device which compli | |||
| APR | (31) | APLUS | 070+ | The APW7004 provides a complete control and mul- tiple protection for a D | |
| APS | (67) | ANDO | 02+ | QFP-240 | Absolute Maximum Ratings indicate limits beyond which damage to the devic |
| APT | (2125) | APT | TO | 2000 watts Peak Pulse Power 8/20 µs For surface Mount Applications | |
| APU | (11) | Anpen Electr | 2000+ | ||
| APV | (3) | MIC | TXCLK is an internally derived signal in Internal mode and is connected i | ||
| APW | (63) | APM | SOP | 06+ | The bq3287E is a fully compatible real-time clock for IBM AT-compatible |
| APX | (28) | SMD | 2003 | Calibration Cycle Initiate. A minimum 80 input clock cycles logic low f | |
| A-Q | (1) | 1. MTTF calculator available at http://www.freescale.com/rf. Select Tools | |||
| AQ- | (7) | A-LOGICS | 06+ | 5 V Tolerant Inputs TTL Compatible Outputs High Bandwidth Burst Bus 3 | |
| AQ0 | (9) | FAIRCHILD | SOP-8 | 05+ | High-Performance Static CMOS Technology TMS470R1x 16/32-Bit RISC Core (A |
| AQ1 | (118) | N/A | The Loop Supervision circuit monitors the state of the phone line and when | ||
| AQ2 | (15) | N/A | RJC Thermal Resistance (Output Switches)1.5C/W RJC Thermal Resistance (Re | ||
| AQ3 | (5) | A-LOGICS | 06+ | When the PCB trace between the clock output (CLK, pin 5) and the load i | |
| AQ4 | (6) | ALOGICS | DEVICE/PAGE ADDRESSES (A2, A1, A0): The A2, A1 and A0 pins are device ad | ||
| AQ5 | (5) | MOT | PLCC52 | 05+ | The HUF76112SK8 is an Application-Specific MOSFET optimized for switchi |
| AQ6 | (6) | ACUTE | BGA | 06+ | B ild / Fig. 9 G renzstrom je Zweig (OV)M . Bel astung au s Leer lauf, VR |
| AQ8 | (1) | A Command User Interface (CUI) serves as the interface between the system | |||
| AQ9 | (17) | AQ | SOT263-5 | 03+ | 1. High-performance CPU The ML66525 family devices include the hi |
| AQA | (1) | 06+ | SOP-4 | Digital processing at 1fH level ITU 656 decoder Double window and pict | |
| AQC | (7) | Panasonic | Relay(DZ) | 20716 | Specular Reflectance (Rf): The amount of incident light reflected by a s |
| AQD | (1) | AD | PLCC | This device also features a sector erase architecture. This allows for | |
| AQE | (5) | 23 | NAIS | 02+ | VERTICAL SYNC OUTPUT A vertical sync output is derived by internally int |
| AQF | (7) | The LCX373 contains eight D-type latches with 3-STATE stan- dard outputs | |||
| AQG | (4) | Panasonic | Relay(DZ) | *40611E | State-of-the-Art Advanced BiCMOS Technology (ABT) Design for 3.3-V Opera |
| AQH | (9) | NAIS | SOP7 | 08+ | • Controller Overhead Command to DRQ C Less than 0.5 ms |
| AQJ | (1) | Quiescent Voltage Output: With no magnetic field present the device is in | |||
| AQM | (1) | The LH28F016SU is a very high density, highest per- formance non- | |||
| AQO | (3) | FSC | SOP8 | ||
| AQQ | (1) | SOP | The MCP1726 is a 1A Low Dropout (LDO) linear regulator that provides hi | ||
| AQR | (4) | 1SSR: 125V10A 18-28VDC | READ: The AT49BV/LV001(N)(T) is accessed like an EPROM. When CE and OE a | ||
| AQS | (11) | SOP | Internal Organization When ORG is connected to VDD or ORG is floated, th | ||
| AQT | (2) | 2008 | Notes: 1. NC pins are not connected to the die. 2. E3 (DNU) | ||
| AQU | (2) | N/A | 08+ | DISABLE (Disabled Low) Power Down Supply Current (+VS) Disable Time E | |
| AQV | (277) | NSAIS | 9713 | Copyright © 2002 Integrated Silicon Solution, Inc. All rights reserv | |
| AQW | (164) | NAIS | SOP-8P | 2000 | The input/output pins (I/O1 through I/O16) are placed in a high-impedanc |
| AQX | (1) | NAIS | DIP | 99 | - Luminance & Chroma Signal Procession - Built in Timing Generator - |
| AQY | (109) | NVIA | 2003 | The K4M56163PE is 268,435,456 bits synchronous high data rate Dyn | |
| AQZ | (12) | NAIS | DIP | 07+ | The CCR-33 Switch is a broadband, SPDT, electromechanical, coaxial switch |
| AR- | (17) | ARZYN | DIP-18 | 2001 | These octal flip-flops are designed for low-voltage (3.3V) VCC applicati |
| AR0 | (21) | SC | 04+ | 4 Starting Tj = +25C, L = 53.13mH, RG = 25Ω, Peak IL = 4A 5 dv/dt | |
| AR1 | (39) | 98+ | The CY7C1353F has an on-chip burst counter that allows the user the abili | ||
| AR2 | (109) | ATHEKOS | PQFP176 | 00+ | The ATF1502ASV macrocell, shown in Figure 1, is flexible enough to suppor |
| AR3 | (43) | NS | O7+ | Figure 2 illustrates a typical application circuit (output source | |
| AR4 | (17) | HARRIS | O7+ | Most everything applies to driving the P-Channel gates as the N-Ch | |
| AR5 | (123) | AR | QFP-32 | 95 | A built-in over-voltage protection (OVP) forces the lower MOSFET on to p |
| AR6 | (18) | SOP | 00+ | q Direct RAM data display using the display RAM. When RAM data bit is 0, | |
| AR7 | (24) | AR | SOP8 | 0123+ | The LO signal is multiplexed from the selected oscillator section to an in |
| AR8 | (12) | SOP28 | Excellent power supply ripple rejection for VIN-VOUT down to 110mV Exce | ||
| AR9 | (8) | ICS | SOP | 97+ | Like all members of the FLASH370 family, the CY7C371 is rich in I/O resou |
| ARA | (37) | 20 | HARRIS | © 2002 STMicroelectronics C Printed in Italy C All Rights Res | |
| ARB | (6) | Semelab Plc reserves the right to change test conditions, parameter limit | |||
| ARC | (25) | ARCA | BGA | 03+ | Winbonds I1800 ChipCorder® provides high-quality, single chip, single- |
| ARD | (22) | AGERE | TQFP/208 | 05+ | Note 1: All voltages are with respect to GND. All currents are positive |
| ARE | (19) | NAIS | Relay(new original) | The 1-Wire CRC is generated using a polynomial generator consisting of a | |
| ARF | (7) | ALFAPLUS | QFP | 03+ | Direct interface to high voltage display Serial data input No external r |
| ARG | (3) | LSILOGIC | 715 | The combination of narrow nonlinear range and low limiting offset allows | |
| ARI | (9) | ARLITECH | The serializer outputs (DO) can drive point-to-point connections or limit | ||
| ARJ | (5) | NAIS | 原装 | 08+ | Eye Safety Circuit The HFBR-5710L provides Class 1 eye safety by desig |
| ARK | (39) | ARK | DIP | 0332+ | 59 Mbytes/s Fly-by Transfers 32 Mbytes/s Two-Cycle Transf |
| ARL | (5) | Description: The NTE5452 through NTE5458 are sensitive gate 4 Amp SCRs in | |||
| ARM | (8) | ARM | 01+ | TQFP100 | ♦ Four ADC Channels with Serial LVDS/SLVS Outputs ♦ E |
| ARP | (9) | The SL531 transfer characteristic has two regions For small input | |||
| ARQ | (2) | The analog input range is equal to a 2V spread. The voltage on VT-VB wi | |||
| ARR | (5) | SOP | 2-channel, 250 kSPS, 10-/12-bit ADCs in TSOT package. Low power consumpt | ||
| ARS | (12) | AD | 96+ | The Hynix HYM71V32735AT8 Series are Dual In-line Memory Modules sui | |
| ART | (7) | B | SMD | The MC74HC04A is identical in pinout to the LS04 and the MC14069. | |
| ARU | (1) | Recommended Application: VIA KX/KT133 style chipset Output Features: & | |||
| ARV | (2) | N/A | 0603X510P8R | Internal fixed off-time PWM current-control circuitry can be used | |
| ARW | (6) | PHILIPS | SOP8 | The LCD product described in this specification is designed and manufactu | |
| ARX | (12) | NAIS | RELAY | 06+ | If the cell voltage exceeds the overvoltage threshold for 1 second, charg |
| A-S | (1) | AMS | 04+ | To guarantee the Table 1 delay accuracy for input pulse width smaller tha | |
| AS- | (131) | SHARP | SOP/30 | 04+ | The gate drive ready pin (GDR) is used to indicate when the gate drive ou |
| AS. | (1) | SOP | The IR2130/IR2132(J)(S) is a high voltage, high speed power MOSFET and | ||
| AS/ | (1) | NOTE: EP circuits are designed to meet the DC specifications shown in the | |||
| AS0 | (78) | ASUS | 03+ | SOP | The transmitter accepts CMOS level logical clock, positive data and negat |
| AS1 | (529) | TI | SOP14S | 2007+ | The ADV7330 has separate 8-bit or 16-bit input ports that accept data in |
| AS2 | (621) | ALPHA | 99 | The ispLSI 5000V Family features 3.3V, non-volatile in- system programma | |
| AS3 | (222) | AI | SOP8 | 07+ | Serial clock to EEPROM. Pin has a weak internal pull-down resistor and r |
| AS4 | (308) | ALPHA | 贴-8 | A8 | Ultra-Fast response for Fast-20 SCSI applications 35MHz channel bandwidt |
| AS5 | (54) | TI | SOP20W | 2007+ | |
| AS6 | (41) | TEC | TO-263 | 92+ | • I/O-isolation 6000 VDC • Creeping/ Clearance distances &nb |
| AS7 | (810) | AS | 06+ | The zero-pin phase-locked loop (ZPLL) clock module contains a phase-locke | |
| AS8 | (55) | INTEL | O7+ | Fifth Generation HEXFETs from International Rectifier utilize advanced p | |
| AS9 | (52) | ASAT | PLCC52 | Notes : 1. In case of module timing, command cycles delayed 1CLK with resp | |
| ASA | (62) | ASTEC | new/original | 07/08+ | The thermal shutdown debiases the output amplifier when the junction tem |
| ASB | (12) | N/A | BGA | Note 11: Efficiency is measured versus VIN, with VIN being swept in small | |
| ASC | (77) | RICOH RJ GH | 0030 | Applications • Low-power inverter current sensing • | |
| ASD | (73) | N/A | The line impedance presented by the Line Driver circuitry is determined by | ||
| ASE | (37) | The AD5258 provides a compact, nonvolatile 3 mm 4.9 mm packaged solutio | |||
| ASF | (4) | ABRACON | 2007+PB | These devices contain up to 22 inputs and 10 outputs. They incorporate th | |
| ASG | (6) | CREDITPMI | QFP | 07+/08+ | The Simultaneous Read/Write architecture provides simultaneous operation |
| ASI | (89) | QFP208 | 08+ | ISSI reserves the right to make changes to its products at any time witho | |
| ASJ | (10) | ASOOMM | Fairchild IGBT Power Module provides low conduction and switching losses | ||
| ASK | (15) | N/A | SMD | 03+ | The HYM7V65401B Q-Series are Small Outline Dual In-line Memory Modules sui |
| ASL | (16) | STMICRO | new/original | 07/08+ | M/A-COM offers six unique PIN diodes in five industry standard, low cos |
| ASM | (402) | ALLIANCE | SOT-23 | 06+ | Ripple Rejection Output Voltage Temperature Coefficient Short Current L |
| ASN | (3) | TI | SSOP-56 | • Efficiencies up to 88 % • 50 W/in³ Power Density R | |
| ASO | (7) | N/A | OKI | 04+ | ❇1This value can change due to the switching frequency, environmen |
| ASP | (223) | SUNPLUS | PLCC | 02+ | Except the build-in USB 1.1 interface, the capability of cooperating with |
| ASQ | (3) | FAIRCHIL | QFP | 07+ | ta = DS0*/DS1* to the assertion of DTACK* (slave access time). tr = Brx* |
| ASR | (10) | N/A | The TMS551xx multiport video RAMs provide several functions designed to p | ||
| ASS | (50) | AGILENT | 08+ | Please be aware that an important notice concerning availability, | |
| AST | (27) | 0525 | The maximum low level current these output stages can sink is 40mA. Wit | ||
| ASU | (2) | 2008 | Description: The NTE5826 thru NTE5829 are silicon power rectifier diodes | ||
| ASV | (17) | ABRACON | 2007+PB | The device is manufactured using Atmels high-density nonvolatile memory t | |
| ASW | (6) | MCL | 98 | Digital multiplexed output data bus. ADC output data (d15:d0) is availabl | |
| ASX | (8) | ARO | 07+ | The THS9001 is a medium power, cascadeable, gain block optimized for high | |
| ASY | (81) | MOT/PHI | CAN3 | All inputs to the 626162 SDRAM are latched on the rising edge of the syst | |
| ASZ | (13) | tung | n/a | There are a total of 16 global clock lines, with eight available per qua | |
| A-T | (1) | Vth can be expressed as voltage between gate and source when low o | |||
| AT- | (519) | AGILENT | 08+ | NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM &nb | |
| AT0 | (73) | SOP14 | 06+ | The AD7738 is similar to the AD7739 but has higher speed (8.5 kHz channe | |
| AT1 | (615) | DIP-8 | 355 | 91+ | The devices are stable with capacitive loads up to 10 nF, although the 6- |
| AT2 | (6668) | Pulse triggering occurs at a particular voltage level and is not directly | |||
| AT3 | (184) | ATMEL | BGA | —— | Description Clock input. A[1:2] is the "true" side of the diff |
| AT4 | (2297) | ATMEL | PLCC | 06+ | Beneficial comments (recommendations, additions, deletions) and any pertin |
| AT5 | (217) | 07+ | • Low leakage, low zener impedance and maximum power dissipation of | ||
| AT6 | (129) | APC | QFP | The LM75 is a temperature sensor, Delta-Sigma analog-to- digital conver | |
| AT7 | (141) | AT | 2007 | Using a CT by itself normally introduces a current lag, typically obser | |
| AT8 | (1240) | 07+ | The TPS752xx or the TPS754xx are offered in 1.5-V, 1.8-V, 2.5-V, and 3.3- | ||
| AT9 | (1411) | N/A | N/A | N/A | Decoupling Capacitor +Vcc Voltage Supply Decoupling Capacitor Decoup |
| ATA | (231) | AT | 2007 | Broadcom®, the pulse logo, ContentAwareTM, and Connecting everything&r | |
| ATB | (4) | N/A | Jitter is defined in many ways, including: phase noise, long-term jitter, | ||
| ATC | (386) | TI | QFP | 99+ | Real-time clock keeps track of hundredths of seconds, minutes, hours, day |
| ATD | (40) | 801 | 524,288-word by 8-bit CMOS static RAM. The IS61LV5128 is fabricated usi | ||
| ATE | (28) | SMD-8 | 05+ | Axial and Surface Mount Power Schottky rectifiers suited to Switched Mo | |
| ATF | (941) | ATMEL | • Separate Memory Banks by Address Space C Simultaneous Re | ||
| ATG | (22) | LUCENT | The receiver input is normally transformer-coupled to the AMI signal. The | ||
| ATH | (115) | tyco | tyco | dc04 | A key component that follows the limiting amplifier in a receiver unit is |
| ATI | (145) | ATI | BGA | 00+ | This product has been designed to meet the extreme test conditions and env |
| ATJ | (15) | ATJ | QFP | 07+ | CAUTION: These devices are sensitive to electrostatic discharge; f |
| ATK | (3) | N/A | LSI | 04+ | 32-position digital potentiometer 10 kΩ, 50 kΩ, 100 kΩ |
| ATL | (22) | AT | 06+ | The LPV511 is a micropower operational amplifier that op- erates from a | |
| ATM | (883) | INTERSIL | SOP20 | 01+ | Input voltage amplitude at f=1 kHz such that total output harmonic distort |
| ATN | (13) | MAT | ++ | ZIP10 | The instruction set by F2MC-16LX CPU core inherits an AT architecture of |
| ATO | (6) | IEI TECH | new/original | 07/08+ | Notes: 1. For Max. or Min. conditions, use appropriate value specified u |
| ATP | (67) | 01 | The Intersil ISL84715 and ISL84716 devices are low ON-resistance, low vol | ||
| ATQ | (11) | SiS | QFP | 92 | NOTE: (1) Stresses beyond those listed under "absolute maximum ratin |
| ATR | (101) | Following a period of activity in the powered-up state the power-down s | |||
| ATS | (174) | ALLEGRO | SIP-4 | 06+ | Parameter Positive Supply Voltage (VCC) Voltage on +12 V VIN Pin Volta |
| ATT | (1113) | N/A | ATT | 04+ | The set/reset line (SR) is an asynchronous active High con- trol of the |
| ATU | (28) | N/A | N/A | N/A | Auto-shutdown devices have Force on/force off controls (Figure 2) that ca |
| ATV | (191) | ATMEL | Designed for space critical applications, the ADR512 is a low voltage (1 | ||
| ATW | (18) | SOP-16 | The core of the picture processor (see block diagram) is formed of the Im | ||
| ＡＴＸ | (25) | Continuous Drain Current, VGS @ 10V (Silicon Limited) Continuous Drain | |||
| ATY | (3) | ATMEL | FDIP | This Power MOSFET is the latest development of STMicroelectronis unique | |
| AU- | (2) | MITEL | O7+ | The VC pin provides a connection point to the output of the error amplifi | |
| AU0 | (10) | AU | TQFP1414-100 | 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATIN | |
| AU1 | (37) | AMD | |||
| AU2 | (19) | Infineon | MQFP44 | 99+ | The protection circuitry receives current signals from shunts in |
| AU3 | (10) | AUO | Byte 0 and byte 1 of the scratchpad contain the LSB and the MSB of the tem | ||
| AU4 | (1) | ||||
| AU5 | (24) | PHILIPS | SOP8 | Note: 1. H=VIH, L=VIL, X=don't care(VIH or VIL) 2. /UB, /LB(Upper, Lowe | |
| AU6 | (25) | AC | The AHC139 devices are dual 2-line to 4-line decoders/demultiplexers desi | ||
| AU7 | (5) | The device has numerous display capabilities. It has an integrated video | |||
| AU8 | (22) | 99 | The ADC11DL066 is a dual, low power monolithic CMOS analog-to-digital c | ||
| AU9 | (72) | 02+ | 2. A critical component is any component of a life support device or syst | ||
| AUA | (1) | Re a dy / Bus y St a t us . I nd ic a t e s w he t he r a w r it e o r e | |||
| AUB | (1) | ||||
| AUC | (1) | TQFP/44 | 02+ | drift, guarantees lower maximum supply current than com- peting products | |
| AUD | (12) | MAX312CUE0C to +70C16 TSSOP MAX312C/D0C to +70CDice* | |||
| AUE | (1) | VB: Supplies power to all circuits of the regulator except the output pow | |||
| AUG | (33) | SUNYANG | SOP28 | 02+ | This document is a general product description and is subject to change wi |
| AUJ | (1) | AH280 is the integrated Hall sensor owned two complementary outputs for m | |||
| AUK | (11) | AMI | The TC55V4000ST is a 4,194,304-bit static random access memory (SR | ||
| AUM | (10) | IC = 1.0 µAdc, VCE = 5.0Vdc IC = 10 µAdc, VCE = 5 | |||
| AUN | (2) | UMTC | The digital data is supplied to either an AM- or FM-input pin, the outpu | ||
| AUO | (20) | AUO | Military temperature range Output skew 2.0 ns typical Input to outpu | ||
| AUP | (1) | NOTE: 1.Stresses greater than those listed under Absolute Maximum Rating | |||
| AUS | (8) | TYCO | MODULE | 01+ | When software and hardware are properly configured, the MX98905 can be |
| AUT | (5) | MOT | PLCC52 | 05+ | BRIDGE input. This input is used to set the Bridge_Aware bits located in |
| AUX | (1) | When the asynchronous-Preset product term is as- serted (HIGH) the regi | |||
| AUY | (5) | Siemens AG | n/a | The device has up to 64K bytes of reprogrammable flash EE- PROM program m | |
| AV- | (4) | SAMSUNG | 2008 | Send PCM Signal Input (Input). 128 kbps to 4096 kbps serial PCM input st | |
| AV0 | (2) | ICS | 06+ | 671 | The TC55V400AFT is a 4,194,304-bit static random access memory (SR |
| AV1 | (84) | TOUT C This pin is the buffered output of the temperature sensor. The an | |||
| AV2 | (36) | 17 | AVIDEO | 00+ | Voltage range specified in the Output Stage of the Electrical Characteris |
| AV3 | (24) | AV | SOP8 | N/A | Reset. An active high signal on this pin will put the chip into an inacti |
| AV4 | (28) | diamond | diamond | dc00 | ) Valid, if leads are kept at ambient temperature at a distance of |
| AV5 | (3) | AV | SOP8 | N/A | Information in this document is provided solely to enable system and soft |
| AV6 | (58) | AVERMEDIA | QFP | 2002 | To maximize I/O throughput and improve host and loop utilization, |
| AV7 | (34) | Note 3: The Absolute Maximum Ratings are those values beyond which the sa | |||
| AV8 | (8) | Other | 07+ | Notes: 1. For Max. or Min. conditions, use appropriate value specified un | |
| AV9 | (376) | N/A | ICS | 04+ | Note: The HUMMER module itself can sustain continuous voltages of |
| AVA | (1) | Data Inputs/Outputs: Inputs array data during program operation, when CE | |||
| AVB | (6) | N/A | SMD | O3 | Comma Detect Enable. This pin is active HIGH. When asserted, the internal |
| AVC | (49) | IDT | SOP | 03+ | This N-Channel power MOSFET is manufactured using the inn |
| AVD | (9) | A | QFP-M44P | 6+ | HIGH INDUCTIVE SWITCH-OFF OPERATION At the end of the last conduction ha |
| AVE | (12) | RICOH | SSOP/32 | 02+ | Note 5 The maximum power dissipation must be derated at elevated temperat |
| AVF | (8) | MICRONAS | QFP | 07+ | The PI90LV024 and PI90LVB024 are monolithic dual 2x2 asynch- ronous cros |
| AVG | (2) | AVGA | QFP144 | LCD COM/SEG output driving voltage. If internal shunt resistor is disable | |
| AVH | (11) | EMERSON | 模块 | between the two supply inputs is + 8.0 volts while the minimum voltage | |
| AVI | (31) | CCube | QFP160-2828 | The circuit shown in Fig 9 is designed to illustrate the use of t | |
| AVL | (29) | AV | QFP | 06+ | 1M Home Phoneline Network physical-layer, single- chip transceiver Suppo |
| AVM | (2) | SMD | 98 | adjusted using two potentiometers. The DC voltage set by the potentiomete | |
| AVN | (9) | 艾默生 | 0551+ | Operating Temperature Range: C 40 to + 85C VeryCLow Standby Current for | |
| AVP | (8) | DIP-8 | 05+ | The DS1809 Dallastat is a digitally controlled, nonvolatile potentiometer. | |
| AVQ | (3) | AVANSYS | Circuits for safe protective separation against electri- cal shock acco | ||
| AVR | (71) | ATMEL | 05/06+ | Motorola reserves the right to make changes without further notice to any | |
| AVS | (52) | ST | DIP-8 | 00+ | Stable at Low Gain Fast Slew Rate - 1200V/µs Typical Gain Bandwidt |
| AVT | (3) | MAXIM | 04+ | QFN | Each XC5200 CLB contains four independent 4-input func- tion generators |
| AVU | (1) | AMOTECH | 06+ | (1) Stresses above these ratings may cause permanent damage. Exposure &n | |
| AVX | (13) | AVX | SOP | 311 | In gaming applications where the game or controller is typically used i |
| AW- | (5) | LUCENT | O7+ | Notes a. Surface Mounted on 1 x 1 FR4 Board. b. See Reliability Manual | |
| AW0 | (8) | ALPHA | SOP-8 | 04+ | The ispLSI 1032E is a High Density Programmable Logic Device containing |
| AW1 | (15) | JCAE | QFP-80 | 08+ | Due to the finite switching time of the fast MUX in the MAX4358, the OSDFI |
| AW2 | (2) | 06+ | QFP | POWER SUPPLIES As shown in Figure 6 which is a complete schematic of the | |
| AW3 | (5) | AVANSYS | 模块 | 08+ | PRECAUTIONS [1] The DC blocking capacitors have to be placed at R |
| AW4 | (1) | NSC | 89+ | (2) Storage The BG-LEDs should be stored at 30C or less and 70%RH | |
| AW5 | (3) | These lamps are made with an advanced optical grade epoxy, offering supe | |||
| AW6 | (1) | PWM Signal Input C Connects to the internal reference, via an internal fi | |||
| AW7 | (1) | Note 4 Unless otherwise specified all AC measurements are referenced from | |||
| AWC | (3) | anadigics | anadigics | dc04 | • 100,000 erase/write cycle Enhanced Flash program memory t |
| AWG | (2) | ||||
| AWH | (8) | assmann | assmann | dc? | CS: Current Sense. This is the inverting input of the Cur- rent Sense co |
| AWI | (3) | N/A | 25201008 | NOTE:2679 tbl 01 1. Stresses greater than those listed under ABSOLUTE MA | |
| AWK | (1) | INFINEON | 高频管 | Corona C Corona is the ionization of air or other vapors which causes the | |
| AWL | (10) | PHILIPS | 2007PB | Note 11 Positive linearity error is defined as the deviation of the analo | |
| AWM | (31) | 4200 | Hynix HYMP112S64MP8 series is unbuffered 200-pin double data rate 2 Synchr | ||
| AWO | (1) | Auxiliary receive filter output. The output signal is inverted with respe | |||
| AWR | (14) | AWR | SOP | 03/+04+ | The transmission codes of the HT6221/6222 consist of a 9ms header code, a |
| AWS | (21) | ANADIG | 06+ | 500 | The RDRAM architecture enables the highest sustained bandwidth for multip |
| AWT | (108) | ANADIGIC | Protection is guaranteed in terms of short-circuit conditions, overtemper | ||
| AX- | (2) | PORTMAN | 98 | 798 | Current sensing is done in this case by a 0.1 ohm sense resistor |
| AX0 | (5) | PHILPS | SOP | SOP | Using the first option, the user can program the part on the candy board |
| AX1 | (32) | APTIX | Low-power dissipation Operating: 15 mW/MHz (typical) Single power supply | ||
| AX2 | (3) | NEWTECH | DIP40 | 92+ | Prior to placing surface mount components onto a printed circuit |
| AX3 | (16) | 98 | This device contains circuits to protect its inputs and outputs against d | ||
| AX4 | (3) | DIP24 | 97 | The AGB3302 is one of a series of high performance InGaP HBT amplifiers | |
| AX5 | (47) | AXELL | 2003 | Case: DO-214AA (SMB) Epoxy meets UL 94V-0 Flammability rating Terminals | |
| AX6 | (15) | ALLGERO | SOP28 | • Real Time Clock/Calendar Tracks time in Hours, Minutes, | |
| AX7 | (4) | MAX | SMD | 02+ | The reference signal is at 1700 Hz, (the same frequency for BELL 202 and |
| AX8 | (35) | PROTECH | QFP | 1984 | ∗2 VL setting is the VVL voltage of the vertical clock waveform, or |
| AX9 | (3) | 99 | RSDS OUTPUT VOLTAGE CONTROL The RSDS output voltage swing is controlled | ||
| AXA | (28) | tyco | tyco | dc04 | An optional feedback resistor can be placed between the COUT terminal of t |
| AXB | (5) | BGA | IBM | 05+ | (layout including place & route, timing analysis, and back-ann |
| AXC | (7) | The SDRAM provides for programmable READ or WRITE burst lengths o | |||
| AXD | (4) | AMD | 06+ | Maximum Average Forward Rectified Current at Tc=125OC Peak Repetitive | |
| AXH | (39) | If CS2 exceeds 0.5V the outputs will be disabled and a softstart commen | |||
| AXJ | (1) | A force of 1.0 Kg shall be applied to each terminal in the direction of th | |||
| AXK | (245) | NAIS | The CY62137CV18 is a high-performance CMOS static RAM organized as 128K | ||
| AXL | (2) | TAOperating free-air temperatureC55125C4085C NOTE 5: All unused in | |||
| AXM | (6) | 01+ | The output is capable of supplying 200 mA to the load while confi | ||
| AXN | (46) | NAiS | 07+ | codestrip. These detectors are also spaced such that a light period on | |
| AXP | (1) | N/A | The DC/DC power module shall be installed in an end-use equip- ment and c | ||
| AXR | (13) | MATSUSHITA | 2.Controlling dimension : millimeters. 3.Maximum lead thickness includes | ||
| AXS | (4) | The MAX1858 dual, synchronized, step-down controller generates two output | |||
| AXT | (20) | PANASONIC | 07+ | The ADC0832 multiplexer is software configured for single-ended or differ | |
| AXX | (1) | INTEL | new/original | 07/08+ | Cycle Control Internal High Accuracy Bandgap Voltage Reference Current |
| A-Y | (1) | PHI | QFP | 2004 | Intrinsic deterministic device jitter is a measurement of the determinist |
| AY- | (42) | GI | DIP | 06+ | Clock rates refer to f = 1024MHz Xtal/Clock input. During internal opera |
| AY0 | (24) | MICROCHIP | DIP | National Semiconductor certifies that the products and packing materials | |
| AY1 | (20) | SGS | 金属帽 | BU | sFEATURES qInternal Y/C separator circuit qNTSC matching for Composite |
| AY2 | (3) | GI | DIP | 04+ | Input Amplifier/Buffer Figure 2 shows a simplified schematic of t |
| AY3 | (30) | GI | Figure 5 shows the effects of a fast transient on the output voltage of t | ||
| AY5 | (27) | TI | QFP | 07+ | Bidirectional Bus Transceivers in High-Density 24-Pin Packages Flow-Thro |
| AY7 | (1) | SOP-8 | 98+ | DATEL makes no representation that the use of its products in the circuit | |
| AY8 | (4) | AY | DIP | The VCELL1CVCELL4 inputs are divided down from the cells using precision | |
| AY9 | (1) | The MB89960 series is a single-chip microcontroller that utilizes the F2M | |||
| AYA | (1) | ||||
| AYK | (1) | ECOS1EA472AA ECOS1EA562AA ECOS1EA682AA ECOS1EA222BL ECOS1EA222BA ECOS | |||
| AYM | (1) | PWM Capability up to 60 kHz with Duty Cycle from 5% to 100% Very Low Stan | |||
| AYO | (1) | MICROCHIP | PLCC | 03+/04+ | The AYO0438/L001 and AYO0438/L001 are CMOS 8-bit, successive-approximatio |
| AYP | (3) | N/A | NOTES: a) 1 TTL Unit Load (U.L.) = 40 µA HIGH/1.6 mA LOW. b) The | ||
| AYS | (1) | AUX: Produces a regulated output voltage of 11.6V 5%, which is reference | |||
| AYU | (4) | J.S.T | RESISTOR TERMINALS Voltage Range4 Capacitance5 B C | ||
| AYY | (1) | AT&T | QFP | 04+ | The AYY3030-70J100 system integration module (SIM49) handles a wide array |
| AYZ | (2) | IT | 05/06+ | The DS1265 devices execute a write cycle whenever WE and CE signals are ac | |
| A-Z | (1) | SOP | SOP-24 | The on-chip DPLL meets Telcordia GR-1244-CORE stratum 4 specifications (St | |
| AZ- | (2) | Purpose non inverting input ÎA inverting input ÎA operation | |||
| AZ0 | (7) | DIP-16 | The 56F802 controller includes 8K words (16-bit) of Program Flash and 2K | ||
| AZ1 | (157) | ARIZONA | SOP/8 | 02+ | It consists of an oscillator, a PWM control circuit, a Lx switch driver |
| AZ2 | (112) | TFK | 3) An optimum layout is one with all components on the same side of the | ||
| AZ3 | (103) | BCD | DIP8 | 06+ | With an input data register, the IDT70V9359/49 has been optimized |
| AZ4 | (117) | BCD | 07+/08+ | The bq2050 Lithium Ion Power Gauge™ IC is intended for battery- pa | |
| AZ5 | (12) | TI | PQFP48 | UL Recognized File # E-96005 Glass passivated junction &nb | |
| AZ6 | (14) | 2008 | 17 | 12 port pins with interrupt capability The MPC862P and MPC862T have 23 | |
| AZ7 | (53) | 富鼎 | 04+ | The LH28F016SU provides user-selectable block locking to protect | |
| AZ8 | (47) | • ML22Q54 The ML22Q54 is a speech synthesis device with a 4- | |||
| AZ9 | (21) | zettler | zettler | dc0408 | sGENERAL DESCRIPTION The AZ9521C12DE is a color TFT signal process |
| AZB | (1) | Reduced harmonic content of input currents corresponding to standards | |||
| AZC | (3) | SIEMENS | 2004 | Small number of external components: inductor, diode and capacitor. Ult | |
| AZF | (10) | 6500 | YAMAHA | 97+ | Information contained in this publication regarding device applications |
| AZG | (1) | The current-control circuitry limits the load current as follows: | |||
| AZH | (5) | MAL | 01+ | Note 14: A 40% to 60% duty cycle range insures proper operation at all cl | |
| AZM | (17) | Analog terminals Audio clock signals Clock and real-time synchronizati | |||
| AZN | (7) | TI | MSOP | 07+ | When VCC is between 0 and 1.5 V, the device is in the high-impedance stat |
| AZO | (2) | SEMTECH | TSOP | 2003 | The IL400 is an optically coupled SCR with a gallium arsenide infrared |
| AZP | (3) | SC | QFN | 04 | Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V |
| AZQ | (3) | SOP-14 | 98+ | • 1 to 10 differential clock distribution • Optimized for cl | |
| AZR | (2) | SC | QFN | 04 | FEATURES • Normally Open, Single Pole Single Throw Operation ̶ |
| AZS | (5) | 43 | EE | 00+ | Power Thyristor/Diode Module PK90GB series are designed for various recti |
| AZT | (16) | AZTECH | PLCC44 | 03/+04+ | Unlike other nonvolatile memory technologies, there is no write delay w |
| AZU | (4) | QFN | 03+ | Typical data are for initial design estimations only, and assume o | |
| AZV | (1) | SC | QFN | 04 | CAUTION: These devices are sensitive to electrostatic discharge; f |
| AZW | (2) | SC | QFN | 04 | Figure 3 shows the timing relationship between data clock and data enable |
| AZX | (1) | SC | QFN | 04 | © Atmel Corporation 2002. Atmel Corporation makes no warranty for t |
| AZY | (6) | POWER | 01+ | N/A | Each of the 6 high-side and 6 low-side drivers is capable to drive curren |
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