| Mfg | pack | D/C | Descrpion | ||
| Z(5 | (1) | The EB-2100x permits three separate methods for clocking the DDX-2000. Th | |||
| Z/4 | (1) | ||||
| Z-0 | (1) | ZILOG | 90 | Note 3: This IC includes overtemperature protection that is intended to | |
| Z0- | (1) | 116dB CMRR Independent of Gain Maximum Offset Voltage: 10µV Maximu | |||
| Z0. | (1) | Typically, the MSK 3554(B) has an input offset voltage of less th | |||
| Z00 | (16) | 96+ | 2. Measured by the voltage drop between A and B pins at the indicated cur | ||
| Z01 | (101) | ST | 00+ | The TC650/TC651 acquire and convert their junction temperature (TJ) inf | |
| Z02 | (158) | zolog | plcc | 0 | Power Management Four power saving modes: On, Doze, Standby, Susp |
| Z03 | (4) | TAG | CAN3 | Data Output Bit 8 Data Output Bit 7 Data Output Bit 6 Data Output B | |
| Z04 | (47) | ST | TO-202 | 06+ | Emitter-Base Breakdown Voltage IE = 25 mAdc Collector-Base Cutof |
| Z05 | (2) | ziLog | DIP | 07+ | PCI stop clock control input. When this signal is at a logic low level (0 |
| Z06 | (4) | ST | TO-92 | 07+ | NOTE 1. ICC1, ICC3, ICC4 and ICC6 dependent on output loading and cycle r |
| Z07 | (5) | ZILOG | DIP40 | Over the years, the performances of the SLICs considerably increased an | |
| Z08 | (400) | ZILOG | 1 | 1. One-Shot Mode without Restart Address generation halts after c | |
| Z09 | (1) | ZiLOG | O7+ | The SNI consists of five main logical blocks a) the oscillator generates | |
| Z0E | (1) | The HYM7V65801B F-Series are Dual In-line Memory Modules suitable for easy | |||
| Z-1 | (19) | N/A | 00+ | SOP-28 | The receive clock, RX_CLK, provides the timing reference to transfer RX_D |
| Z1/ | (1) | Beneficial comments (recommendations, additions, deletions) and any perti | |||
| Z10 | (14) | N/A | QFP | • Eight Independent Channel 12-Bit DACs with Output Amplifie | |
| Z11 | (7) | schroff | schroff | dc07 | For those systems using buses wider than a single byte, the four independ |
| Z12 | (6) | EIC | DO-41 | 07+ | The Z1200 also has an output voltage clamp feature. This clamp is a fas |
| Z13 | (7) | EIC | DO-41 | 07+ | The Hynix 512Mb DDR SDRAMs offer fully synchronous operations referenced |
| Z14 | (6) | N/A | BGA | 02+ | The ANADIGICS AWL9224 power amplifier is a high performance InGaP HBT IC |
| Z15 | (5) | EIC | DO-41 | 07+ | Most connections between the FPGA device and the Serial EEPROM are simp |
| Z16 | (74) | ZILOG | 07+ | Hynix HYMD232G726B(L)8-M/K/H/L series incorporates SPD(serial presence det | |
| Z17 | (1) | 05+/06+ | The MAX6043 precision voltage reference provides accurate preset +2.5V, + | ||
| Z18 | (7) | EIC | DO-41 | 07+ | Optional accessories for module-type MCC 95 version 1 B Keyed gate/catho |
| Z1A | (1) | ZILOG | QFP | 99+ | Output Features: •3 - 14.318 MHz REF clocks •1 - USB_48MHz |
| Z1B | (5) | TI | QFP-80 | 99+ | The Z1B1A1F153PHQ is 4,718,592 bits Synchronous Static Ran- dom Access Me |
| Z1D | (3) | avx | avx | dc99 | Except for the TLC7701, which can be customized with two external resisto |
| Z1E | (1) | TI | 07+ | • Best in class in DIP7, DIP8, TO220, I2Pak packages • Leadfr | |
| Z1F | (1) | TI | 07+ | The UCC3808A dual output drive stages are arranged in a push-pull configu | |
| Z1L | (1) | Notes: 5. Distribution data sample size is 500 samples taken from 5 diffe | |||
| Z1S | (13) | PQFP52 | 2007+ | The ISP1521 is a stand-alone Universal Serial Bus (USB) hub controller IC | |
| Z1V | (1) | AC LINE TRANSIENT VOLTAGE RUGGEDNESS The ACST4 switch is able to sustain | |||
| Z1Z | (1) | BI | 4X4-50K | Eighteen configurable outputs each drive terminated trans- mission lines | |
| Z2 | (1) | internal pullCup is provided on LSS allowing the device to | |||
| Z-2 | (1) | 1. For Schottky barrier diodes thermal run-away has to be considered, as | |||
| Z20 | (8) | ST | SOP | Available in various package configurations, these two families of detec | |
| Z21 | (5) | int | int | dc90 | result of the assumptions that VOH = VCC and VTH = 0.5 VCC. In addition |
| Z22 | (8) | ST | 03+ | The internal gating of chip-enable (CE) signals prevents erroneous data f | |
| Z23 | (3) | ST | SMD | 02+ | HIGH SPEED: tPD = 0.3ns (TYP.) at VCC = 3.0V tPD = 0.4ns (TYP.) at VCC |
| Z24 | (5) | N/A | QFP | The users software can invoke the Idle Mode When the microcontroller is | |
| Z25 | (9) | ZiLOG | 00+ | A detailed block diagram of the UCC3941 is shown in Fig. 1. Unique cont | |
| Z26 | (4) | FAIRCHIL | SOT353 | 04+ | 1. Measured using a 750 mV source, 50% duty cycle clock source. All loadin |
| Z27 | (6) | NS | DIP-8 | reads the data to be a receiver. The device that controls the data tran | |
| Z28 | (5) | TI | SOP | 98+ | 1. Life support devices or systems are devices or systems which, (a) are |
| Z29 | (2) | Crag | O7+ | The JEDEC low-K (1s) board design used to derive this data was a 3-inch x | |
| Z2A | (1) | RSENSE - Are the connections to the bottom of the bridge. All power flow | |||
| Z2C | (1) | MARVELL | N/A | 2006 | Output Threshold Adjust The state of the OUT pin is driven by a |
| Z2G | (1) | The advantages of low power consumption, I/O flexibil- ity, timer functio | |||
| Z2R | (1) | Output Voltage Options: 2.6 V, 3.3 V, 5.0 V, 7.5 V 3.0% Output 3.5 V Op | |||
| Z2S | (7) | fagor | fagor | dc02 | Note 13: Maximum power dissipation (PDMAX) in the device occurs at an out |
| Z2T | (1) | 01 | Life Support Applications These NEC products are not intended for use i | ||
| Z2V | (1) | MIRA | TSOP | 05+ | (Typical at 3V supply unless otherwise noted) n Supply voltage range2.7 |
| Z2W | (1) | 1495 | SDRAM read and write accesses are burst oriented starting at a selected | ||
| Z2X | (1) | In addition to being backwards compatible with the F2MC* family architec | |||
| Z30 | (9) | MINI | 08+ | Differential LVDS Outputs: These LVDS output pairs are the precision, low | |
| Z32 | (59) | XICOR | MSOP | 05+ | CAUTION: The BiCMOS inherent to this design of this component increases t |
| Z33 | (9) | TAIWAN | N/A | DIP | RST/VPP: Reset/Programming Supply Voltage: A low on this pin for two mac |
| Z34 | (3) | TI | SOP8 | 06+ | The zero flags for the left and right channels are brought out at connec |
| Z35 | (3) | 125 | SVCC | 00+ | The Z35-100 is manufactured using Catalysts ad- vanced CMOS floating ga |
| Z36 | (2) | ZORAN | QFP | 2000 | Model WS81. The WS81 donut shaped 100 ohm RTD element offers fast, acc |
| Z37 | (3) | Configuration data stored in Virtex-II configuration memory can be read | |||
| Z38 | (3) | ALCATEL | DIP | Description Spread Spectrum Enable 0 = Spread Off, 1 = Spread On This i | |
| Z3A | (5) | n 5A sink/3A source current capability n Two channels can be connected | |||
| Z3B | (1) | Need for External Pullup/Pulldown Resistors Distributed VCC and GND Pins | |||
| Z3G | (1) | The Customer should ensure that it has the most up to date version of the | |||
| Z3M | (1) | The GS4882 and GS4982 feature an internal color burst filter for minimiza | |||
| Z3S | (1) | PAN | 08+ | The fast-access register file concept contains 32 x 8-bit general-purpose | |
| Z4- | (1) | These three terminal positive regulators are supplied in a hermetic metal | |||
| Z4. | (1) | • Low voltage operation • Low saturation voltage (<500mV, | |||
| Z40 | (5) | ST | SOP8 | 01+ | FAST 8-BIT 8032 MCU C 40MHz at 5.0V, 24MHz at 3.3V C Core, 12-clocks |
| Z41 | (4) | Lead Temperature (soldering, 10s)+260C (1) Stresses above these ratings | |||
| Z42 | (11) | ZIOLG | SOP28 | 04+ | This P-Channel Logic Level MOSFET is produced using Fairchild Semiconduc |
| Z43 | (3) | ZIOLG | SOP28 | 04+ | Time timer and a Watchdog unit. The Real-Time Clock Tim- ing function c |
| Z44 | (23) | TI | SOJ | 98+ | Register-usage rules influence placement of input and results within the |
| Z45 | (4) | TI | 06+ | 6000 | Z45160-80DZH has built-in 6dB amplifier, 75Ω driver and mute functio |
| Z46 | (2) | Notes: 2. The voltage on any input or I/O pin cannot exceed the po | |||
| Z47 | (3) | VISHAY | 23-47V | Address Inputs Byte Enable Data In / Out Data In / Out (word-wide mo | |
| Z4A | (1) | The LTC®1928-5 is a doubler charge pump with an internal low noise, l | |||
| Z4B | (1) | † Stresses beyond those listed under absolute maximum ratings may c | |||
| Z4C | (4) | TI | SMD | 00+ | The outputs can drive AC or DC-coupled single (150Ω) loads. DC-cou |
| Z4D | (2) | TI | QFP | The master reset inputs (1MR and 2MR) are active-High asynchronous inpu | |
| Z4H | (1) | Note: 1.Year date code. 2. 2-digit work week. 3. Factory code shall be | |||
| Z4K | (9) | gs | gs | dc01 | overall bandwidth is limited to 2MHz. The input and output impedance of |
| Z5. | (2) | This new series of digital transistors is designed to replace a si | |||
| Z50 | (3) | SOP8 | Designed for ultraClinear amplifier applications in 50 ohm systems | ||
| Z51 | (1) | ||||
| Z52 | (1) | HARRIS | 2008 | Factor port regardless of whether the host equipment is operating or | |
| Z53 | (6) | 00 | Drain-to-Source Breakdown Voltage-200 Gate Threshold Voltage-2.0 Gate- | ||
| Z54 | (1) | Features 1) Made of same material as the general purpose chip resi | |||
| Z55 | (4) | N/A | DIP-18 | 00+ | 2. Sleep mode In this mode the transmission path is disabled and |
| Z56 | (5) | Infineon | QFN | 03/04+ | When fewer vertical clock lines are connected, the clock distribution is |
| Z58 | (2) | advantage series | PLCC | 96+ | The step-down controllers minimize power loss and noise by operating the |
| Z5A | (1) | Error Flag (FAN2501 only) To indicate conditions such as input voltage d | |||
| Z5D | (1) | The K6F2016V4E families are fabricated by SAMSUNGs advanced full | |||
| Z5M | (1) | 06+ | 500 | Parameter REFERENCE INPUTS REFIN(+) to REFIN(C) Voltage1, 9 &nbs | |
| Z5W | (2) | KEC | 05+ | connected from Drain to Source internally. This diode helps to control | |
| Z6 | (1) | 1. IGBT has MOS structure and its gate is insulated by thin silicon oxide | |||
| Z6- | (23) | N/A | N/A | N/A | Specifications contained in this product brief are in effect as of the pu |
| Z6. | (2) | • Single power supply : 5 V 10% • 512 Rows ¥ 512 Columns | |||
| Z60 | (4) | Hynix HYMD264726(L)8-K/H/L series is unbuffered 184-pin double data rate | |||
| Z61 | (11) | N/A | N/A | N/A | The 56F801 controller includes 8K words (16-bit) of Program Flash and 2K |
| Z62 | (5) | Supply Voltage Differential Input Voltage (Note 8) Input Voltage Input | |||
| Z64 | (8) | ZILOG | 05+ | PLCC | Case: JEDEC TO-220AB, ITO-220AB & TO-263AB molded plastic body Term |
| Z65 | (5) | Note 5: This parameter is guaranteed by design but is not tested. The bus | |||
| Z66 | (3) | ZILOG | 205 | DIP | This converter uses proven circuit techniques to pro- vide accurate and |
| Z67 | (4) | SOP | The PCM codec has many programming features that are controlled using a 2 | ||
| Z68 | (1) | CHIPS | BGA | 9711 | This fully integrated PLL transmitter allows the design of simple, low-co |
| Z69 | (3) | N/A | 02 | The feature set of the 80C186EB meets the needs of low power space criti | |
| Z6A | (5) | DIP28 | 38503 | N/A | The 16 1 Mux selects one of sixteen inputs E0 through E15 specified by f |
| Z7 | (1) | Port 1: Port 1 is an 8-bit I/O port with a user-configurable output type. | |||
| Z70 | (5) | ZiLog | 8525 | The CY7C133 and CY7C143 are high-speed CMOS 2K by 16 dual-port static RAM | |
| Z72 | (1) | ZILOG | 01+ | Digital Supply Digital Ground Transmit Baud Clock Digital Input of Tr | |
| Z75 | (3) | ZILOG | PLCC | 98+ | VIN and IIN refer to control inputs. VI, VO, II, and IO refer to data pi |
| Z76 | (4) | ZILOG | 1460 | 01+ | On-board components include an AD780 which is a pin programmable +2.5 V |
| Z78 | (1) | Notes: 5. Distribution data sample size is 500 samples taken from 5 diffe | |||
| Z79 | (1) | ZILOG | 8533 | Room = 25C, Full = as determined by the operating suffix. Typical values | |
| Z7B | (1) | The customer¢s voice sources are recorded sec- tion by section into | |||
| Z7D | (1) | Each device requires only a single 3.0 volt power supply for both read a | |||
| Z7J | (1) | Analog video input for R/Pr 1 Analog video input for R/Pr 2 Analog vid | |||
| Z7L | (1) | The SNIC supports 192 kbit/s (2B+D + overhead) full duplex data transmiss | |||
| Z8 | (1) | mode 3: fast mode, CS inactive (high) between conversion cycles, 11- to 16 | |||
| Z-8 | (7) | ZILOG | DIP28 | 2007+ | All input and output pins on LinCMOS and Advanced LinCMOS products have a |
| Z80 | (423) | ZILOG | 8513 | The DS1330 devices execute a write cycle whenever the WE and CE signals ar | |
| Z81 | (3) | ZILOG | SOP | 00+ | The first members of TIs new BiMOS general-purpose operational amplifier |
| Z82 | (4) | N/A | SOP-16 | Sync detect C Output to signal when the link is active or inactive. The l | |
| Z83 | (9) | In the test mode, the normal operation of the SCOPE™ octal buffers | |||
| Z84 | (660) | ZILOG | DIP | 03+04+ | Out (pin 7) The output pin assumes a logic high state once |
| Z85 | (265) | ZILOG | PLCC | Automotive: Backlighting in dashboards and switches Telecommunication: | |
| Z86 | (787) | the related gate drive output pin high. A logic low input on one of the s | |||
| Z87 | (22) | ZILOG | PLCC28 | Zarlink Semiconductor provides prescaler evaluation boards. These are pri | |
| Z88 | (17) | ZILOG | PLCC68 | 04+ | VCC Operating Range From 2.3 V to 3.6 V Data I/Os Support 0- to 5-V Signa |
| Z89 | (78) | ZILOG | PLCC | 9430 | OUTPUT Voltage Output Over Specified Temperature Voltage Output |
| Z8B | (1) | PHILIPS | The MAX7314 I2C™-compatible serial interfaced periph- eral provide | ||
| Z8D | (4) | PLCC-68P | 02+ | 7. tWCS, tRWD, tCWD, tAWD and tCPWD are not restrictive operat- i | |
| Z8E | (25) | ZIOLG | SMD | The analog front end features four single-ended input channels with unip | |
| Z8F | (751) | ZIL | 135-mΩ -Maximum (5-V Input) High-Side MOSFET Switch 500 mA Continu | ||
| Z8I | (1) | ZILOG | 07+ | GENERAL USAGE RS-232 Operation The SP304 is a fully compliant RS-232 de | |
| Z8L | (13) | ZIL | Analog functions and audio gating have also been integrated into the ISD51 | ||
| Z8M | (1) | Supports DDR I and DDR II Incorporates VDDQ, VTT Regulators Operates fro | |||
| Z8P | (20) | The voltage drop (VSR) across the sense re- sistor RS is monitored and i | |||
| Z8S | (60) | ZIL | The B9946 is capable of generating 1X and 1/2X signals from a 1X source. | ||
| Z8X | (1) | ZILOG | 07+ | Meets SONET requirements for jitter transfer/generation/tolerance | |
| Z9. | (1) | KEC | Stresses beyond those listed under "absolute maximum ratings" m | ||
| Z90 | (48) | ZILOG | DIP | 98+ | System Operations l Fully supports MP3 in ISO9660 CD format, VCD |
| Z91 | (5) | IMI | TQFP | 07+ | The Z9102BAB/Z9102BAB/Z9102BAB single/dual/quad com- parators are drop-in |
| Z92 | (1) | COILCRAFT | 04+ | Edge select/hot plug input. The operation of this pin depends on whether | |
| Z93 | (3) | IMI | TSSOP16 | 07+/08+ | The clock generator module of the ADSP-21991 includes clock control logi |
| Z94 | (2) | The EB1175 evaluation board is available to aid designers in demonstrati | |||
| Z95 | (2) | COILCRAFT | 04+ | − Provide software confirmation of completion of program or | |
| Z97 | (1) | ZILOG | 9709+ | A control loop that maintains a constant average optical power, independe | |
| Z98 | (1) | TTL/CMOS Reference input pre-scalar and Zero Delay MUX divider select inpu | |||
| Z99 | (11) | KENWOOD | 98+ | The Z990A and Z990A series rail-to-rail output CMOS operational amplifie | |
| Z9L | (2) | This low-hysteresis bipolar Hall-effect switch is an extremely te | |||
| Z9M | (1) | LAID: (Load Accumulator-Indirect); Single byte look up table instruction | |||
| ZA1 | (7) | PHILIPS | SOP | 03+ | VR is the regulator output voltage setting. Dropout voltage is defined |
| ZA2 | (13) | MINI | 08+ | 专业射频微波 | The fixed off-time pulse duration is set by user-selected external |
| ZA3 | (14) | 14 | 2004+ | L = 25-50 MHz, M = 50-300 MHz, U = 300-400 MHz Upper range coupling 0.75 | |
| ZA4 | (9) | TI | SSOP | The reference is postpackage-trimmed to increase the output accuracy. The | |
| ZA5 | (1) | INF | TSSOP28 | The MM74HC04 is a triple buffered inverter. It has high noise immunity | |
| ZA6 | (2) | SOJ | 99+ | Pb−Free Packages are Available Operating Voltage Rang | |
| ZA7 | (1) | BGS (Pin 9): Bottom Gate Switching Control. CA2 moni- tors the inductor c | |||
| ZA8 | (1) | The alternative devices are the recommended replacement devices for the ph | |||
| ZA9 | (2) | During full duplex transmission, the signal at Tip and Ring consists of bo | |||
| ZAB | (3) | ZETEX | SSOP | 06+ | ANALOG-TO-DIGITAL CONVERTER Input Voltage Range Total Unad |
| ZAC | (4) | TDK | new | The design incorporates an input stage that simultaneously achieves low a | |
| ZAD | (22) | MINI | 08+ | OVER- AND UNDER-SCALE LIMITING Over-Scale DAC: 16 Steps Adjustmen | |
| ZAG | (2) | TDK | new | Wiper positioning is controlled via a patented dual pushbutton (or contact | |
| ZAH | (1) | where VREF = 0.6V The maximum output current should be limited to less t | |||
| ZAK | (1) | The H-Bridge contains integrated free-wheel di- odes. In case of free-w | |||
| ZAM | (7) | MINI | 08+ | • Auto-Track™ Sequencing • Output Over-Current Protecti | |
| ZAN | (1) | The amplifier may also be modified to accept input from cera | |||
| ZAP | (15) | MINI | 08+ | Bursts can be initiated with either ADSP (Address Status Processor) or | |
| ZAR | (3) | 1500 | MITEL | 01+ | The TCMD10.. Series consist of a photodarlington optically coupled to a |
| ZAS | (6) | MINI | 08+ | 专业射频微波 | The MAX3873A is a compact, low-power 2.488Gbps/ 2.67Gbps clock-recovery a |
| ZAT | (1) | Fixed Closed-Loop Gain Amplifier C 10 V/V (20 dB) Wide Bandwidth: 1.8 GH | |||
| ZAV | (1) | Agilent | BGA | 0146+ | The S1117 series of positive adjustable and fixed regulators are designed |
| ZAW | (1) | • 5-volt tolerant inputs/outputs, for interfacing with 5-volt logic | |||
| ZAY | (3) | MINI | 08+ | The 'LVTH162374 devices are 16-bit edge-triggered D-type flip-flops with | |
| ZB- | (2) | Pb−Free Packages are Available No Auxiliary Winding Operation Auto | |||
| ZB2 | (6) | N/A | 0805BEAD | 1) Can select center frequency and Q value of Bass characteristic | |
| ZB3 | (3) | MINI | 08+ | • Selectable watchdog timer • Low VCC detection and reset ass | |
| ZB4 | (16) | MINI | 08+ | Multiple devices can be concatenated by using the CEO output to drive t | |
| ZB5 | (2) | mini-circuits | 07+ | The CLC031A has a unique Built-In Self-Test (BIST) and video Test Patte | |
| ZB6 | (7) | mini-circuits | 07+ | The third, transient power due to internal capacitance takes exactly the | |
| ZB8 | (8) | MINI | 08+ | The DC/DC converter provides power and synchronization signals across th | |
| ZB9 | (4) | Supplementary insulation according IEC/EN 60950 and UL 1950 Worki | |||
| ZBA | (1) | n Supports high-efficiency PowerWise Technology Adaptive Voltage | |||
| ZBC | (4) | Flash and ROM devices are not 100% identical. The execution of the JSRB | |||
| ZBD | (4) | TDK | SOP-16 | 01+ | Linearity errors of 0.5 and 1.0 LSB, and Differential Non-linearity to |
| ZBF | (11) | TDK | new | The preamble (Figure 9 on page 10) with up to 320 periods of the 125 kHz | |
| ZBG | (1) | ZETEX | 06+ | 800 | The TS831 ultra low power integrated circuit incor- porates a high stab |
| ZBM | (1) | KDS | 02+ | bootstrap techniques, thus eliminating additional isolated power supplie | |
| ZBN | (2) | ZEABIT | SOT-23-3L | 0723+(PB) | The SFP LED driver can switch up to 100mA into typical high-speed light-e |
| ZBR | (1) | 264 | O1 | Introduction The IRU1075 adjustable Low Dropout (LDO) regulator is a thr | |
| ZBS | (4) | MINI | 08+ | Renesas Technology Corporation Semiconductor Home Page http://www.renesas | |
| ZBY | (4) | TDK | NOTES 1. Data, Clock and Enable inputs are high impedance Schmitt buffer | ||
| ZBZ | (1) | Figure 3 shows the ELM312 used in a circuit to control a four ph | |||
| Z-C | (1) | Automatic flow control: The UART automatically handles either or both in | |||
| ZC- | (4) | Lead free product Leadless chip form , no lead damage Lead-free solder j | |||
| ZC0 | (15) | MOT | DIP-40瓷 | 05+ | The self-refresh mode is entered by dropping CAS low prior to RAS going l |
| ZC1 | (16) | MINI | 08+ | 专业射频微波 | NOTE: EP circuits are designed to meet the DC specifications shown in the |
| ZC2 | (17) | N/A | N/A | N/A | NOTE: EP circuits are designed to meet the DC specifications shown in the |
| ZC3 | (4) | NO | NO | Busy is active high and Section dependent but not Group dependent. Even | |
| ZC4 | (268) | MOT | SMD | 05+ | generation technique. Safety and reliability features include a |
| ZC5 | (57) | MOT | PLCC52 | 06+ | The RTD Logo is a registered trademark of RTD Embedded Technologies. cpuM |
| ZC6 | (6) | MINI | 08+ | External Access Input, Active Low. Connect to ground to force the DS87C5 | |
| ZC8 | (90) | MOT | PLCC52 | 06+ | See SOA curves or consult factory for appropriate derating. The set-poin |
| ZC9 | (76) | MOTO | 01+ | The Fairchild Switch FSTD16861 provides 20-bits of high- speed CMOS TTL | |
| ZCA | (24) | TDK | 2007+PB | (3) Inductor Selection A 10uH inductor is recommended for most ap | |
| ZCB | (1) | The LM139 series consists of four independent precision voltage comparato | |||
| ZCC | (2) | MOTOROLA | SMD | 2000 | The purchaser of this device should be aware that approvals may be requi |
| ZCD | (2) | TYMSHARE | CDIP | CDIP | DELAY BLOCK: This active high input may be used to halt address generatio |
| ZCL | (1) | An infrared emitter constructed of AlGaAs that emits at 890 nm operates | |||
| ZCN | (2) | Upon power-up or reconfiguration, an FPGA enters the Master Serial mode | |||
| ZCP | (3) | Please read the General Operating Considerations sec- tion, which | |||
| ZCR | (3) | -48V/-24V Input Active ORing for carrier class communication equipment Re | |||
| ZCS | (7) | ZETEX | SOT-23 | 05+ | Circuit design is enhanced by the addition of a synchronous set and an as |
| ZCY | (16) | N/A | A ferrite antenna is connected between IN and VCC. For high sensitivity, | ||
| ZD0 | (2) | Copies of documents which have an ordering number and are referenced in th | |||
| ZD1 | (24) | DSI | n/a | CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic ch | |
| ZD2 | (2) | ZYDA | ZYDA | 03+ | BUFFER TO MAIN MEMORY PAGE PROGRAM WITH BUILT-IN ERASE: Data written into |
| ZD3 | (6) | LAMBDA | Module | N/A | The on-chip PLLs are a standard frequency- and phase- locked loop archi |
| ZD4 | (3) | zeltex | zeltex | dc76 | We apologize for the inconvenience placed upon customers in ordering this |
| ZD5 | (7) | UTC | 07+ | Case: SOT-363, Molded Plastic Case material - UL Flammability Rating C | |
| ZD6 | (4) | SMD | 50000 | UTC | For the adjustable output controller, the VREF pin allows great flexibili |
| ZD7 | (6) | LAMBDA | Module | N/A | The devices low VCC detection circuitry protects the users system from |
| ZD8 | (1) | DIP-16 | 2003 | The SP8480 multiplexer inputs have been de- signed to allow substantial | |
| ZD9 | (2) | DSI | n/a | The LVTH162245 data inputs include bushold, eliminating the need for ex | |
| ZDA | (16) | analog solutions | analog solutions | dc89 | TI assumes no liability for applications assistance or customer product d |
| ZDB | (9) | • Five Crystal modes, including High-Precision PLL for USB | |||
| ZDC | (25) | MINI | 08+ | Note 3: An internal Zener on the GATE pin clamps the charge pump voltage | |
| ZDD | (4) | Stresses beyond those listed under Absolute Maximum Ratings may cause per | |||
| ZDE | (10) | The device has 64 software-configurable I/O pins (36 in the FBGA-144 pac | |||
| ZDF | (1) | * All specs and applications shown above subject to change without prior | |||
| ZDG | (1) | The WM8802 is a digital audio interface transceiver conforming to IEC 609 | |||
| ZDI | (1) | ZYDAS | QFP | 0531+ | The ADC11DL066 is a dual, low power monolithic CMOS analog-to-digital c |
| ZDK | (1) | SOP | 92 | ||
| ZDL | (3) | N/A | PLCC | NOTES: 1. Dimensions are in inches. 2. Metric equivalents | |
| ZDM | (4) | NON-HERMETIC LOW COST CERAMIC 70mil PACKAGE +20.0dBm TYPICAL OUTPUT POWE | |||
| ZDN | (1) | SOP | 92 | NOTES: (1) dBFS refers to dB below Full-Scale. (2) Percentage accuracies | |
| ZDO | (1) | Pb−Free Packages are Available* Integrated Power Swit | |||
| ZDR | (2) | The RC5033 is a synchronous mode DC-DC controller IC dedicated to provid | |||
| ZDS | (9) | ZETEX | SM-8 | 06+ | • IEEE 802.3z Gigabit Ethernet Compliant • Supports 1.25 Gb |
| ZDT | (41) | 99 | 100mV Specified Input Range 125mV Full-Scale Range 95dB typ. CMR, 82dB t | ||
| ZDX | (1) | fer | n/a | Asasecond-generationHOTLinkdevice,the CYP(V)15G0401DXB extends the HOTLin | |
| ZDZ | (1) | 2004 | The HA-5020 is a wide bandwidth, high slew rate amplifier optimized for v | ||
| Z-E | (2) | Ultra Low Dropout300 mV at 300-mA Load Ultra Low Noise30 mVRMS (10-Hz t | |||
| ZE- | (7) | SGS | 88328 | Calibration Delay, Dual Edge Sampling and Serial Interface Chip Select. | |
| ZE0 | (1) | NS | 06+ | 2500 | The ZE02CC5GL series of three-terminal negative regulators are available i |
| ZE1 | (1) | 1824 | TPL | 90+ | Samsung Electronics' microcontroller business has been awarded full ISO-1 |
| ZE2 | (1) | NO | NO | NOTES: (1) Stresses above these ratings may cause permanent damage. Expo | |
| ZE5 | (2) | ZYIOGIC | 2006 | These devices feature a guaranteed maximum TTB window specifying all oc | |
| ZE6 | (3) | MARVELL | 0332+ | International Rectifiers MEGA RAD HARD technology HEXFETs demonstrate e | |
| ZE8 | (1) | Product of input modulation: f = 44MHz, Df = 214MHz p-p and f = 6MHz, Df | |||
| ZE9 | (3) | QFP | N/A | (1) The marketing status values are defined as follows: ACTIVE: Product | |
| ZEA | (1) | Note 1: Absolute Maximum Ratings are those values beyond which the safet | |||
| ZEB | (1) | TEMIC | The CY62137CV18 is a high-performance CMOS static RAM organized as 128K | ||
| ZEC | (1) | ZEC | DIP | Notes a. Room = 25_C, Full = - 40 to 85_C. b. The algebraic convention | |
| ZED | (7) | MINI | 08+ | C Over 3,000 Gates of PLD with 16 macro cells C Use for peripheral glue | |
| ZEF | (1) | ST | 98+ | 24 | The bq2050H internally determines the temperature in 10C steps centered f |
| ZEL | (4) | MINI | 08+ | Parameter RESOLUTION Offset Error Gain Error Differe | |
| ZEM | (4) | MINI | 08+ | Single +5V power supply Sigma-Delta A/D D/A with digital filters Suppo | |
| ZEN | (10) | 0804+ | The HIP6601B drives the lower gate in a synchronous rectifier to 12V, w | ||
| ZEP | (2) | MODULE | MODULE | • 24bit Fixed-point Digital Signal Processing • Maximum Sys | |
| ZER | (1) | N/A | N/A | N/A | Power247™ PowerSaver™ PowerTrench® QFET™ QS͐ |
| ZES | (2) | MINI | 08+ | 专业射频微波 | Absolute maximum ratings are limiting values (referenced to GND = 0V), to |
| ZET | (6) | SSOP | 05+ | The LM3200 offers superior features and performance for mobile phones a | |
| ZEU | (1) | - | TQFP | 07+/08+ | The DS1258AB provides full functional capability for VCC greater than 4.75 |
| ZEW | (6) | UV/OV PINCCUNDERVOLTAGE AND OVERVOLTAGE DETECTION Undervoltage Fal | |||
| ZEX | (7) | 301 | INFINEON | 03+/04+ | 8-bit microcontroller ROMless, 128KByte and 256KByte ROM options 16 bit |
| ZF1 | (7) | N/A | IGBT | 2005+ | The pulse-skip regulation mode minimizes operating current because it doe |
| ZF2 | (3) | N/A | N/A | Now consider what happens to the inductors current during these two stat | |
| ZF5 | (2) | Two Fully Independent Diodes Ceramic Fully Insulated Package (VISOL = 25 | |||
| ZF9 | (1) | ||||
| ZFA | (6) | MINI | 08+ | A 1µF (min) capacitor from Vout to ground is required. Then outpu | |
| ZFB | (10) | MINI | 08+ | The Hyundai ZFBDC20-900HP Series are 32Mx72bits ECC Synchronous DRAM Modul | |
| ZFD | (20) | MINI | 08+ | Chopper Stabilization is a unique approach used to minimize Hall offset on | |
| ZFI | (2) | Members of the Texas Instruments Widebus ™ Family D-Type Flip-Flops | |||
| ZFK | (1) | phoenix | phoenix | dc97 | An analog to digital (A/D) conversion can be accomplished with ei |
| ZFL | (20) | MINI | 08+ | 专业射频微波 | OUTPUT CLOCK: This pin is selectable under processor control to be either |
| ZFM | (21) | MINI | 08+ | Table 2 shows the maximum number of user I/Os available. The Virtex-II | |
| ZFR | (3) | MINI | 08+ | 专业射频微波 | The ZFRSC-20505 is a bipolar monolithic integrated circuit wideba |
| ZFS | (62) | MINI | 08+ | Figure 6. Block diagram of the 2 GHz production test board used for NF, G | |
| ZFX | (1) | QFP | ZOOM | 05+06+ | Note: The X prefix in a Motorola part number designates a Pilot Productio |
| ZFY | (3) | MINI | 08+ | Dead-time control prevents shoot-through current from flowing through the | |
| ZG0 | (2) | The IC must be equipped with external RC circuitry to limit the voltage i | |||
| ZG1 | (1) | ST | SOT23-8 | 07+ | - Updated SPI electrical characteristics. - Updated Derivative Differen |
| ZG3 | (2) | N/A | N/A | N/A | sensor and thermistor can be used independent of each other if desired, |
| ZG4 | (1) | schrack | schrack | dc03 | The SST39VF160Q/VF160 devices are 1M x 16 CMOS Multi-Purpose Flash (MPF |
| ZG5 | (3) | KOGANEI | 3.1 Qualification. Microcircuits furnished under this specificatio | ||
| ZG7 | (1) | ST | SOT23-8 | 07+ | Note: The data extraction operations in modes 1 and 2 are identical. Howe |
| ZGB | (1) | N/A | 1206 | An external resistor RCF is recommended be- tween the slider of the con | |
| ZGC | (5) | These lamps are made with an advanced optical grade epoxy offering super | |||
| ZGF | (4) | Falling or rising edge as determined by the control bits of serial word. | |||
| ZGL | (10) | vishay | vishay | dc0513 | Built on the Vishay Siliconix proprietary high voltage silicon gate proc |
| ZGP | (320) | ZILOG | 07+ | Wide supply voltage range from 1.65 V to 5.5 V 5 V tolerant input/outpu | |
| ZH- | (1) | Information in this document is provided in connection with Conexant Syst | |||
| ZH0 | (1) | 2008 | Note 10: If the product is in Shutdown mode and VDD exceeds 6V (to a max | ||
| ZH1 | (1) | PHILIPS | SSOP-8 | 07+ | 1 A critical component is a component used in a life-support devi |
| ZH2 | (5) | MOT | PLCC52 | 04+ | GaAs (-2.0V) ICs from an existing +5.0V or +3.3V source. These r |
| ZH3 | (2) | YCL | . | scribed in Table 3.), terminated by an acknowl- edge bit. When writing | |
| ZH4 | (5) | ZTX | 0 | These Hitachi MultiMediaCards support a second interface operation mode t | |
| ZHA | (1) | SANKE | 12000 | 07+ | |
| ZHB | (7) | TDK | • 10-bit, up to 16-channel Analog-to-Digital Converter (A/D | ||
| ZHC | (27) | ZETEX | SOT-23 | 04+ | Wideband SFDR: 1 C 20 MHz Analog Out 20 C 40 MHz Analog Ou |
| ZHG | (2) | OSRAMOPTO | Figure above shows the topology of a protected analog subscriber line a | ||
| ZHL | (34) | MINI | 08+ | Note 1: Absolute Maximum Ratings are those values beyond which the life | |
| ZHM | (3) | Unless otherwise noted, a positive logic (active High) convention is as | |||
| ZHP | (2) | The ABT162244 devices are 16-bit buffers and line drivers designed spec | |||
| ZHR | (14) | N/A | N/A | 600 | The operating system can theoretically shut down an RS-232 port if, after |
| ZHT | (10) | ZETEX | 05++ | SOT-23 | under the control of the WR, CS, and DAC channel address pins, A0 to A7. |
| ZHX | (12) | This hermetically packaged QPL product features the latest silicon and pa | |||
| ZHY | (2) | Note 2 Operating Ratings indicate conditions for which the device is func | |||
| ZI- | (2) | The UC382 is a low-dropout-linear regulator providing a quick response to | |||
| ZI0 | (1) | AMIS | QFP160 | Product Description/Features: • Low skew, Zero Delay Buffer ̶ | |
| ZI3 | (1) | Each port contains a burst counter on the input address regis- ter. The | |||
| ZI9 | (1) | ZIEIC | QFP | 02+ | Microchip offers a QTP Programming Service for factory production order |
| ZIB | (1) | These devices do not normally require heat sinks, however, standard prec | |||
| ZIC | (6) | enabled and synchronous loading occurs on the next clock pulse. Clockin | |||
| ZIF | (1) | Collector-to-Emitter Voltage Continuous Collector Current Pulsed Colle | |||
| ZIG | (1) | Upon power-up, the FIFO must be reset with a Reset (RS) cycle. This cau | |||
| ZIL | (20) | The three-terminal port of the DS1804 provides an increment/decrement inte | |||
| ZIO | (1) | The 74LVC(H)16244A is a 16-bit non-inverting buffer/line driver with 3- | |||
| ZIP | (4) | TA = Ambient Temperature TC = Case Temperature TL = Lead TemperatureTJ = | |||
| ZIR | (12) | CMD | DIP-16 | 95+ | B ild / Fig. 7 W1C - E inpha sen -We ch selweg schaltung / S ingle- phase |
| ZIV | (63) | CUBE | QFP | The Atmel cell implements a rich and powerful set of logic functions, s | |
| ZJ- | (2) | Drain-Source On-State Resistance Forward Trans-Conductance(1) Input Capa | |||
| ZJ4 | (1) | Data Outputs: A 4-bit parallel data word, forming a HEX character represen | |||
| ZJD | (1) | The A1425 ac-coupled Hall-effect sensor is a monolithic integrated circui | |||
| ZJG | (1) | VDD to GNDC0.3 V to 7 V Analog Input Voltage to GNDC0.3 V to VDD + 0.3 V | |||
| ZJK | (3) | TDK | ZIP-4 | Hynix HYMD512G726(L)8M-K/H/L series incorporates SPD(serial presence detec | |
| ZJL | (6) | MINI | 08+ | Unless otherwise specified, these specifications apply over Ta=0 to 70$C, | |
| ZJS | (30) | tdk | tdk | dc94 | The Erase Suspend/Erase Resume feature allows the host system to pause a |
| ZJY | (85) | TDK | DIP | 01+ | Source code: ◊ VHDL Source Code or/and ◊ VERILOG Source Code |
| ZK2 | (1) | PLL division factors for different clock inputs The word select PLL Th | |||
| ZK3 | (1) | N/A | QFP | operating parameters. Those bits are summarized in Table 2. Dead-time co | |
| ZK8 | (1) | NS | PLCC-68 | 99 | NOTES: (1) Stresses above these ratings may cause permanent damage. Expo |
| ZK9 | (4) | QFP | N/A | AEC-Q100† Qualified for Automotive Applications Customer-Specific | |
| ZKB | (3) | ||||
| ZKF | (1) | Burst mode operation Auto & self refresh capability (8 | |||
| ZKL | (4) | MINI | 08+ | 专业射频微波 | |
| ZKT | (4) | ARTESYN | Module | N/A | Features • Progressive scan allows individual readout of the image |
| ZL- | (1) | D Auto Selection of S/E or LVD SCSI Termination D 2.7-V to 5.25-V TERMPW | |||
| ZL1 | (9) | ZARLINK | N/A | QFN | Smoke Detection Circuit C The smoke comparator compares the ionization cha |
| ZL2 | (4) | ZILG | 07+ | 100 | CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic ch |
| ZL3 | (17) | ZARLINK | 05+ | TQFP1414-80 | NOTES: 1. Measured with outputs open. 2. Refresh period is 64ms. 3. Int |
| ZL4 | (13) | MITEL | 05+▲▲ | DESCRIPTION The SuperFREDMesh™ series is obtained through an ext | |
| ZL5 | (33) | ZARLINK | dip-40 | 0612+ | |
| ZL6 | (4) | MOT | 04+ | QFP-M44P | The PT6670 is a series of high-output Integrated Switching Regulat |
| ZL8 | (12) | ZARLINK | 08+ | Pb−Free Packages are Available Operating Voltage Rang | |
| ZLB | (4) | SMD-16 | 04+ | The operational amplifier has 6.4 MHz of bandwidth and 1.6 V/µs of | |
| ZLD | (12) | ZETEX | NOTE 1: Maximum power dissipation is a function of TJ(max), JA, and TA. T | ||
| ZLE | (1) | NOTES: 1. Always design to the specified minimum/maximum electrical limi | |||
| ZLG | (21) | ZILOG | DIP | 01+ | FEATURES Allows Safe Board Insertion and Removal from a Live C48 |
| ZLI | (1) | NOTES: 1. The SA56004X is optimized for 3.3 VDD operation. 2. Definitio | |||
| ZLL | (13) | ZHONGXING | LL34 | 06+ | This can be a problem if RXDATA is driving a circuit that must sleep when |
| ZLN | (68) | N/A | TSSOP-8 | 2004 | (1) Maximum voltage between transistors shall be 500 V dc. (2) Derate |
| ZLP | (73) | ZILOG | 07+ | Hynix HYMD116645B(L)8-M/K/H/L series is designed for high speed of up to | |
| ZLR | (3) | ZILOG | SOP-28 | 05+/06+ | ICSI reserves the right to make changes to its products at any time withou |
| ZLT | (4) | The HT82K628A will respond with ACK, clears its output buffer, sets all k | |||
| ZLW | (15) | MINI | 08+ | The TMC249 is a dual full bridge driver IC for bipolar stepper motor con | |
| ZM- | (3) | PRIMAX | QFP | 03+ | Internal interrupt sources include the Timers and Se- rial channel 0 Ext |
| ZM0 | (1) | SOT | 99+ | The UART transmits data, sent to it over the peripheral 8-bit bus, on the | |
| ZM1 | (1) | 00+ | Digital hold for loss-of-input clock Support for 255/238 (15/14), 255/23 | ||
| ZM2 | (3) | FRONTTRR | 1206 | Margin Dn*: When this open-collector (open-drain) input is asserted to GN | |
| ZM3 | (19) | INITIALIZATION During the microprocessor initialization routine, t | |||
| ZM4 | (147) | AE | 06+/07+ | DCLK 3-wire FSK Interface Data Clock (Schmitt Input/CMOS Output). In mod | |
| ZM5 | (2) | ZILOG | 721 | It is significant to note that this equation and Figure 7 apply to all 5 | |
| ZM6 | (1) | Drain-Source Voltage10V6VVds Gate-Source Voltage-6V-3VVg | |||
| ZM7 | (1) | The HAL5xx family consists of different Hall switches produced in CMOS | |||
| ZMA | (3) | PANASONIC | O603 | 05+ | |
| ZMB | (6) | PLCC | Advance/Load Input. Used to advance the on-chip address counter or load a | ||
| ZMC | (11) | MOT | . | CS: The input to the PWM, peak current, and overcurrent comparators. The | |
| ZMD | (22) | semikron | semikron | dc03+ | The MAX3873A is a compact, low-power 2.488Gbps/ 2.67Gbps clock-recovery an |
| ZME | (2) | Lamp Current Feedback Soft Start on Feedback Voltage Dimming (0V~2V) | |||
| ZMG | (2) | SUN LED | All devices also available in tray quatities. For the most current | ||
| ZMJ | (1) | The levels of the current sources can, however, be selected over a wide | |||
| ZML | (4) | Notes: 1. The dominant wavelength, ëD, is derived from the CIE Chr | |||
| ZMM | (522) | gs | gs | dc00 | 75 Volt Motor Supply Voltage 29 Amp Output Switch Capability, All N-Chan |
| ZMN | (17) | Vishay Siliconix maintains worldwide manufacturing capability. Products ma | |||
| ZMQ | (1) | MINI | 08+ | Access Time Break-Before-Make Delay Time Enable Delay (On, Off) Settlin | |
| ZMR | (20) | ZTX | 1 | Fully Differential Architecture Centered Input Common-mode Range Minimum | |
| ZMS | (21) | ZETEX | SOD-323 | 06+ | The lamp current is limited by a control amplifier that protects the exte |
| ZMT | (1) | ZETEX | 06+ | 5.1 In consideration of the materials provided as part of the Voice Codec | |
| ZMU | (6) | VISHAY | 1WR | 05+ | The safe operating area curves indicate ICCVCE limits of the tran |
| ZMV | (48) | SOD323 | The ZMV829A is a CMOS IC built-in Digital Echo function with microphone p | ||
| ZMX | (8) | MINI | 08+ | UCC283−3 and UCC283−5 versions are in 3-lead packages and hav | |
| ZMY | (161) | itt | itt | dc95 | Description The 14.22 mm (0.56 inch) LED dual digit seven segment displa |
| ZMZ | (2) | 32 transmit queues with optional priority levels 64K VCCs maximum ** AA | |||
| ZN- | (1) | Third Order Intermodulation Distortion (VDD = 28 Vdc, Pout = 26 | |||
| ZN0 | (3) | Functional improvements have also been implemented in this family. The UC | |||
| ZN1 | (18) | GPS | DIP | ||
| ZN2 | (12) | 93 | When starting up the circuit utilizing the MSK 4301 for the first time, | ||
| ZN3 | (4) | CAN | CAN | Notes ; Repetitive Rating : Pulse Width Limited by Maximum Junction Temp | |
| ZN4 | (85) | GPS | CDIP | The TPS72xx family of low-dropout (LDO) voltage regulators offers the b | |
| ZN5 | (22) | GPS | The ISL6271A is a versatile power management IC (PMIC) designed for the X | ||
| ZN6 | (2) | 3 3 MANCHESTER DECODER The decoder consists of a differential input circ | |||
| ZN7 | (10) | DIP | 02+ | TELEFILTER GmbH Potsdamer Straße 18 D 14 513 TELTOW / Germany Tel | |
| ZN8 | (1) | ZILOG | DIP | 03+ | PLL1 generates a frequency that is equal to the reference divided by an 8 |
| ZN9 | (1) | QFP | 99+ | For a microcontroller that has no dedicated SPI bus, a general purpose | |
| ZNA | (30) | FERRANTI | DIP | N/A | ISP1161A provides two downstream ports for the USB HC and one upstream po |
| ZNB | (78) | ZTX | 0 | SUZNBG3111Q20ZNBG3111Q20ARY DESCRIPTION The ZNBG3111Q20 is a 64 ZNBG3111 | |
| ZNC | (9) | PS | PS | 90+ | A photo of the 12x19mm pressure-sensing module (Figure 5) illustrates the |
| ZND | (5) | MINI | 08+ | 专业射频微波 | The CAT24FC17 supports the I2C Bus data transmission protocol. This Int |
| ZNI | (1) | Notes: Notes 1 through 6 are applicable to the Receiver Differential &nb | |||
| ZNM | (1) | ZETEX | 04+ | Supply Voltage. 2.7V to 5.5V Active-High Thermostat Output. Open-drain o | |
| ZNP | (4) | FERRANTI | CDIP | 03+ | Description Luminous Intensity per LED (Digit Average)[3,4] Pe |
| ZNR | (12) | FFeatures 1) Inclined toward the printing surface to provide excellent p | |||
| ZNV | (2) | NOTES 1Stresses above those listed under Absolute Maximum Ratings may ca | |||
| ZO1 | (4) | tag | tag | dc90 | This device is particularly well suited for portable elec- tronics (e.g. |
| ZO2 | (5) | ZILOG | . | Description The HSDL-3203 is a miniature low cost infrared transceiver | |
| ZO4 | (1) | CONEXANT | 00+ | QFP0707-32 | • 10,000 erase/write cycles Enhanced FLASH Program memory t |
| ZO7 | (2) | Z | DIP | The MT317xB/337xB devices offer a powerdown function to preserve power con | |
| ZO8 | (17) | Z | DIP | 6. Multifunctional, high-precision analog-to-digital converter The | |
| ZOG | (1) | SONY | 4.4.2 Group B inspection. Group B inspection shall be conducted in | ||
| ZOL | (1) | FUJ | 96 | The FB pin provides input to the inverting input of the error amplifier. | |
| ZON | (1) | Quiescent current does not increase significantly as the dropout | |||
| ZOS | (10) | MINI | 08+ | Automatic mode transition of constant-frequency synchronous rectification | |
| ZP- | (24) | MINI | N/A | • Plastic package has Underwriters Laboratories Flammabilit | |
| ZP0 | (2) | JAT | SMA | 05+ | All ESD diodes are designed to safely handle the high current spikes sp |
| ZP1 | (5) | The user assumes all responsibility and liability for proper and safe han | |||
| ZP2 | (6) | 1.125 x 0.068 Microstrip 0.071 x 1.080 Microstrip 0.060 x 1.080 Micro | |||
| ZP3 | (5) | 92+ | 31 | Notes: 1. TA is the instant on case temperature. 2. See the | |
| ZP4 | (5) | roe | roe | dc94 | This bit is a volatile latch that powers up in the LOW (disabled) state |
| ZP5 | (2) | Converts a High-level analog input voltage into a floating proportional | |||
| ZP6 | (1) | • Low Jitter • Overtone technology • High Q Crystal ac | |||
| ZP8 | (3) | Port A also serves as a low-voltage 8-bit bi-directional I/O port with in | |||
| ZPA | (1) | VCC1 is the positive supply voltage pin for the transmitter output amplifi | |||
| ZPB | (2) | Loop Filter - the Loop Filter is similar to a first order low pass filter | |||
| ZPC | (2) | ALTERA | DIP | 07+ | As data passes through the McASP, it can be realigned so that the fixed-p |
| ZPD | (76) | cdil | n/a | Note 3 The HALT mode will stop CKI from oscillating in the RC and the Cry | |
| ZPH | (2) | EPSON | SOJ4 | 07+ | A transmit squelch circuit, which consists of a pulse threshold detecto |
| ZPI | (2) | The algebraic convention is used in this data sheet; the most negative val | |||
| ZPK | (4) | Products listed in bold are WTE Preferred devices. !T3 suffix refers to a | |||
| ZPM | (2) | sie | sie | dc00 | The ZPM670H1 supports secondary cache in systems utilizing either a linea |
| ZPP | (1) | JST | 2006PB | The LH28F016SU is a high performance 16M (16,777,216 bit) block | |
| ZPS | (189) | N/A | ST | 04+ | This family is a 64M bit dynamic RAM organized 16,777,216 x 4-bit configur |
| ZPT | (1) | The ISD5008 device is designed for use in a micro- processor- or microco | |||
| ZPU | (5) | gs | gs | dc00 | DESCRIPTION The 74LVX16373 is a low voltage CMOS 16 BIT D-TYPE LATCH w |
| ZPY | (51) | cdil | n/a | Charge in Li-Ion and Li-Polymer Batteries Supports the Smart Battery Spec | |
| ZQ0 | (3) | ZDEC | 03+ | DESCRIPTION The RA07N3340M is a 7.5-watt RF MOSFET Amplifier Modu | |
| ZQA | (1) | Gain Drift is a measure of the change in the full scale range output ove | |||
| ZQL | (14) | MINI | 08+ | Transmitter Section The transmitter section includes the Transmitter O | |
| ZQM | (1) | 1 | Note: Stresses greater than those listed under MAXIMUM RATINGS may cause | ||
| ZR0 | (2) | • Data transfer may be initiated only when the bus is not b | |||
| ZR1 | (4) | AVX | N/A | 2000 | Stresses above those listed under absolute maximum ratings may cause perm |
| ZR2 | (30) | ZETEX | SOP8 | 99 | The ADCIN bit selects the input of the on-chip A/D converter. When the |
| ZR3 | (187) | ZORAN | TQFP160 | 04+/98+ | The ADR380 and ADR381 are micropower, low dropout voltage (LDV) devices |
| ZR4 | (68) | SOJ40 | 2007+ | Notes: 1. The nominal thermal resistance of a display mounted in a socke | |
| ZR5 | (3) | TI | 98+ | TSOP | the full-scale output current. The differential linearity errors of the |
| ZR6 | (3) | QFP | ZORAN | Resistors R1 and R2 provide a DC input impedance to ground. The input si | |
| ZR7 | (40) | N/A | N/A | N/A | The ZR7441AKG combines 4096 bits of EEPROM, a 16-byte control page, two g |
| ZRA | (65) | MODULE | MODULE | Address, active High. These 18 inputs, combined with the DQ[15]/A[ | |
| ZRB | (25) | ZETEX | 2003 | SOP-8 | Overcurrent detection pin Monitors equivalent load current through source |
| ZRC | (68) | ZTX | 08+ | Device programming is performed a byte/word at a time by executing the | |
| ZRE | (8) | ZTX | 200 | nRF0433 is a true single chip UHF transceiver designed to operate in the | |
| ZRF | (4) | 飞利蒲 | TO-220-5 | 05+ | AP1187 is a 1A regulator with extremely low dropout voltage. This product |
| ZRH | (1) | ZETEX | 12000 | 07+ | SM5212E begin a 4-word transmission cycle upon receipt of a transmission |
| ZRL | (9) | MINI | 08+ | Features O 5V tolerant inputs and outputs O 2.3VC3.6V VCC specifications | |
| ZRO | (1) | MINI | 08+ | The error-amplifier input common-mode voltage ranges from 0.9 V to 1.5 V. | |
| ZRP | (1) | MINI | 08+ | The ADS5221 is a pipeline, CMOS Analog-to-Digital Con- verter (ADC) tha | |
| ZRT | (37) | ZTX | Advanced+ Boot Block Flash Memory 70 ns Access Time at 2.7 V Instant | ||
| ZRU | (1) | NOTES: 1Stresses above those listed under Absolute Maximum Ratings may c | |||
| ZRX | (1) | PDIP16 | 02+ | The SD1463 is a 28 V Class C gold metallized epitaxial silicon NPN plan | |
| Z-S | (3) | 1 | SIPEX | 2004+ | To minimize noise, the analog and digital circuits in the ISD MicroTAD-1 |
| ZS- | (1) | (1) Offset error is the deviation of the average code from mid-code for a | |||
| ZS0 | (1) | ||||
| ZS1 | (56) | N/A | 4. Design your application so that the product is used within the ranges | ||
| ZS2 | (4) | AD | 6/SOT23 | 2007 | Figure 2 illustrates the Differential/Gauge Sensing Chip in the b |
| ZS3 | (14) | COSEL | MODULE | 03+ | Stresses beyond those listed under absolute maximum ratings may cause per |
| ZS4 | (5) | SOP大 | Sector Protection A hardware method to lock a sector to prevent | ||
| ZS5 | (5) | TI | SOP/64 | 07+ | Differential reference clock input. The reference clock input is used as |
| ZS6 | (14) | COSEL | Module | N/A | • 100,000 erase/write cycle Enhanced FLASH program memory t |
| ZS8 | (1) | All FETs are controlled by microcomputer Built-in low dropout series re | |||
| ZSA | (8) | RENESAS | 06+ | The ZSA5A27 operates over a wide supply range (2.25 to 18V) and supply c | |
| ZSC | (27) | MINI | 08+ | The FSTD3306 is a 2-bit ultra high-speed CMOS FET bus switch with enhan | |
| ZSD | (9) | DIP | Minimum Dielectric Strength, Input-Output Minimum Insulation Resistance, | ||
| ZSF | (1) | and low Vcc,131,072-word by 8-bit CMOS static RAMs. They are fabricated u | |||
| ZSG | (1) | SYSTEM PERFORMANCE Resolution ENOB Output Noise No Missing Codes Int | |||
| ZSH | (12) | analog sol | analog sol | dc87 | TSTGStorage Temperature PDPower Dissipation TSOLDERBall Soldering Temper |
| ZSI | (4) | 04+ | Note Differential gain and differential phase measured for four series LM | ||
| ZSL | (1) | The ADC122S101 operates with a single supply that can range from +2.7V | |||
| ZSM | (36) | ZETEX | TO89 | 99+ | When a recommended transformer is used and option pins are properly set, |
| ZSN | (1) | (空白) | O805 | UART channel B Transmit Data or infrared encoder data. Standard transmit | |
| ZSP | (39) | N/A | N/A | 04+ | Optimized for 2.5V LVTTL Guaranteed Low Skew < 25ps (max) Very low d |
| ZSR | (77) | ZETEX | 00+ | Another novel feature of the ZSR300CL is its user-selectable output codi | |
| ZSS | (20) | Normally the signal source for the LM1881 is assumed to be clean and re | |||
| ZST | (2) | Note 1: Specifications to -40C are guaranteed by design and not production | |||
| ZSW | (2) | MINI | 08+ | Note 1: Absolute Maximum Ratings indicate limits beyond which damage to t | |
| ZSY | (2) | itt | n/a | 1. This drawing measure is a standard value. All dimensions are in millim | |
| ZT- | (1) | ||||
| ZT0 | (11) | ND | DIP | 95 | The 6N137, HCPL-2601/2611 single-channel and HCPL-2630/2631 dual-channel |
| ZT1 | (72) | 91 | The DI2CM is an I2C-compatible master-IP core from Digital Core Design. | ||
| ZT2 | (47) | MOT / PH | CAN3 | 02+ / 00+ | Stresses beyond those listed under absolute maximum ratings may cause per |
| ZT3 | (35) | SVCC | DIP | 95 | The PSoC™ family consists of many Mixed-Signal Array with On-Chip |
| ZT4 | (20) | FRD | CAN3 | 00+ | Data Mode: The ZT40 enters data mode after it establishes a modem link a |
| ZT6 | (14) | FRD | CAN3 | Maximale Streuung des Widerstandswertes bei der Temperatur T in % Nennto | |
| ZT7 | (5) | 98 | SOP | This is a four-state pin. DF/DCS = VA, output data format is offset bin | |
| ZT8 | (11) | FRD | CAN3 | The window comparator section detects data from the resis- tor input net | |
| ZT9 | (12) | N/A | N/A | N/A | The VCELL1CVCELL4 inputs are divided down from the cells using precision |
| ZTA | (13) | 2P | 2002 | Q1 through Q4 and also additional external output transistors can be prote | |
| ZTB | (7) | CQ | UM-1 | 2001 | When setting LB at the high level and other controls are in an active sta |
| ZTD | (13) | ______ 1/ Stresses above the absolute maximum rating may cause permanent | |||
| ZTE | (8) | gs | gs | dc00 | The PIP processor SDA 9188-3X handles picture reduction (decimation with |
| ZTH | (1) | IDENTIFICATION INPUTS: These four pins are part of the mechanism that all | |||
| ZTJ | (1) | Low Supply Current: 1.5µA Max Rail-to-Rail Input and Output Low Of | |||
| ZTK | (12) | itt | n/a | The PTH05050 is one of the smallest non-isolated power modules fr | |
| ZTL | (14) | ZTX | Not 100% tested. CB = total capacitance of one bus line in pF. As a tran | ||
| ZTM | (1) | • Generation 4 IGBTs offer highest efficiencies available | |||
| ZTN | (1) | When setting BC1 and BC2 at a high level or CS at a low level, th | |||
| ZTP | (3) | (Continued) • Direct power saving function : Power supply c | |||
| ZTR | (3) | ZTX | 0 | Absolute Maximum Ratings indicate sustained limits beyond which damage to | |
| ZTS | (47) | N/A | SMA | 05+ | The ILD610 series is a dual channel optocoupler series for high density |
| ZTT | (20) | 2P | 2002 | The LMP7711 is a low noise, low offset, CMOS input, rail- to-rail outpu | |
| ZTU | (4) | FER | CAN | MaverickKey™ IDs • 32-bit unique ID can be used for DRM comp | |
| ZTW | (16) | C175CmAIndustrialfCLOCK = 1 MHz One output at a time for a maxim | |||
| ZTX | (372) | ztx | ztx | dc01 | Meets or exceeds PC133 registered DIMM specification 1.1 Spread Spectru |
| ZTY | (3) | TDK | 06+ | 2850 | Note 1) The specified condition Tj=25˚C means that the test should |
| ZU- | (2) | The HY5DU12422C(L)TP, HY5DU12822C(L)TP and HY5DU121622C(L)TP are a 536,870 | |||
| ZU1 | (2) | ||||
| ZU4 | (1) | MOT | PLCC | 00+ | Notes: 1. For Max. or Min. conditions, use appropriate value specified u |
| ZU5 | (1) | unitrode | unitrode | dc80+ | Each Peppermint board features a preprogrammed CY22393 embedded onto th |
| ZU6 | (1) | ZILOG | SOP | 03+ | s 4 channel UART s 5 V, 3.3 V and 2.5 V operation s Pin compatible with |
| ZUB | (1) | 2.0% output accuracy (25˚C) Low dropout voltage: 250 mV @ 500mA (t | |||
| ZUG | (1) | TDK | SOP | 532 | NEC's NR7800 Series are InGaAs PIN photo diode (PIN-PD) coaxial modules |
| ZUM | (40) | Vth can be expressed as voltage between gate and source when low o | |||
| ZUP | (19) | LAMBDA | Module | N/A | In a novel approach to this problem, DASA IMT and Seyonic SA (both of Neuc |
| ZUR | (2) | * | QFP | 03+ | PC Card Wireless LAN Adapters USB Wireless LAN Adapters PCN / Wireless |
| ZUS | (129) | COSEL | MODULE | N/A | Direct Interface to ISA and PCMCIA with No Wait States Flexible Bus Inte |
| ZUW | (67) | N/A | Generates Three Voltages: 5.1V at 10mA C 5V, C10, or C15 | ||
| ZV1 | (1) | be accessed in less than 70ns/90ns with respect to Spec. This eliminates | |||
| ZV3 | (1) | VBIAS (VCC, VBS 1,2,3) = 15V unless otherwise specified. The VIN, VTH and | |||
| ZV4 | (4) | BROADCOM | BGA | 04+ | * All specs and applications shown above subject to change without prior |
| ZV5 | (2) | A/N | QFN | 04 | When expander logic is used in the data path, add the appro- priate maxim |
| ZV7 | (1) | The ADSP-21991 is a mixed signal DSP controller based on the ADSP-219x D | |||
| ZV8 | (2) | Besides its basic functions (oscillator, demodulator and threshold switch) | |||
| ZV9 | (9) | ZETEX | 06+ | SOD523 | • Fully static operation and Tri-state output • TTL compatibl |
| ZVE | (1) | MINI | 08+ | The M51132 is a VCA (Voltage Controlled Amplifier) IC developed as an ele | |
| ZVF | (1) | The customer¢s voice sources are recorded section by section into an | |||
| ZVM | (3) | HL | The ISD MicroTAD-16M utilizes separate analog and digital ground busses. | ||
| ZVN | (144) | ZTETX | NOTES: 1. Designators in TYPE: P: power supply and ground, DI: digital in | ||
| ZVP | (63) | ztx | ztx | dc93 | 3.3 Electrical performance characteristics and postirradiation par |
| ZVX | (1) | varicon | varicon | dc04 | Description The 14.22 mm (0.56 inch) LED dual digit seven segment displa |
| ZW- | (33) | The RM3183 contains two discrete ARINC 429 receiver channels. Each chann | |||
| ZW0 | (9) | High Efficiency: Up to 95% Very Low Quiescent Current: Only 40µA 2 | |||
| ZW1 | (35) | N/A | The EL2141 is a very high bandwidth amplifier whose output is in differe | ||
| ZW2 | (2) | address, and I/O pins that permit independent, asynchronous access for re | |||
| ZW3 | (14) | N/A | Resistors R1 and R2 set the nominal Under-Voltage (UV) lockout and Overv | ||
| ZW4 | (2) | Electrical Characteristics (If not specified Tl=25) ItemSymbolCo | |||
| ZW5 | (2) | CLCC | S1M8662A is fabricated on the Samsung's 0.5um high-speed, high fre | ||
| ZW6 | (9) | N/A | NOTES: 1. All VDD pins must be connected to 3.3V power supply. 2. All VD | ||
| ZWD | (2) | Note 1: Absolute Maximum Ratings are those values beyond which the life | |||
| ZWQ | (8) | LAMBDA | Module | N/A | Bidirectional 8-bit input/output port. Software instructions determine the |
| ZWS | (80) | LAMBDA | Module | N/A | By combining powerful features, ease of use, and industry-leading specif |
| ZWT | (2) | Note: These are stress ratings only. Stresses exceeding the range specifi | |||
| ZWY | (2) | powers up in the write disabled state. The device then remains in a wri | |||
| Z-X | (2) | SMK | 06+ | 837 | UART channel B Request-to-Send (active low) or general purpose output. Th |
| ZX0 | (27) | MINI | 08+ | The chip requires a single, even-parity bit to be sent after the 6 comma | |
| ZX1 | (38) | MINI | 08+ | 专业射频微波 | The 60HQ Schottky rectifier series has been optimized for low reverse lea |
| ZX2 | (22) | DSI | n/a | VDDQ - I/O Power Supply This feature is available only on the SST39VF160 | |
| ZX3 | (18) | DSI | n/a | Clock Enable: CKE HIGH activates, and CKE Low deactivates, internal clock | |
| ZX4 | (8) | ZETEX | 2003 | SOP-8 | Supply voltage input for left channel and for primary bias circuits Mute |
| ZX5 | (42) | DSI | n/a | This 16-bit buffer/driver is built using advanced dual metal CMOS | |
| ZX6 | (9) | MINI | 08+ | 专业射频微波 | The ZX60-2510M/ZX60-2510M are part of a family of the electronics industr |
| ZX7 | (20) | ZYTREZ | DIP | 98+ | With its wide supply voltage range (2.7 V to 12 V) and wide bandwidth (1 |
| ZX8 | (3) | ZXDZ | 06+ | Y1/23 | The ZX8050 is powered on by applying the appropriate logic level to the |
| ZX9 | (2) | MINI | 08+ | * This is a stress rating only and functional operation of the device at | |
| ZXA | (1) | SOP | AMDs Flash technology combines years of Flash memory manufacturing expe | ||
| ZXB | (20) | 98 | Notes: 5. Test conditions assume signal transition time of 3 ns or | ||
| ZXC | (95) | ZETEX | SOT23-5 | 06+ | Thermal Resistance. . . . . . . . . . . . . . . .jajc oC/W |
| ZXD | (6) | ZTE | 2007 | For a comprehensive information on MirrorBit prod- ucts, including migr | |
| ZXE | (1) | Internal, dual, high-performance phase locked loop (PLL) synthesizers/VCOs | |||
| ZXF | (39) | N/A | ZETEX | The thermal shutdown debiases the output amplifier when the junction tem | |
| ZXG | (4) | Note 3 The SK frequency specification specifies a minimum SK clock period | |||
| ZXL | (25) | SANYO | DIP-30 | 04+ | ICs form an on-board 28-bit serial-in/parallel-out shift register with c |
| ZXM | (354) | ZETEX | SOT-23 | 07+（ROHS） | A/D converters are calibrated by positioning their digital outputs exact |
| ZXN | (4) | ZETEX | QFN-16 | 06+ | • Categorized for Luminous Intensity Yellow and Gre |
| ZXR | (56) | ZETEX | SSOP-16 | 07+ | The power input pin of the regulator. A minimum of input capacitance must |
| ZXS | (31) | MSOP-8 | The oscillator uses an external, low-cost 32.768kHz crystal. All compen | ||
| ZXT | (201) | ZTX | Notes: 1. For Max. or Min. conditions, use appropriate value specified u | ||
| Z-Y | (18) | 05+▲▲ | SMD | The UT28F256 has three control inputs: Chip Enable (CE), Program Enable | |
| ZY- | (4) | The CAT34AC02 supports the SMBus data transmission protocol. This seria | |||
| ZY1 | (26) | gs | gs | dc01 | C Access to Entire Memory Map Two Multichannel Buffered Serial Ports (Mc |
| ZY2 | (5) | DSI | n/a | The COP820CJ is a member of the COP8TM 8-bit Microcon- troller family It | |
| ZY3 | (4) | DSI | n/a | ||
| ZY4 | (3) | ei | n/a | • Vz-Iz characteristics are semilogarithmic linear from IZ = 1nA to | |
| ZY5 | (5) | ei | n/a | NOTE: EP circuits are designed to meet the DC specifications shown in the | |
| ZY6 | (6) | FAGOR | The general purpose memory portion of the device is a CMOS serial EEPRO | ||
| ZY7 | (2) | itt | itt | dc93 | An additional feature of the ispLSI 3448 is the Boundary Scan capability |
| ZY8 | (2) | fag | n/a | OSC1 & OSC2: Oscillator programming pins. A resistor connects each p | |
| ZY9 | (2) | DSI | n/a | NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATI | |
| ZYG | (1) | AMIS | QFP208 | ||
| ZYI | (1) | n/a | 05+ | 4. Values for two Turn-On loss conditions are shown for the convenience o | |
| ZYM | (5) | N/A | PLCC | 94+ | Note 1: Absolute maximum ratings indicate limits beyond which damage to t |
| ZYN | (1) | Reg set compatible to 16C2552 and 16C2852 Up to 6.25 Mbps at 5 Volt, 4 | |||
| ZYS | (3) | MINI | 08+ | The V54C3128804VAT is a four bank Synchro- nous DRAM organized a | |
| ZZ- | (1) | Two power-saving features are embodied in the HY29DL16x. When addresses | |||
| ZZ0 | (1) | Port 0: Is an 8-bit open drain bi-directional I/O port. Port 0 pins that | |||
| ZZ1 | (1) | Because of these RF frequencies, it is necessary to have an AC test jig | |||
| ZZ8 | (2) | 83 | ST | 01+ | ACCURACY Linearity of a D/A converter is the true measure of its perfor |
| ZZB | (2) | A reset can be accomplished by holding the RESET pin LOW for a minimum | |||
| ZZJ | (1) | TDK | 4脚 | 06+ | FUNCTION SWITCHING The device provides functions switching pins for both |
| ZZL | (4) | The transmit path interpolation filter provides an upsampling factor of | |||
| ZZP | (1) | USA | 1997 | Dual axis accelerometer on a single IC chip 5 mm 5 mm 2 mm LCC package | |
| ZZU | (1) | 28F3208W30 product references removed (product was discontinued) 28F640W | |||
| ZZV | (1) | itt | itt | dc92 | The CD4518B and CD4520B types are supplied in 16-lead hermetic dual-in-li |
| ZZW | (14) | In a running motor, a current will flow through the resistor RSENSE resu | |||
| ZZY | (47) | Electrical & Optical Specifications Specifications (Min. & Max. |
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